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| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2018-04-11 19:05:03 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-03-30 14:31:55 +0200 |
| commit | 5f7b515df003ca05a308b316d7b8b0034ea98094 (patch) | |
| tree | c19f70e5a836a8ea0cf0b0cd5a1a11b78f3836f2 /security | |
| parent | 2a0d35962ff114cc92f29d01d4a10f06fcdaeaec (diff) | |
| download | linux-stable-5f7b515df003ca05a308b316d7b8b0034ea98094.tar.gz linux-stable-5f7b515df003ca05a308b316d7b8b0034ea98094.tar.bz2 linux-stable-5f7b515df003ca05a308b316d7b8b0034ea98094.zip | |
ARM: dts: at91-sama5d27_som1: fix phy address to 7
commit 221c3a09ddf70a0a51715e6c2878d8305e95c558 upstream.
Fix the phy address to 7 for Ethernet PHY on SAMA5D27 SOM1. No
connection established if phy address 0 is used.
The board uses the 24 pins version of the KSZ8081RNA part, KSZ8081RNA
pin 16 REFCLK as PHYAD bit [2] has weak internal pull-down. But at
reset, connected to PD09 of the MPU it's connected with an internal
pull-up forming PHYAD[2:0] = 7.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Fixes: 2f61929eb10a ("ARM: dts: at91: at91-sama5d27_som1: fix PHY ID")
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: <stable@vger.kernel.org> # 4.14+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'security')
0 files changed, 0 insertions, 0 deletions