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author | Takashi Iwai <tiwai@suse.de> | 2017-02-07 13:53:42 +0100 |
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committer | Takashi Iwai <tiwai@suse.de> | 2017-02-10 10:21:47 +0100 |
commit | 3fe2cf7eb21ada0a9683b26c1ae309e7f5e90131 (patch) | |
tree | cecb8e29b0dfc6e5c7fe3db90e3b817dd23c4156 /sound | |
parent | 85bd8748ca23a25f6dc56154d9a61d87ae07a807 (diff) | |
download | linux-stable-3fe2cf7eb21ada0a9683b26c1ae309e7f5e90131.tar.gz linux-stable-3fe2cf7eb21ada0a9683b26c1ae309e7f5e90131.tar.bz2 linux-stable-3fe2cf7eb21ada0a9683b26c1ae309e7f5e90131.zip |
ALSA: x86: Support S16 format
Now we support S16 PCM format in addition. For this, we need to set
packet_mode=1 in AUD_CONFIG register.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/x86/intel_hdmi_audio.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c index e8f8be2f590b..c0a080e5d1f4 100644 --- a/sound/x86/intel_hdmi_audio.c +++ b/sound/x86/intel_hdmi_audio.c @@ -135,7 +135,8 @@ static const struct snd_pcm_hardware had_pcm_hardware = { SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_NO_PERIOD_WAKEUP), - .formats = (SNDRV_PCM_FMTBIT_S24_LE | + .formats = (SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE), .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | @@ -290,12 +291,10 @@ static int had_prog_status_reg(struct snd_pcm_substream *substream, AUD_CH_STATUS_0, ch_stat0.regval); switch (substream->runtime->format) { -#if 0 /* FIXME: not supported yet */ case SNDRV_PCM_FORMAT_S16_LE: ch_stat1.regx.max_wrd_len = MAX_SMPL_WIDTH_20; ch_stat1.regx.wrd_len = SMPL_WIDTH_16BITS; break; -#endif case SNDRV_PCM_FORMAT_S24_LE: case SNDRV_PCM_FORMAT_S32_LE: ch_stat1.regx.max_wrd_len = MAX_SMPL_WIDTH_24; @@ -336,6 +335,9 @@ static int had_init_audio_ctrl(struct snd_pcm_substream *substream, else cfg_val.regx.layout = LAYOUT1; + if (substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE) + cfg_val.regx.packet_mode = 1; + if (substream->runtime->format == SNDRV_PCM_FORMAT_S32_LE) cfg_val.regx.left_align = 1; |