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| author | Jerome Brunet <jbrunet@baylibre.com> | 2024-02-23 18:51:07 +0100 |
|---|---|---|
| committer | Sasha Levin <sashal@kernel.org> | 2024-03-26 18:21:58 -0400 |
| commit | 4bc8e7f3a129dbd4dcdb458536c561bc9fbddb2f (patch) | |
| tree | 2823ee1129f4fd20312431674dc73c16f0b245f4 /sound | |
| parent | fe9796edda93ce8156891b03acaeb03e02b59afc (diff) | |
| download | linux-stable-4bc8e7f3a129dbd4dcdb458536c561bc9fbddb2f.tar.gz linux-stable-4bc8e7f3a129dbd4dcdb458536c561bc9fbddb2f.tar.bz2 linux-stable-4bc8e7f3a129dbd4dcdb458536c561bc9fbddb2f.zip | |
ASoC: meson: axg-tdm-interface: fix mclk setup without mclk-fs
[ Upstream commit e3741a8d28a1137f8b19ae6f3d6e3be69a454a0a ]
By default, when mclk-fs is not provided, the tdm-interface driver
requests an MCLK that is 4x the bit clock, SCLK.
However there is no justification for this:
* If the codec needs MCLK for its operation, mclk-fs is expected to be set
according to the codec requirements.
* If the codec does not need MCLK the minimum is 2 * SCLK, because this is
minimum the divider between SCLK and MCLK can do.
Multiplying by 4 may cause problems because the PLL limit may be reached
sooner than it should, so use 2x instead.
Fixes: d60e4f1e4be5 ("ASoC: meson: add tdm interface driver")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://msgid.link/r/20240223175116.2005407-2-jbrunet@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/meson/axg-tdm-interface.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sound/soc/meson/axg-tdm-interface.c b/sound/soc/meson/axg-tdm-interface.c index e076ced30025..ac43a7ab7bcf 100644 --- a/sound/soc/meson/axg-tdm-interface.c +++ b/sound/soc/meson/axg-tdm-interface.c @@ -266,8 +266,8 @@ static int axg_tdm_iface_set_sclk(struct snd_soc_dai *dai, srate = iface->slots * iface->slot_width * params_rate(params); if (!iface->mclk_rate) { - /* If no specific mclk is requested, default to bit clock * 4 */ - clk_set_rate(iface->mclk, 4 * srate); + /* If no specific mclk is requested, default to bit clock * 2 */ + clk_set_rate(iface->mclk, 2 * srate); } else { /* Check if we can actually get the bit clock from mclk */ if (iface->mclk_rate % srate) { |