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author | Christoffer Dall <cdall@linaro.org> | 2017-05-20 14:12:34 +0200 |
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committer | Christoffer Dall <cdall@linaro.org> | 2017-05-24 09:44:07 +0200 |
commit | 28232a4317be7ad615f0f1b69dc8583fd580a8e3 (patch) | |
tree | 9a8aa63f28847929321d6c85c0f8913986bfa1dc /virt/kvm/arm/vgic/vgic.h | |
parent | fa472fa91a5a0b241f5ddae927d2e235d07545df (diff) | |
download | linux-stable-28232a4317be7ad615f0f1b69dc8583fd580a8e3.tar.gz linux-stable-28232a4317be7ad615f0f1b69dc8583fd580a8e3.tar.bz2 linux-stable-28232a4317be7ad615f0f1b69dc8583fd580a8e3.zip |
KVM: arm/arm64: Fix isues with GICv2 on GICv3 migration
We have been a little loose with our intermediate VMCR representation
where we had a 'ctlr' field, but we failed to differentiate between the
GICv2 GICC_CTLR and ICC_CTLR_EL1 layouts, and therefore ended up mapping
the wrong bits into the individual fields of the ICH_VMCR_EL2 when
emulating a GICv2 on a GICv3 system.
Fix this by using explicit fields for the VMCR bits instead.
Cc: Eric Auger <eric.auger@redhat.com>
Reported-by: wanghaibin <wanghaibin.wang@huawei.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'virt/kvm/arm/vgic/vgic.h')
-rw-r--r-- | virt/kvm/arm/vgic/vgic.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h index da83e4caa272..bba7fa22a7f7 100644 --- a/virt/kvm/arm/vgic/vgic.h +++ b/virt/kvm/arm/vgic/vgic.h @@ -111,14 +111,18 @@ static inline bool irq_is_pending(struct vgic_irq *irq) * registers regardless of the hardware backed GIC used. */ struct vgic_vmcr { - u32 ctlr; + u32 grpen0; + u32 grpen1; + + u32 ackctl; + u32 fiqen; + u32 cbpr; + u32 eoim; + u32 abpr; u32 bpr; u32 pmr; /* Priority mask field in the GICC_PMR and * ICC_PMR_EL1 priority field format */ - /* Below member variable are valid only for GICv3 */ - u32 grpen0; - u32 grpen1; }; struct vgic_reg_attr { |