diff options
| -rw-r--r-- | arch/x86/kernel/cpu/mtrr/generic.c | 14 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/mtrr/mtrr.c | 6 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/mtrr/mtrr.h | 1 |
3 files changed, 1 insertions, 20 deletions
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index 9d4d2bcaf4e8..ee09d359e08f 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c @@ -442,20 +442,6 @@ static void __init print_mtrr_state(void) pr_debug("TOM2: %016llx aka %lldM\n", mtrr_tom2, mtrr_tom2>>20); } -/* PAT setup for BP. We need to go through sync steps here */ -void __init mtrr_bp_pat_init(void) -{ - unsigned long flags; - - local_irq_save(flags); - cache_disable(); - - pat_init(); - - cache_enable(); - local_irq_restore(flags); -} - /* Grab all of the MTRR state for this CPU into *state */ bool __init get_mtrr_state(void) { diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtrr.c index a44b510ced0e..a468be5d778f 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.c +++ b/arch/x86/kernel/cpu/mtrr/mtrr.c @@ -764,12 +764,8 @@ void __init mtrr_bp_init(void) __mtrr_enabled = get_mtrr_state(); if (mtrr_enabled()) { - mtrr_bp_pat_init(); memory_caching_control |= CACHE_MTRR | CACHE_PAT; - } - - if (mtrr_cleanup(phys_addr)) { - changed_by_mtrr_cleanup = 1; + changed_by_mtrr_cleanup = mtrr_cleanup(phys_addr); cache_cpu_init(); } } diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h index 3b1883185185..c98928ceee6a 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.h +++ b/arch/x86/kernel/cpu/mtrr/mtrr.h @@ -50,7 +50,6 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt); void fill_mtrr_var_range(unsigned int index, u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi); bool get_mtrr_state(void); -void mtrr_bp_pat_init(void); extern void __init set_mtrr_ops(const struct mtrr_ops *ops); |