diff options
Diffstat (limited to 'arch/arm/mach-sa1100/include')
| -rw-r--r-- | arch/arm/mach-sa1100/include/mach/badge4.h | 71 | ||||
| -rw-r--r-- | arch/arm/mach-sa1100/include/mach/cerf.h | 20 | ||||
| -rw-r--r-- | arch/arm/mach-sa1100/include/mach/nanoengine.h | 48 | ||||
| -rw-r--r-- | arch/arm/mach-sa1100/include/mach/shannon.h | 40 | ||||
| -rw-r--r-- | arch/arm/mach-sa1100/include/mach/simpad.h | 159 |
5 files changed, 0 insertions, 338 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/badge4.h b/arch/arm/mach-sa1100/include/mach/badge4.h deleted file mode 100644 index 90e744a54ed5..000000000000 --- a/arch/arm/mach-sa1100/include/mach/badge4.h +++ /dev/null @@ -1,71 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-sa1100/include/mach/badge4.h - * - * Tim Connors <connors@hpl.hp.com> - * Christopher Hoover <ch@hpl.hp.com> - * - * Copyright (C) 2002 Hewlett-Packard Company - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#error "include <mach/hardware.h> instead" -#endif - -#define BADGE4_SA1111_BASE (0x48000000) - -/* GPIOs on the BadgePAD 4 */ -#define BADGE4_GPIO_INT_1111 GPIO_GPIO0 /* SA-1111 IRQ */ - -#define BADGE4_GPIO_INT_VID GPIO_GPIO1 /* Video expansion */ -#define BADGE4_GPIO_LGP2 GPIO_GPIO2 /* GPIO_LDD8 */ -#define BADGE4_GPIO_LGP3 GPIO_GPIO3 /* GPIO_LDD9 */ -#define BADGE4_GPIO_LGP4 GPIO_GPIO4 /* GPIO_LDD10 */ -#define BADGE4_GPIO_LGP5 GPIO_GPIO5 /* GPIO_LDD11 */ -#define BADGE4_GPIO_LGP6 GPIO_GPIO6 /* GPIO_LDD12 */ -#define BADGE4_GPIO_LGP7 GPIO_GPIO7 /* GPIO_LDD13 */ -#define BADGE4_GPIO_LGP8 GPIO_GPIO8 /* GPIO_LDD14 */ -#define BADGE4_GPIO_LGP9 GPIO_GPIO9 /* GPIO_LDD15 */ -#define BADGE4_GPIO_GPA_VID GPIO_GPIO10 /* Video expansion */ -#define BADGE4_GPIO_GPB_VID GPIO_GPIO11 /* Video expansion */ -#define BADGE4_GPIO_GPC_VID GPIO_GPIO12 /* Video expansion */ - -#define BADGE4_GPIO_UART_HS1 GPIO_GPIO13 -#define BADGE4_GPIO_UART_HS2 GPIO_GPIO14 - -#define BADGE4_GPIO_MUXSEL0 GPIO_GPIO15 -#define BADGE4_GPIO_TESTPT_J7 GPIO_GPIO16 - -#define BADGE4_GPIO_SDSDA GPIO_GPIO17 /* SDRAM SPD Data */ -#define BADGE4_GPIO_SDSCL GPIO_GPIO18 /* SDRAM SPD Clock */ -#define BADGE4_GPIO_SDTYP0 GPIO_GPIO19 /* SDRAM Type Control */ -#define BADGE4_GPIO_SDTYP1 GPIO_GPIO20 /* SDRAM Type Control */ - -#define BADGE4_GPIO_BGNT_1111 GPIO_GPIO21 /* GPIO_MBGNT */ -#define BADGE4_GPIO_BREQ_1111 GPIO_GPIO22 /* GPIO_TREQA */ - -#define BADGE4_GPIO_TESTPT_J6 GPIO_GPIO23 - -#define BADGE4_GPIO_PCMEN5V GPIO_GPIO24 /* 5V power */ - -#define BADGE4_GPIO_SA1111_NRST GPIO_GPIO25 /* SA-1111 nRESET */ - -#define BADGE4_GPIO_TESTPT_J5 GPIO_GPIO26 - -#define BADGE4_GPIO_CLK_1111 GPIO_GPIO27 /* GPIO_32_768kHz */ - -/* Interrupts on the BadgePAD 4 */ -#define BADGE4_IRQ_GPIO_SA1111 IRQ_GPIO0 /* SA-1111 interrupt */ - - -/* PCM5ENV Usage tracking */ - -#define BADGE4_5V_PCMCIA_SOCK0 (1<<0) -#define BADGE4_5V_PCMCIA_SOCK1 (1<<1) -#define BADGE4_5V_PCMCIA_SOCK(n) (1<<(n)) -#define BADGE4_5V_USB (1<<2) -#define BADGE4_5V_INITIALLY (1<<3) - -#ifndef __ASSEMBLY__ -extern void badge4_set_5V(unsigned subsystem, int on); -#endif diff --git a/arch/arm/mach-sa1100/include/mach/cerf.h b/arch/arm/mach-sa1100/include/mach/cerf.h deleted file mode 100644 index 59c185ebd494..000000000000 --- a/arch/arm/mach-sa1100/include/mach/cerf.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-sa1100/include/mach/cerf.h - * - * Apr-2003 : Removed some old PDA crud [FB] - */ -#ifndef _INCLUDE_CERF_H_ -#define _INCLUDE_CERF_H_ - - -#define CERF_ETH_IO 0xf0000000 -#define CERF_ETH_IRQ IRQ_GPIO26 - -#define CERF_GPIO_CF_BVD2 19 -#define CERF_GPIO_CF_BVD1 20 -#define CERF_GPIO_CF_RESET 21 -#define CERF_GPIO_CF_IRQ 22 -#define CERF_GPIO_CF_CD 23 - -#endif // _INCLUDE_CERF_H_ diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h deleted file mode 100644 index 8d5ee1438956..000000000000 --- a/arch/arm/mach-sa1100/include/mach/nanoengine.h +++ /dev/null @@ -1,48 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-sa1100/include/mach/nanoengine.h - * - * This file contains the hardware specific definitions for nanoEngine. - * Only include this file from SA1100-specific files. - * - * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br> - */ -#ifndef __ASM_ARCH_NANOENGINE_H -#define __ASM_ARCH_NANOENGINE_H - -#include <mach/irqs.h> - -#define GPIO_PC_READY0 11 /* ready for socket 0 (active high)*/ -#define GPIO_PC_READY1 12 /* ready for socket 1 (active high) */ -#define GPIO_PC_CD0 13 /* detect for socket 0 (active low) */ -#define GPIO_PC_CD1 14 /* detect for socket 1 (active low) */ -#define GPIO_PC_RESET0 15 /* reset socket 0 */ -#define GPIO_PC_RESET1 16 /* reset socket 1 */ - -#define NANOENGINE_IRQ_GPIO_PCI IRQ_GPIO0 -#define NANOENGINE_IRQ_GPIO_PC_READY0 IRQ_GPIO11 -#define NANOENGINE_IRQ_GPIO_PC_READY1 IRQ_GPIO12 -#define NANOENGINE_IRQ_GPIO_PC_CD0 IRQ_GPIO13 -#define NANOENGINE_IRQ_GPIO_PC_CD1 IRQ_GPIO14 - -/* - * nanoEngine Memory Map: - * - * 0000.0000 - 003F.0000 - 4 MB Flash - * C000.0000 - C1FF.FFFF - 32 MB SDRAM - * 1860.0000 - 186F.FFFF - 1 MB Internal PCI Memory Read/Write - * 18A1.0000 - 18A1.FFFF - 64 KB Internal PCI Config Space - * 4000.0000 - 47FF.FFFF - 128 MB External Bus I/O - Multiplexed Mode - * 4800.0000 - 4FFF.FFFF - 128 MB External Bus I/O - Non-Multiplexed Mode - * - */ - -#define NANO_PCI_MEM_RW_PHYS 0x18600000 -#define NANO_PCI_MEM_RW_VIRT 0xf1000000 -#define NANO_PCI_MEM_RW_SIZE SZ_1M -#define NANO_PCI_CONFIG_SPACE_PHYS 0x18A10000 -#define NANO_PCI_CONFIG_SPACE_VIRT 0xf2000000 -#define NANO_PCI_CONFIG_SPACE_SIZE SZ_64K - -#endif - diff --git a/arch/arm/mach-sa1100/include/mach/shannon.h b/arch/arm/mach-sa1100/include/mach/shannon.h deleted file mode 100644 index d830375f329c..000000000000 --- a/arch/arm/mach-sa1100/include/mach/shannon.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _INCLUDE_SHANNON_H -#define _INCLUDE_SHANNON_H - -/* taken from comp.os.inferno Tue, 12 Sep 2000 09:21:50 GMT, - * written by <forsyth@vitanuova.com> */ - -#define SHANNON_GPIO_SPI_FLASH GPIO_GPIO (0) /* Output - Driven low, enables SPI to flash */ -#define SHANNON_GPIO_SPI_DSP GPIO_GPIO (1) /* Output - Driven low, enables SPI to DSP */ -/* lcd lower = GPIO 2-9 */ -#define SHANNON_GPIO_SPI_OUTPUT GPIO_GPIO (10) /* Output - SPI output to DSP */ -#define SHANNON_GPIO_SPI_INPUT GPIO_GPIO (11) /* Input - SPI input from DSP */ -#define SHANNON_GPIO_SPI_CLOCK GPIO_GPIO (12) /* Output - Clock for SPI */ -#define SHANNON_GPIO_SPI_FRAME GPIO_GPIO (13) /* Output - Frame marker - not used */ -#define SHANNON_GPIO_SPI_RTS GPIO_GPIO (14) /* Input - SPI Ready to Send */ -#define SHANNON_IRQ_GPIO_SPI_RTS IRQ_GPIO14 -#define SHANNON_GPIO_SPI_CTS GPIO_GPIO (15) /* Output - SPI Clear to Send */ -#define SHANNON_GPIO_IRQ_CODEC GPIO_GPIO (16) /* in, irq from ucb1200 */ -#define SHANNON_IRQ_GPIO_IRQ_CODEC IRQ_GPIO16 -#define SHANNON_GPIO_DSP_RESET GPIO_GPIO (17) /* Output - Drive low to reset the DSP */ -#define SHANNON_GPIO_CODEC_RESET GPIO_GPIO (18) /* Output - Drive low to reset the UCB1x00 */ -#define SHANNON_GPIO_U3_RTS GPIO_GPIO (19) /* ?? */ -#define SHANNON_GPIO_U3_CTS GPIO_GPIO (20) /* ?? */ -#define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */ -#define SHANNON_GPIO_DISP_EN 22 /* out */ -/* XXX GPIO 23 unaccounted for */ -#define SHANNON_GPIO_EJECT_0 24 /* in */ -#define SHANNON_GPIO_EJECT_1 25 /* in */ -#define SHANNON_GPIO_RDY_0 26 /* in */ -#define SHANNON_GPIO_RDY_1 27 /* in */ - -/* MCP UCB codec GPIO pins... */ - -#define SHANNON_UCB_GPIO_BACKLIGHT 9 -#define SHANNON_UCB_GPIO_BRIGHT_MASK 7 -#define SHANNON_UCB_GPIO_BRIGHT 6 -#define SHANNON_UCB_GPIO_CONTRAST_MASK 0x3f -#define SHANNON_UCB_GPIO_CONTRAST 0 - -#endif diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h deleted file mode 100644 index d53d680de3d9..000000000000 --- a/arch/arm/mach-sa1100/include/mach/simpad.h +++ /dev/null @@ -1,159 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * arch/arm/mach-sa1100/include/mach/simpad.h - * - * based of assabet.h same as HUW_Webpanel - * - * This file contains the hardware specific definitions for SIMpad - * - * 2001/05/14 Juergen Messerer <juergen.messerer@freesurf.ch> - */ - -#ifndef __ASM_ARCH_SIMPAD_H -#define __ASM_ARCH_SIMPAD_H - - -#define GPIO_UART1_RTS GPIO_GPIO14 -#define GPIO_UART1_DTR GPIO_GPIO7 -#define GPIO_UART1_CTS GPIO_GPIO8 -#define GPIO_UART1_DCD GPIO_GPIO23 -#define GPIO_UART1_DSR GPIO_GPIO6 - -#define GPIO_UART3_RTS GPIO_GPIO12 -#define GPIO_UART3_DTR GPIO_GPIO16 -#define GPIO_UART3_CTS GPIO_GPIO13 -#define GPIO_UART3_DCD GPIO_GPIO18 -#define GPIO_UART3_DSR GPIO_GPIO17 - -#define GPIO_POWER_BUTTON GPIO_GPIO0 -#define GPIO_UCB1300_IRQ GPIO_GPIO22 /* UCB GPIO and touchscreen */ - -#define IRQ_UART1_CTS IRQ_GPIO15 -#define IRQ_UART1_DCD GPIO_GPIO23 -#define IRQ_UART1_DSR GPIO_GPIO6 -#define IRQ_UART3_CTS GPIO_GPIO13 -#define IRQ_UART3_DCD GPIO_GPIO18 -#define IRQ_UART3_DSR GPIO_GPIO17 - -#define IRQ_GPIO_UCB1300_IRQ IRQ_GPIO22 -#define IRQ_GPIO_POWER_BUTTON IRQ_GPIO0 - - -/*--- PCMCIA ---*/ -#define GPIO_CF_CD 24 -#define GPIO_CF_IRQ 1 - -/*--- SmartCard ---*/ -#define GPIO_SMART_CARD GPIO_GPIO10 -#define IRQ_GPIO_SMARD_CARD IRQ_GPIO10 - -/*--- ucb1x00 GPIO ---*/ -#define SIMPAD_UCB1X00_GPIO_BASE (GPIO_MAX + 1) -#define SIMPAD_UCB1X00_GPIO_PROG1 (SIMPAD_UCB1X00_GPIO_BASE) -#define SIMPAD_UCB1X00_GPIO_PROG2 (SIMPAD_UCB1X00_GPIO_BASE + 1) -#define SIMPAD_UCB1X00_GPIO_UP (SIMPAD_UCB1X00_GPIO_BASE + 2) -#define SIMPAD_UCB1X00_GPIO_DOWN (SIMPAD_UCB1X00_GPIO_BASE + 3) -#define SIMPAD_UCB1X00_GPIO_LEFT (SIMPAD_UCB1X00_GPIO_BASE + 4) -#define SIMPAD_UCB1X00_GPIO_RIGHT (SIMPAD_UCB1X00_GPIO_BASE + 5) -#define SIMPAD_UCB1X00_GPIO_6 (SIMPAD_UCB1X00_GPIO_BASE + 6) -#define SIMPAD_UCB1X00_GPIO_7 (SIMPAD_UCB1X00_GPIO_BASE + 7) -#define SIMPAD_UCB1X00_GPIO_HEADSET (SIMPAD_UCB1X00_GPIO_BASE + 8) -#define SIMPAD_UCB1X00_GPIO_SPEAKER (SIMPAD_UCB1X00_GPIO_BASE + 9) - -/*--- CS3 Latch ---*/ -#define SIMPAD_CS3_GPIO_BASE (GPIO_MAX + 11) -#define SIMPAD_CS3_VCC_5V_EN (SIMPAD_CS3_GPIO_BASE) -#define SIMPAD_CS3_VCC_3V_EN (SIMPAD_CS3_GPIO_BASE + 1) -#define SIMPAD_CS3_EN1 (SIMPAD_CS3_GPIO_BASE + 2) -#define SIMPAD_CS3_EN0 (SIMPAD_CS3_GPIO_BASE + 3) -#define SIMPAD_CS3_DISPLAY_ON (SIMPAD_CS3_GPIO_BASE + 4) -#define SIMPAD_CS3_PCMCIA_BUFF_DIS (SIMPAD_CS3_GPIO_BASE + 5) -#define SIMPAD_CS3_MQ_RESET (SIMPAD_CS3_GPIO_BASE + 6) -#define SIMPAD_CS3_PCMCIA_RESET (SIMPAD_CS3_GPIO_BASE + 7) -#define SIMPAD_CS3_DECT_POWER_ON (SIMPAD_CS3_GPIO_BASE + 8) -#define SIMPAD_CS3_IRDA_SD (SIMPAD_CS3_GPIO_BASE + 9) -#define SIMPAD_CS3_RS232_ON (SIMPAD_CS3_GPIO_BASE + 10) -#define SIMPAD_CS3_SD_MEDIAQ (SIMPAD_CS3_GPIO_BASE + 11) -#define SIMPAD_CS3_LED2_ON (SIMPAD_CS3_GPIO_BASE + 12) -#define SIMPAD_CS3_IRDA_MODE (SIMPAD_CS3_GPIO_BASE + 13) -#define SIMPAD_CS3_ENABLE_5V (SIMPAD_CS3_GPIO_BASE + 14) -#define SIMPAD_CS3_RESET_SIMCARD (SIMPAD_CS3_GPIO_BASE + 15) - -#define SIMPAD_CS3_PCMCIA_BVD1 (SIMPAD_CS3_GPIO_BASE + 16) -#define SIMPAD_CS3_PCMCIA_BVD2 (SIMPAD_CS3_GPIO_BASE + 17) -#define SIMPAD_CS3_PCMCIA_VS1 (SIMPAD_CS3_GPIO_BASE + 18) -#define SIMPAD_CS3_PCMCIA_VS2 (SIMPAD_CS3_GPIO_BASE + 19) -#define SIMPAD_CS3_LOCK_IND (SIMPAD_CS3_GPIO_BASE + 20) -#define SIMPAD_CS3_CHARGING_STATE (SIMPAD_CS3_GPIO_BASE + 21) -#define SIMPAD_CS3_PCMCIA_SHORT (SIMPAD_CS3_GPIO_BASE + 22) -#define SIMPAD_CS3_GPIO_23 (SIMPAD_CS3_GPIO_BASE + 23) - -#define CS3_BASE IOMEM(0xf1000000) - -long simpad_get_cs3_ro(void); -long simpad_get_cs3_shadow(void); -void simpad_set_cs3_bit(int value); -void simpad_clear_cs3_bit(int value); - -#define VCC_5V_EN 0x0001 /* For 5V PCMCIA */ -#define VCC_3V_EN 0x0002 /* FOR 3.3V PCMCIA */ -#define EN1 0x0004 /* This is only for EPROM's */ -#define EN0 0x0008 /* Both should be enable for 3.3V or 5V */ -#define DISPLAY_ON 0x0010 -#define PCMCIA_BUFF_DIS 0x0020 -#define MQ_RESET 0x0040 -#define PCMCIA_RESET 0x0080 -#define DECT_POWER_ON 0x0100 -#define IRDA_SD 0x0200 /* Shutdown for powersave */ -#define RS232_ON 0x0400 -#define SD_MEDIAQ 0x0800 /* Shutdown for powersave */ -#define LED2_ON 0x1000 -#define IRDA_MODE 0x2000 /* Fast/Slow IrDA mode */ -#define ENABLE_5V 0x4000 /* Enable 5V circuit */ -#define RESET_SIMCARD 0x8000 - -#define PCMCIA_BVD1 0x01 -#define PCMCIA_BVD2 0x02 -#define PCMCIA_VS1 0x04 -#define PCMCIA_VS2 0x08 -#define LOCK_IND 0x10 -#define CHARGING_STATE 0x20 -#define PCMCIA_SHORT 0x40 - -/*--- Battery ---*/ -struct simpad_battery { - unsigned char ac_status; /* line connected yes/no */ - unsigned char status; /* battery loading yes/no */ - unsigned char percentage; /* percentage loaded */ - unsigned short life; /* life till empty */ -}; - -/* These should match the apm_bios.h definitions */ -#define SIMPAD_AC_STATUS_AC_OFFLINE 0x00 -#define SIMPAD_AC_STATUS_AC_ONLINE 0x01 -#define SIMPAD_AC_STATUS_AC_BACKUP 0x02 /* What does this mean? */ -#define SIMPAD_AC_STATUS_AC_UNKNOWN 0xff - -/* These bitfields are rarely "or'd" together */ -#define SIMPAD_BATT_STATUS_HIGH 0x01 -#define SIMPAD_BATT_STATUS_LOW 0x02 -#define SIMPAD_BATT_STATUS_CRITICAL 0x04 -#define SIMPAD_BATT_STATUS_CHARGING 0x08 -#define SIMPAD_BATT_STATUS_CHARGE_MAIN 0x10 -#define SIMPAD_BATT_STATUS_DEAD 0x20 /* Battery will not charge */ -#define SIMPAD_BATT_NOT_INSTALLED 0x20 /* For expansion pack batteries */ -#define SIMPAD_BATT_STATUS_FULL 0x40 /* Battery fully charged (and connected to AC) */ -#define SIMPAD_BATT_STATUS_NOBATT 0x80 -#define SIMPAD_BATT_STATUS_UNKNOWN 0xff - -extern int simpad_get_battery(struct simpad_battery* ); - -#endif // __ASM_ARCH_SIMPAD_H - - - - - - - - |