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-rw-r--r--arch/arm64/boot/dts/hisilicon/hip05.dtsi5
-rw-r--r--arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi4
2 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index 4ff16d016e34..c1ea999c7be1 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -246,6 +246,11 @@
clock-frequency = <200000000>;
};
+ peri_c_subctrl: syscon@80000000 {
+ compatible = "hisilicon,hip05-perisubc", "syscon";
+ reg = < 0x0 0x80000000 0x0 0x10000>;
+ };
+
uart0: uart@80300000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x80300000 0x0 0x10000>;
diff --git a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
index 606dd5a05c2d..da7b6e613257 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
@@ -10,8 +10,8 @@ soc0: soc@000000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "hisilicon,hns-mdio";
- reg = <0x0 0x803c0000 0x0 0x10000
- 0x0 0x80000000 0x0 0x10000>;
+ reg = <0x0 0x803c0000 0x0 0x10000>;
+ subctrl-vbase = <&peri_c_subctrl>;
soc0_phy0: ethernet-phy@0 {
reg = <0x0>;