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-rw-r--r--drivers/edac/Kconfig13
-rw-r--r--drivers/edac/Makefile1
-rw-r--r--drivers/edac/amd64_edac.c34
-rw-r--r--drivers/edac/amd76x_edac.c1
-rw-r--r--drivers/edac/aspeed_edac.c7
-rw-r--r--drivers/edac/e752x_edac.c1
-rw-r--r--drivers/edac/e7xxx_edac.c1
-rw-r--r--drivers/edac/edac_device.h11
-rw-r--r--drivers/edac/edac_mc.c1
-rw-r--r--drivers/edac/i10nm_base.c39
-rw-r--r--drivers/edac/i3000_edac.c1
-rw-r--r--drivers/edac/i3200_edac.c1
-rw-r--r--drivers/edac/i5000_edac.c2
-rw-r--r--drivers/edac/i5400_edac.c2
-rw-r--r--drivers/edac/i82443bxgx_edac.c1
-rw-r--r--drivers/edac/i82860_edac.c1
-rw-r--r--drivers/edac/i82875p_edac.c1
-rw-r--r--drivers/edac/i82975x_edac.c1
-rw-r--r--drivers/edac/ie31200_edac.c1
-rw-r--r--drivers/edac/mv64x60_edac.c883
-rw-r--r--drivers/edac/mv64x60_edac.h114
-rw-r--r--drivers/edac/r82600_edac.c1
-rw-r--r--drivers/edac/skx_base.c6
-rw-r--r--drivers/edac/skx_common.c23
-rw-r--r--drivers/edac/skx_common.h16
-rw-r--r--drivers/edac/synopsys_edac.c3
-rw-r--r--drivers/edac/x38_edac.c1
27 files changed, 94 insertions, 1073 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index fa0c3b5797e4..81c42664f21b 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -292,13 +292,6 @@ config EDAC_LAYERSCAPE
Support for error detection and correction on Freescale memory
controllers on Layerscape SoCs.
-config EDAC_MV64X60
- tristate "Marvell MV64x60"
- depends on MV64X60
- help
- Support for error detection and correction on the Marvell
- MV64360 and MV64460 chipsets.
-
config EDAC_PASEMI
tristate "PA Semi PWRficient"
depends on PPC_PASEMI && PCI
@@ -524,10 +517,10 @@ config EDAC_QCOM
health, you should probably say 'Y' here.
config EDAC_ASPEED
- tristate "Aspeed AST 2500 SoC"
- depends on MACH_ASPEED_G5
+ tristate "Aspeed AST BMC SoC"
+ depends on ARCH_ASPEED
help
- Support for error detection and correction on the Aspeed AST 2500 SoC.
+ Support for error detection and correction on the Aspeed AST BMC SoC.
First, ECC must be configured in the bootloader. Then, this driver
will expose error counters via the EDAC kernel framework.
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile
index 3cd1aeb0a916..464d3d8d850a 100644
--- a/drivers/edac/Makefile
+++ b/drivers/edac/Makefile
@@ -65,7 +65,6 @@ obj-$(CONFIG_EDAC_SKX) += skx_edac.o
i10nm_edac-y := skx_common.o i10nm_base.o
obj-$(CONFIG_EDAC_I10NM) += i10nm_edac.o
-obj-$(CONFIG_EDAC_MV64X60) += mv64x60_edac.o
obj-$(CONFIG_EDAC_CELL) += cell_edac.o
obj-$(CONFIG_EDAC_PPC4XX) += ppc4xx_edac.o
obj-$(CONFIG_EDAC_AMD8111) += amd8111_edac.o
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 1362274d840b..15b0d39d2845 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -18,6 +18,9 @@ static struct amd64_family_type *fam_type;
/* Per-node stuff */
static struct ecc_settings **ecc_stngs;
+/* Device for the PCI component */
+static struct device *pci_ctl_dev;
+
/*
* Valid scrub rates for the K8 hardware memory scrubber. We map the scrubbing
* bandwidth to a valid bit pattern. The 'set' operation finds the 'matching-
@@ -2461,14 +2464,11 @@ static int map_err_sym_to_channel(int err_sym, int sym_size)
case 0x20:
case 0x21:
return 0;
- break;
case 0x22:
case 0x23:
return 1;
- break;
default:
return err_sym >> 4;
- break;
}
/* x8 symbols */
else
@@ -2478,17 +2478,12 @@ static int map_err_sym_to_channel(int err_sym, int sym_size)
WARN(1, KERN_ERR "Invalid error symbol: 0x%x\n",
err_sym);
return -1;
- break;
-
case 0x11:
return 0;
- break;
case 0x12:
return 1;
- break;
default:
return err_sym >> 3;
- break;
}
return -1;
}
@@ -2683,6 +2678,9 @@ reserve_mc_sibling_devs(struct amd64_pvt *pvt, u16 pci_id1, u16 pci_id2)
return -ENODEV;
}
+ if (!pci_ctl_dev)
+ pci_ctl_dev = &pvt->F0->dev;
+
edac_dbg(1, "F0: %s\n", pci_name(pvt->F0));
edac_dbg(1, "F3: %s\n", pci_name(pvt->F3));
edac_dbg(1, "F6: %s\n", pci_name(pvt->F6));
@@ -2707,6 +2705,9 @@ reserve_mc_sibling_devs(struct amd64_pvt *pvt, u16 pci_id1, u16 pci_id2)
return -ENODEV;
}
+ if (!pci_ctl_dev)
+ pci_ctl_dev = &pvt->F2->dev;
+
edac_dbg(1, "F1: %s\n", pci_name(pvt->F1));
edac_dbg(1, "F2: %s\n", pci_name(pvt->F2));
edac_dbg(1, "F3: %s\n", pci_name(pvt->F3));
@@ -3623,21 +3624,10 @@ static void remove_one_instance(unsigned int nid)
static void setup_pci_device(void)
{
- struct mem_ctl_info *mci;
- struct amd64_pvt *pvt;
-
if (pci_ctl)
return;
- mci = edac_mc_find(0);
- if (!mci)
- return;
-
- pvt = mci->pvt_info;
- if (pvt->umc)
- pci_ctl = edac_pci_create_generic_ctl(&pvt->F0->dev, EDAC_MOD_STR);
- else
- pci_ctl = edac_pci_create_generic_ctl(&pvt->F2->dev, EDAC_MOD_STR);
+ pci_ctl = edac_pci_create_generic_ctl(pci_ctl_dev, EDAC_MOD_STR);
if (!pci_ctl) {
pr_warn("%s(): Unable to create PCI control\n", __func__);
pr_warn("%s(): PCI error report via EDAC not set\n", __func__);
@@ -3716,6 +3706,8 @@ static int __init amd64_edac_init(void)
return 0;
err_pci:
+ pci_ctl_dev = NULL;
+
msrs_free(msrs);
msrs = NULL;
@@ -3745,6 +3737,8 @@ static void __exit amd64_edac_exit(void)
kfree(ecc_stngs);
ecc_stngs = NULL;
+ pci_ctl_dev = NULL;
+
msrs_free(msrs);
msrs = NULL;
}
diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c
index 9c6e326b4c14..2a49f68a7cf9 100644
--- a/drivers/edac/amd76x_edac.c
+++ b/drivers/edac/amd76x_edac.c
@@ -179,7 +179,6 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,
static void amd76x_check(struct mem_ctl_info *mci)
{
struct amd76x_error_info info;
- edac_dbg(3, "\n");
amd76x_get_error_info(mci, &info);
amd76x_process_error_info(mci, &info, 1);
}
diff --git a/drivers/edac/aspeed_edac.c b/drivers/edac/aspeed_edac.c
index fde809efc520..a46da56d6d54 100644
--- a/drivers/edac/aspeed_edac.c
+++ b/drivers/edac/aspeed_edac.c
@@ -239,7 +239,7 @@ static int init_csrows(struct mem_ctl_info *mci)
int rc;
/* retrieve info about physical memory from device tree */
- np = of_find_node_by_path("/memory");
+ np = of_find_node_by_name(NULL, "memory");
if (!np) {
dev_err(mci->pdev, "dt: missing /memory node\n");
return -ENODEV;
@@ -375,10 +375,13 @@ static int aspeed_remove(struct platform_device *pdev)
static const struct of_device_id aspeed_of_match[] = {
+ { .compatible = "aspeed,ast2400-sdram-edac" },
{ .compatible = "aspeed,ast2500-sdram-edac" },
+ { .compatible = "aspeed,ast2600-sdram-edac" },
{},
};
+MODULE_DEVICE_TABLE(of, aspeed_of_match);
static struct platform_driver aspeed_driver = {
.driver = {
@@ -392,5 +395,5 @@ module_platform_driver(aspeed_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Stefan Schaeckeler <sschaeck@cisco.com>");
-MODULE_DESCRIPTION("Aspeed AST2500 EDAC driver");
+MODULE_DESCRIPTION("Aspeed BMC SoC EDAC driver");
MODULE_VERSION("1.0");
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c
index 313d08018166..ac7c9b42d4c7 100644
--- a/drivers/edac/e752x_edac.c
+++ b/drivers/edac/e752x_edac.c
@@ -980,7 +980,6 @@ static void e752x_check(struct mem_ctl_info *mci)
{
struct e752x_error_info info;
- edac_dbg(3, "\n");
e752x_get_error_info(mci, &info);
e752x_process_error_info(mci, &info, 1);
}
diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c
index 75d7ce62b3be..497e710fca3d 100644
--- a/drivers/edac/e7xxx_edac.c
+++ b/drivers/edac/e7xxx_edac.c
@@ -333,7 +333,6 @@ static void e7xxx_check(struct mem_ctl_info *mci)
{
struct e7xxx_error_info info;
- edac_dbg(3, "\n");
e7xxx_get_error_info(mci, &info);
e7xxx_process_error_info(mci, &info, 1);
}
diff --git a/drivers/edac/edac_device.h b/drivers/edac/edac_device.h
index c4c0e0bdce14..fc2d2c218064 100644
--- a/drivers/edac/edac_device.h
+++ b/drivers/edac/edac_device.h
@@ -258,7 +258,7 @@ extern struct edac_device_ctl_info *edac_device_alloc_ctl_info(
extern void edac_device_free_ctl_info(struct edac_device_ctl_info *ctl_info);
/**
- * edac_device_add_device: Insert the 'edac_dev' structure into the
+ * edac_device_add_device - Insert the 'edac_dev' structure into the
* edac_device global list and create sysfs entries associated with
* edac_device structure.
*
@@ -271,9 +271,8 @@ extern void edac_device_free_ctl_info(struct edac_device_ctl_info *ctl_info);
extern int edac_device_add_device(struct edac_device_ctl_info *edac_dev);
/**
- * edac_device_del_device:
- * Remove sysfs entries for specified edac_device structure and
- * then remove edac_device structure from global list
+ * edac_device_del_device - Remove sysfs entries for specified edac_device
+ * structure and then remove edac_device structure from global list
*
* @dev:
* Pointer to struct &device representing the edac device
@@ -286,7 +285,7 @@ extern int edac_device_add_device(struct edac_device_ctl_info *edac_dev);
extern struct edac_device_ctl_info *edac_device_del_device(struct device *dev);
/**
- * Log correctable errors.
+ * edac_device_handle_ce_count - Log correctable errors.
*
* @edac_dev: pointer to struct &edac_device_ctl_info
* @inst_nr: number of the instance where the CE error happened
@@ -299,7 +298,7 @@ void edac_device_handle_ce_count(struct edac_device_ctl_info *edac_dev,
const char *msg);
/**
- * Log uncorrectable errors.
+ * edac_device_handle_ue_count - Log uncorrectable errors.
*
* @edac_dev: pointer to struct &edac_device_ctl_info
* @inst_nr: number of the instance where the CE error happened
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index eef8724faae0..f6d462d0be2d 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -163,6 +163,7 @@ const char * const edac_mem_types[] = {
[MEM_RDDR4] = "Registered-DDR4",
[MEM_LPDDR4] = "Low-Power-DDR4-RAM",
[MEM_LRDDR4] = "Load-Reduced-DDR4-RAM",
+ [MEM_DDR5] = "Unbuffered-DDR5",
[MEM_NVDIMM] = "Non-volatile-RAM",
[MEM_WIO2] = "Wide-IO-2",
};
diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
index c8d11da85bec..238a4ad1e526 100644
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@ -6,27 +6,32 @@
*/
#include <linux/kernel.h>
+#include <linux/io.h>
#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/mce.h>
#include "edac_module.h"
#include "skx_common.h"
-#define I10NM_REVISION "v0.0.3"
+#define I10NM_REVISION "v0.0.4"
#define EDAC_MOD_STR "i10nm_edac"
/* Debug macros */
#define i10nm_printk(level, fmt, arg...) \
edac_printk(level, "i10nm", fmt, ##arg)
-#define I10NM_GET_SCK_BAR(d, reg) \
+#define I10NM_GET_SCK_BAR(d, reg) \
pci_read_config_dword((d)->uracu, 0xd0, &(reg))
#define I10NM_GET_IMC_BAR(d, i, reg) \
pci_read_config_dword((d)->uracu, 0xd8 + (i) * 4, &(reg))
#define I10NM_GET_DIMMMTR(m, i, j) \
- (*(u32 *)((m)->mbase + 0x2080c + (i) * 0x4000 + (j) * 4))
+ readl((m)->mbase + 0x2080c + (i) * (m)->chan_mmio_sz + (j) * 4)
#define I10NM_GET_MCDDRTCFG(m, i, j) \
- (*(u32 *)((m)->mbase + 0x20970 + (i) * 0x4000 + (j) * 4))
+ readl((m)->mbase + 0x20970 + (i) * (m)->chan_mmio_sz + (j) * 4)
+#define I10NM_GET_MCMTR(m, i) \
+ readl((m)->mbase + 0x20ef8 + (i) * (m)->chan_mmio_sz)
+#define I10NM_GET_AMAP(m, i) \
+ readl((m)->mbase + 0x20814 + (i) * (m)->chan_mmio_sz)
#define I10NM_GET_SCK_MMIO_BASE(reg) (GET_BITFIELD(reg, 0, 28) << 23)
#define I10NM_GET_IMC_MMIO_OFFSET(reg) (GET_BITFIELD(reg, 0, 10) << 12)
@@ -126,12 +131,22 @@ static struct res_config i10nm_cfg0 = {
.type = I10NM,
.decs_did = 0x3452,
.busno_cfg_offset = 0xcc,
+ .ddr_chan_mmio_sz = 0x4000,
};
static struct res_config i10nm_cfg1 = {
.type = I10NM,
.decs_did = 0x3452,
.busno_cfg_offset = 0xd0,
+ .ddr_chan_mmio_sz = 0x4000,
+};
+
+static struct res_config spr_cfg = {
+ .type = SPR,
+ .decs_did = 0x3252,
+ .busno_cfg_offset = 0xd0,
+ .ddr_chan_mmio_sz = 0x8000,
+ .support_ddr5 = true,
};
static const struct x86_cpu_id i10nm_cpuids[] = {
@@ -140,6 +155,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = {
X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_X, X86_STEPPINGS(0x0, 0x3), &i10nm_cfg0),
X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_X, X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),
X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_D, X86_STEPPINGS(0x0, 0xf), &i10nm_cfg1),
+ X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X, X86_STEPPINGS(0x0, 0xf), &spr_cfg),
{}
};
MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);
@@ -148,18 +164,19 @@ static bool i10nm_check_ecc(struct skx_imc *imc, int chan)
{
u32 mcmtr;
- mcmtr = *(u32 *)(imc->mbase + 0x20ef8 + chan * 0x4000);
+ mcmtr = I10NM_GET_MCMTR(imc, chan);
edac_dbg(1, "ch%d mcmtr reg %x\n", chan, mcmtr);
return !!GET_BITFIELD(mcmtr, 2, 2);
}
-static int i10nm_get_dimm_config(struct mem_ctl_info *mci)
+static int i10nm_get_dimm_config(struct mem_ctl_info *mci,
+ struct res_config *cfg)
{
struct skx_pvt *pvt = mci->pvt_info;
struct skx_imc *imc = pvt->imc;
+ u32 mtr, amap, mcddrtcfg;
struct dimm_info *dimm;
- u32 mtr, mcddrtcfg;
int i, j, ndimms;
for (i = 0; i < I10NM_NUM_CHANNELS; i++) {
@@ -167,6 +184,7 @@ static int i10nm_get_dimm_config(struct mem_ctl_info *mci)
continue;
ndimms = 0;
+ amap = I10NM_GET_AMAP(imc, i);
for (j = 0; j < I10NM_NUM_DIMMS; j++) {
dimm = edac_get_dimm(mci, i, j, 0);
mtr = I10NM_GET_DIMMMTR(imc, i, j);
@@ -175,8 +193,8 @@ static int i10nm_get_dimm_config(struct mem_ctl_info *mci)
mtr, mcddrtcfg, imc->mc, i, j);
if (IS_DIMM_PRESENT(mtr))
- ndimms += skx_get_dimm_info(mtr, 0, 0, dimm,
- imc, i, j);
+ ndimms += skx_get_dimm_info(mtr, 0, amap, dimm,
+ imc, i, j, cfg);
else if (IS_NVDIMM_PRESENT(mcddrtcfg, j))
ndimms += skx_get_nvdimm_info(dimm, imc, i, j,
EDAC_MOD_STR);
@@ -300,10 +318,11 @@ static int __init i10nm_init(void)
d->imc[i].lmc = i;
d->imc[i].src_id = src_id;
d->imc[i].node_id = node_id;
+ d->imc[i].chan_mmio_sz = cfg->ddr_chan_mmio_sz;
rc = skx_register_mci(&d->imc[i], d->imc[i].mdev,
"Intel_10nm Socket", EDAC_MOD_STR,
- i10nm_get_dimm_config);
+ i10nm_get_dimm_config, cfg);
if (rc < 0)
goto fail;
}
diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c
index 5c1eea96230c..9065bc4386ff 100644
--- a/drivers/edac/i3000_edac.c
+++ b/drivers/edac/i3000_edac.c
@@ -273,7 +273,6 @@ static void i3000_check(struct mem_ctl_info *mci)
{
struct i3000_error_info info;
- edac_dbg(1, "MC%d\n", mci->mc_idx);
i3000_get_error_info(mci, &info);
i3000_process_error_info(mci, &info, 1);
}
diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c
index a8988db6d423..afccdebf5ac1 100644
--- a/drivers/edac/i3200_edac.c
+++ b/drivers/edac/i3200_edac.c
@@ -253,7 +253,6 @@ static void i3200_check(struct mem_ctl_info *mci)
{
struct i3200_error_info info;
- edac_dbg(1, "MC%d\n", mci->mc_idx);
i3200_get_and_clear_error_info(mci, &info);
i3200_process_error_info(mci, &info);
}
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index 1a6f69c859ab..ba46057d4220 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -765,7 +765,7 @@ static void i5000_clear_error(struct mem_ctl_info *mci)
static void i5000_check_error(struct mem_ctl_info *mci)
{
struct i5000_error_info info;
- edac_dbg(4, "MC%d\n", mci->mc_idx);
+
i5000_get_error_info(mci, &info);
i5000_process_error_info(mci, &info, 1);
}
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
index 92d63eb533ae..f76624ee82ef 100644
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -686,7 +686,7 @@ static void i5400_clear_error(struct mem_ctl_info *mci)
static void i5400_check_error(struct mem_ctl_info *mci)
{
struct i5400_error_info info;
- edac_dbg(4, "MC%d\n", mci->mc_idx);
+
i5400_get_error_info(mci, &info);
i5400_process_error_info(mci, &info);
}
diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c
index a2ca929e2168..933dcf3cfdff 100644
--- a/drivers/edac/i82443bxgx_edac.c
+++ b/drivers/edac/i82443bxgx_edac.c
@@ -176,7 +176,6 @@ static void i82443bxgx_edacmc_check(struct mem_ctl_info *mci)
{
struct i82443bxgx_edacmc_error_info info;
- edac_dbg(1, "MC%d\n", mci->mc_idx);
i82443bxgx_edacmc_get_error_info(mci, &info);
i82443bxgx_edacmc_process_error_info(mci, &info, 1);
}
diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c
index 3e3a80ffb322..fbec90d00f1e 100644
--- a/drivers/edac/i82860_edac.c
+++ b/drivers/edac/i82860_edac.c
@@ -135,7 +135,6 @@ static void i82860_check(struct mem_ctl_info *mci)
{
struct i82860_error_info info;
- edac_dbg(1, "MC%d\n", mci->mc_idx);
i82860_get_error_info(mci, &info);
i82860_process_error_info(mci, &info, 1);
}
diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c
index ceac925af38c..553880b9fc12 100644
--- a/drivers/edac/i82875p_edac.c
+++ b/drivers/edac/i82875p_edac.c
@@ -262,7 +262,6 @@ static void i82875p_check(struct mem_ctl_info *mci)
{
struct i82875p_error_info info;
- edac_dbg(1, "MC%d\n", mci->mc_idx);
i82875p_get_error_info(mci, &info);
i82875p_process_error_info(mci, &info, 1);
}
diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c
index 6be99e0d850d..d99f005832cf 100644
--- a/drivers/edac/i82975x_edac.c
+++ b/drivers/edac/i82975x_edac.c
@@ -330,7 +330,6 @@ static void i82975x_check(struct mem_ctl_info *mci)
{
struct i82975x_error_info info;
- edac_dbg(1, "MC%d\n", mci->mc_idx);
i82975x_get_error_info(mci, &info);
i82975x_process_error_info(mci, &info, 1);
}
diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c
index c47963240b65..9a9ff5ad611a 100644
--- a/drivers/edac/ie31200_edac.c
+++ b/drivers/edac/ie31200_edac.c
@@ -333,7 +333,6 @@ static void ie31200_check(struct mem_ctl_info *mci)
{
struct ie31200_error_info info;
- edac_dbg(1, "MC%d\n", mci->mc_idx);
ie31200_get_and_clear_error_info(mci, &info);
ie31200_process_error_info(mci, &info);
}
diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c
deleted file mode 100644
index 3c68bb525d5d..000000000000
--- a/drivers/edac/mv64x60_edac.c
+++ /dev/null
@@ -1,883 +0,0 @@
-/*
- * Marvell MV64x60 Memory Controller kernel module for PPC platforms
- *
- * Author: Dave Jiang <djiang@mvista.com>
- *
- * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/edac.h>
-#include <linux/gfp.h>
-
-#include "edac_module.h"
-#include "mv64x60_edac.h"
-
-static const char *mv64x60_ctl_name = "MV64x60";
-static int edac_dev_idx;
-static int edac_pci_idx;
-static int edac_mc_idx;
-
-/*********************** PCI err device **********************************/
-#ifdef CONFIG_PCI
-static void mv64x60_pci_check(struct edac_pci_ctl_info *pci)
-{
- struct mv64x60_pci_pdata *pdata = pci->pvt_info;
- u32 cause;
-
- cause = readl(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
- if (!cause)
- return;
-
- printk(KERN_ERR "Error in PCI %d Interface\n", pdata->pci_hose);
- printk(KERN_ERR "Cause register: 0x%08x\n", cause);
- printk(KERN_ERR "Address Low: 0x%08x\n",
- readl(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_LO));
- printk(KERN_ERR "Address High: 0x%08x\n",
- readl(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_HI));
- printk(KERN_ERR "Attribute: 0x%08x\n",
- readl(pdata->pci_vbase + MV64X60_PCI_ERROR_ATTR));
- printk(KERN_ERR "Command: 0x%08x\n",
- readl(pdata->pci_vbase + MV64X60_PCI_ERROR_CMD));
- writel(~cause, pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
-
- if (cause & MV64X60_PCI_PE_MASK)
- edac_pci_handle_pe(pci, pci->ctl_name);
-
- if (!(cause & MV64X60_PCI_PE_MASK))
- edac_pci_handle_npe(pci, pci->ctl_name);
-}
-
-static irqreturn_t mv64x60_pci_isr(int irq, void *dev_id)
-{
- struct edac_pci_ctl_info *pci = dev_id;
- struct mv64x60_pci_pdata *pdata = pci->pvt_info;
- u32 val;
-
- val = readl(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
- if (!val)
- return IRQ_NONE;
-
- mv64x60_pci_check(pci);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Bit 0 of MV64x60_PCIx_ERR_MASK does not exist on the 64360 and because of
- * errata FEr-#11 and FEr-##16 for the 64460, it should be 0 on that chip as
- * well. IOW, don't set bit 0.
- */
-
-/* Erratum FEr PCI-#16: clear bit 0 of PCI SERRn Mask reg. */
-static int __init mv64x60_pci_fixup(struct platform_device *pdev)
-{
- struct resource *r;
- void __iomem *pci_serr;
-
- r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- if (!r) {
- printk(KERN_ERR "%s: Unable to get resource for "
- "PCI err regs\n", __func__);
- return -ENOENT;
- }
-
- pci_serr = ioremap(r->start, resource_size(r));
- if (!pci_serr)
- return -ENOMEM;
-
- writel(readl(pci_serr) & ~0x1, pci_serr);
- iounmap(pci_serr);
-
- return 0;
-}
-
-static int mv64x60_pci_err_probe(struct platform_device *pdev)
-{
- struct edac_pci_ctl_info *pci;
- struct mv64x60_pci_pdata *pdata;
- struct resource *r;
- int res = 0;
-
- if (!devres_open_group(&pdev->dev, mv64x60_pci_err_probe, GFP_KERNEL))
- return -ENOMEM;
-
- pci = edac_pci_alloc_ctl_info(sizeof(*pdata), "mv64x60_pci_err");
- if (!pci)
- return -ENOMEM;
-
- pdata = pci->pvt_info;
-
- pdata->pci_hose = pdev->id;
- pdata->name = "mv64x60_pci_err";
- platform_set_drvdata(pdev, pci);
- pci->dev = &pdev->dev;
- pci->dev_name = dev_name(&pdev->dev);
- pci->mod_name = EDAC_MOD_STR;
- pci->ctl_name = pdata->name;
-
- if (edac_op_state == EDAC_OPSTATE_POLL)
- pci->edac_check = mv64x60_pci_check;
-
- pdata->edac_idx = edac_pci_idx++;
-
- r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!r) {
- printk(KERN_ERR "%s: Unable to get resource for "
- "PCI err regs\n", __func__);
- res = -ENOENT;
- goto err;
- }
-
- if (!devm_request_mem_region(&pdev->dev,
- r->start,
- resource_size(r),
- pdata->name)) {
- printk(KERN_ERR "%s: Error while requesting mem region\n",
- __func__);
- res = -EBUSY;
- goto err;
- }
-
- pdata->pci_vbase = devm_ioremap(&pdev->dev,
- r->start,
- resource_size(r));
- if (!pdata->pci_vbase) {
- printk(KERN_ERR "%s: Unable to setup PCI err regs\n", __func__);
- res = -ENOMEM;
- goto err;
- }
-
- res = mv64x60_pci_fixup(pdev);
- if (res < 0) {
- printk(KERN_ERR "%s: PCI fixup failed\n", __func__);
- goto err;
- }
-
- writel(0, pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
- writel(0, pdata->pci_vbase + MV64X60_PCI_ERROR_MASK);
- writel(MV64X60_PCIx_ERR_MASK_VAL,
- pdata->pci_vbase + MV64X60_PCI_ERROR_MASK);
-
- if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
- edac_dbg(3, "failed edac_pci_add_device()\n");
- goto err;
- }
-
- if (edac_op_state == EDAC_OPSTATE_INT) {
- pdata->irq = platform_get_irq(pdev, 0);
- res = devm_request_irq(&pdev->dev,
- pdata->irq,
- mv64x60_pci_isr,
- 0,
- "[EDAC] PCI err",
- pci);
- if (res < 0) {
- printk(KERN_ERR "%s: Unable to request irq %d for "
- "MV64x60 PCI ERR\n", __func__, pdata->irq);
- res = -ENODEV;
- goto err2;
- }
- printk(KERN_INFO EDAC_MOD_STR " acquired irq %d for PCI Err\n",
- pdata->irq);
- }
-
- devres_remove_group(&pdev->dev, mv64x60_pci_err_probe);
-
- /* get this far and it's successful */
- edac_dbg(3, "success\n");
-
- return 0;
-
-err2:
- edac_pci_del_device(&pdev->dev);
-err:
- edac_pci_free_ctl_info(pci);
- devres_release_group(&pdev->dev, mv64x60_pci_err_probe);
- return res;
-}
-
-static int mv64x60_pci_err_remove(struct platform_device *pdev)
-{
- struct edac_pci_ctl_info *pci = platform_get_drvdata(pdev);
-
- edac_dbg(0, "\n");
-
- edac_pci_del_device(&pdev->dev);
-
- edac_pci_free_ctl_info(pci);
-
- return 0;
-}
-
-static struct platform_driver mv64x60_pci_err_driver = {
- .probe = mv64x60_pci_err_probe,
- .remove = mv64x60_pci_err_remove,
- .driver = {
- .name = "mv64x60_pci_err",
- }
-};
-
-#endif /* CONFIG_PCI */
-
-/*********************** SRAM err device **********************************/
-static void mv64x60_sram_check(struct edac_device_ctl_info *edac_dev)
-{
- struct mv64x60_sram_pdata *pdata = edac_dev->pvt_info;
- u32 cause;
-
- cause = readl(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
- if (!cause)
- return;
-
- printk(KERN_ERR "Error in internal SRAM\n");
- printk(KERN_ERR "Cause register: 0x%08x\n", cause);
- printk(KERN_ERR "Address Low: 0x%08x\n",
- readl(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_LO));
- printk(KERN_ERR "Address High: 0x%08x\n",
- readl(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_HI));
- printk(KERN_ERR "Data Low: 0x%08x\n",
- readl(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_LO));
- printk(KERN_ERR "Data High: 0x%08x\n",
- readl(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_HI));
- printk(KERN_ERR "Parity: 0x%08x\n",
- readl(pdata->sram_vbase + MV64X60_SRAM_ERR_PARITY));
- writel(0, pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
-
- edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);
-}
-
-static irqreturn_t mv64x60_sram_isr(int irq, void *dev_id)
-{
- struct edac_device_ctl_info *edac_dev = dev_id;
- struct mv64x60_sram_pdata *pdata = edac_dev->pvt_info;
- u32 cause;
-
- cause = readl(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
- if (!cause)
- return IRQ_NONE;
-
- mv64x60_sram_check(edac_dev);
-
- return IRQ_HANDLED;
-}
-
-static int mv64x60_sram_err_probe(struct platform_device *pdev)
-{
- struct edac_device_ctl_info *edac_dev;
- struct mv64x60_sram_pdata *pdata;
- struct resource *r;
- int res = 0;
-
- if (!devres_open_group(&pdev->dev, mv64x60_sram_err_probe, GFP_KERNEL))
- return -ENOMEM;
-
- edac_dev = edac_device_alloc_ctl_info(sizeof(*pdata),
- "sram", 1, NULL, 0, 0, NULL, 0,
- edac_dev_idx);
- if (!edac_dev) {
- devres_release_group(&pdev->dev, mv64x60_sram_err_probe);
- return -ENOMEM;
- }
-
- pdata = edac_dev->pvt_info;
- pdata->name = "mv64x60_sram_err";
- edac_dev->dev = &pdev->dev;
- platform_set_drvdata(pdev, edac_dev);
- edac_dev->dev_name = dev_name(&pdev->dev);
-
- r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!r) {
- printk(KERN_ERR "%s: Unable to get resource for "
- "SRAM err regs\n", __func__);
- res = -ENOENT;
- goto err;
- }
-
- if (!devm_request_mem_region(&pdev->dev,
- r->start,
- resource_size(r),
- pdata->name)) {
- printk(KERN_ERR "%s: Error while request mem region\n",
- __func__);
- res = -EBUSY;
- goto err;
- }
-
- pdata->sram_vbase = devm_ioremap(&pdev->dev,
- r->start,
- resource_size(r));
- if (!pdata->sram_vbase) {
- printk(KERN_ERR "%s: Unable to setup SRAM err regs\n",
- __func__);
- res = -ENOMEM;
- goto err;
- }
-
- /* setup SRAM err registers */
- writel(0, pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
-
- edac_dev->mod_name = EDAC_MOD_STR;
- edac_dev->ctl_name = pdata->name;
-
- if (edac_op_state == EDAC_OPSTATE_POLL)
- edac_dev->edac_check = mv64x60_sram_check;
-
- pdata->edac_idx = edac_dev_idx++;
-
- if (edac_device_add_device(edac_dev) > 0) {
- edac_dbg(3, "failed edac_device_add_device()\n");
- goto err;
- }
-
- if (edac_op_state == EDAC_OPSTATE_INT) {
- pdata->irq = platform_get_irq(pdev, 0);
- res = devm_request_irq(&pdev->dev,
- pdata->irq,
- mv64x60_sram_isr,
- 0,
- "[EDAC] SRAM err",
- edac_dev);
- if (res < 0) {
- printk(KERN_ERR
- "%s: Unable to request irq %d for "
- "MV64x60 SRAM ERR\n", __func__, pdata->irq);
- res = -ENODEV;
- goto err2;
- }
-
- printk(KERN_INFO EDAC_MOD_STR " acquired irq %d for SRAM Err\n",
- pdata->irq);
- }
-
- devres_remove_group(&pdev->dev, mv64x60_sram_err_probe);
-
- /* get this far and it's successful */
- edac_dbg(3, "success\n");
-
- return 0;
-
-err2:
- edac_device_del_device(&pdev->dev);
-err:
- devres_release_group(&pdev->dev, mv64x60_sram_err_probe);
- edac_device_free_ctl_info(edac_dev);
- return res;
-}
-
-static int mv64x60_sram_err_remove(struct platform_device *pdev)
-{
- struct edac_device_ctl_info *edac_dev = platform_get_drvdata(pdev);
-
- edac_dbg(0, "\n");
-
- edac_device_del_device(&pdev->dev);
- edac_device_free_ctl_info(edac_dev);
-
- return 0;
-}
-
-static struct platform_driver mv64x60_sram_err_driver = {
- .probe = mv64x60_sram_err_probe,
- .remove = mv64x60_sram_err_remove,
- .driver = {
- .name = "mv64x60_sram_err",
- }
-};
-
-/*********************** CPU err device **********************************/
-static void mv64x60_cpu_check(struct edac_device_ctl_info *edac_dev)
-{
- struct mv64x60_cpu_pdata *pdata = edac_dev->pvt_info;
- u32 cause;
-
- cause = readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) &
- MV64x60_CPU_CAUSE_MASK;
- if (!cause)
- return;
-
- printk(KERN_ERR "Error on CPU interface\n");
- printk(KERN_ERR "Cause register: 0x%08x\n", cause);
- printk(KERN_ERR "Address Low: 0x%08x\n",
- readl(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_LO));
- printk(KERN_ERR "Address High: 0x%08x\n",
- readl(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_HI));
- printk(KERN_ERR "Data Low: 0x%08x\n",
- readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_LO));
- printk(KERN_ERR "Data High: 0x%08x\n",
- readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_HI));
- printk(KERN_ERR "Parity: 0x%08x\n",
- readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_PARITY));
- writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE);
-
- edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);
-}
-
-static irqreturn_t mv64x60_cpu_isr(int irq, void *dev_id)
-{
- struct edac_device_ctl_info *edac_dev = dev_id;
- struct mv64x60_cpu_pdata *pdata = edac_dev->pvt_info;
- u32 cause;
-
- cause = readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) &
- MV64x60_CPU_CAUSE_MASK;
- if (!cause)
- return IRQ_NONE;
-
- mv64x60_cpu_check(edac_dev);
-
- return IRQ_HANDLED;
-}
-
-static int mv64x60_cpu_err_probe(struct platform_device *pdev)
-{
- struct edac_device_ctl_info *edac_dev;
- struct resource *r;
- struct mv64x60_cpu_pdata *pdata;
- int res = 0;
-
- if (!devres_open_group(&pdev->dev, mv64x60_cpu_err_probe, GFP_KERNEL))
- return -ENOMEM;
-
- edac_dev = edac_device_alloc_ctl_info(sizeof(*pdata),
- "cpu", 1, NULL, 0, 0, NULL, 0,
- edac_dev_idx);
- if (!edac_dev) {
- devres_release_group(&pdev->dev, mv64x60_cpu_err_probe);
- return -ENOMEM;
- }
-
- pdata = edac_dev->pvt_info;
- pdata->name = "mv64x60_cpu_err";
- edac_dev->dev = &pdev->dev;
- platform_set_drvdata(pdev, edac_dev);
- edac_dev->dev_name = dev_name(&pdev->dev);
-
- r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!r) {
- printk(KERN_ERR "%s: Unable to get resource for "
- "CPU err regs\n", __func__);
- res = -ENOENT;
- goto err;
- }
-
- if (!devm_request_mem_region(&pdev->dev,
- r->start,
- resource_size(r),
- pdata->name)) {
- printk(KERN_ERR "%s: Error while requesting mem region\n",
- __func__);
- res = -EBUSY;
- goto err;
- }
-
- pdata->cpu_vbase[0] = devm_ioremap(&pdev->dev,
- r->start,
- resource_size(r));
- if (!pdata->cpu_vbase[0]) {
- printk(KERN_ERR "%s: Unable to setup CPU err regs\n", __func__);
- res = -ENOMEM;
- goto err;
- }
-
- r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- if (!r) {
- printk(KERN_ERR "%s: Unable to get resource for "
- "CPU err regs\n", __func__);
- res = -ENOENT;
- goto err;
- }
-
- if (!devm_request_mem_region(&pdev->dev,
- r->start,
- resource_size(r),
- pdata->name)) {
- printk(KERN_ERR "%s: Error while requesting mem region\n",
- __func__);
- res = -EBUSY;
- goto err;
- }
-
- pdata->cpu_vbase[1] = devm_ioremap(&pdev->dev,
- r->start,
- resource_size(r));
- if (!pdata->cpu_vbase[1]) {
- printk(KERN_ERR "%s: Unable to setup CPU err regs\n", __func__);
- res = -ENOMEM;
- goto err;
- }
-
- /* setup CPU err registers */
- writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE);
- writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK);
- writel(0x000000ff, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK);
-
- edac_dev->mod_name = EDAC_MOD_STR;
- edac_dev->ctl_name = pdata->name;
- if (edac_op_state == EDAC_OPSTATE_POLL)
- edac_dev->edac_check = mv64x60_cpu_check;
-
- pdata->edac_idx = edac_dev_idx++;
-
- if (edac_device_add_device(edac_dev) > 0) {
- edac_dbg(3, "failed edac_device_add_device()\n");
- goto err;
- }
-
- if (edac_op_state == EDAC_OPSTATE_INT) {
- pdata->irq = platform_get_irq(pdev, 0);
- res = devm_request_irq(&pdev->dev,
- pdata->irq,
- mv64x60_cpu_isr,
- 0,
- "[EDAC] CPU err",
- edac_dev);
- if (res < 0) {
- printk(KERN_ERR
- "%s: Unable to request irq %d for MV64x60 "
- "CPU ERR\n", __func__, pdata->irq);
- res = -ENODEV;
- goto err2;
- }
-
- printk(KERN_INFO EDAC_MOD_STR
- " acquired irq %d for CPU Err\n", pdata->irq);
- }
-
- devres_remove_group(&pdev->dev, mv64x60_cpu_err_probe);
-
- /* get this far and it's successful */
- edac_dbg(3, "success\n");
-
- return 0;
-
-err2:
- edac_device_del_device(&pdev->dev);
-err:
- devres_release_group(&pdev->dev, mv64x60_cpu_err_probe);
- edac_device_free_ctl_info(edac_dev);
- return res;
-}
-
-static int mv64x60_cpu_err_remove(struct platform_device *pdev)
-{
- struct edac_device_ctl_info *edac_dev = platform_get_drvdata(pdev);
-
- edac_dbg(0, "\n");
-
- edac_device_del_device(&pdev->dev);
- edac_device_free_ctl_info(edac_dev);
- return 0;
-}
-
-static struct platform_driver mv64x60_cpu_err_driver = {
- .probe = mv64x60_cpu_err_probe,
- .remove = mv64x60_cpu_err_remove,
- .driver = {
- .name = "mv64x60_cpu_err",
- }
-};
-
-/*********************** DRAM err device **********************************/
-
-static void mv64x60_mc_check(struct mem_ctl_info *mci)
-{
- struct mv64x60_mc_pdata *pdata = mci->pvt_info;
- u32 reg;
- u32 err_addr;
- u32 sdram_ecc;
- u32 comp_ecc;
- u32 syndrome;
-
- reg = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
- if (!reg)
- return;
-
- err_addr = reg & ~0x3;
- sdram_ecc = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_RCVD);
- comp_ecc = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CALC);
- syndrome = sdram_ecc ^ comp_ecc;
-
- /* first bit clear in ECC Err Reg, 1 bit error, correctable by HW */
- if (!(reg & 0x1))
- edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
- err_addr >> PAGE_SHIFT,
- err_addr & PAGE_MASK, syndrome,
- 0, 0, -1,
- mci->ctl_name, "");
- else /* 2 bit error, UE */
- edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
- err_addr >> PAGE_SHIFT,
- err_addr & PAGE_MASK, 0,
- 0, 0, -1,
- mci->ctl_name, "");
-
- /* clear the error */
- writel(0, pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
-}
-
-static irqreturn_t mv64x60_mc_isr(int irq, void *dev_id)
-{
- struct mem_ctl_info *mci = dev_id;
- struct mv64x60_mc_pdata *pdata = mci->pvt_info;
- u32 reg;
-
- reg = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
- if (!reg)
- return IRQ_NONE;
-
- /* writing 0's to the ECC err addr in check function clears irq */
- mv64x60_mc_check(mci);
-
- return IRQ_HANDLED;
-}
-
-static void get_total_mem(struct mv64x60_mc_pdata *pdata)
-{
- struct device_node *np = NULL;
- const unsigned int *reg;
-
- np = of_find_node_by_type(NULL, "memory");
- if (!np)
- return;
-
- reg = of_get_property(np, "reg", NULL);
-
- pdata->total_mem = reg[1];
-}
-
-static void mv64x60_init_csrows(struct mem_ctl_info *mci,
- struct mv64x60_mc_pdata *pdata)
-{
- struct csrow_info *csrow;
- struct dimm_info *dimm;
-
- u32 devtype;
- u32 ctl;
-
- get_total_mem(pdata);
-
- ctl = readl(pdata->mc_vbase + MV64X60_SDRAM_CONFIG);
-
- csrow = mci->csrows[0];
- dimm = csrow->channels[0]->dimm;
-
- dimm->nr_pages = pdata->total_mem >> PAGE_SHIFT;
- dimm->grain = 8;
-
- dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR;
-
- devtype = (ctl >> 20) & 0x3;
- switch (devtype) {
- case 0x0:
- dimm->dtype = DEV_X32;
- break;
- case 0x2: /* could be X8 too, but no way to tell */
- dimm->dtype = DEV_X16;
- break;
- case 0x3:
- dimm->dtype = DEV_X4;
- break;
- default:
- dimm->dtype = DEV_UNKNOWN;
- break;
- }
-
- dimm->edac_mode = EDAC_SECDED;
-}
-
-static int mv64x60_mc_err_probe(struct platform_device *pdev)
-{
- struct mem_ctl_info *mci;
- struct edac_mc_layer layers[2];
- struct mv64x60_mc_pdata *pdata;
- struct resource *r;
- u32 ctl;
- int res = 0;
-
- if (!devres_open_group(&pdev->dev, mv64x60_mc_err_probe, GFP_KERNEL))
- return -ENOMEM;
-
- layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
- layers[0].size = 1;
- layers[0].is_virt_csrow = true;
- layers[1].type = EDAC_MC_LAYER_CHANNEL;
- layers[1].size = 1;
- layers[1].is_virt_csrow = false;
- mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers,
- sizeof(struct mv64x60_mc_pdata));
- if (!mci) {
- printk(KERN_ERR "%s: No memory for CPU err\n", __func__);
- devres_release_group(&pdev->dev, mv64x60_mc_err_probe);
- return -ENOMEM;
- }
-
- pdata = mci->pvt_info;
- mci->pdev = &pdev->dev;
- platform_set_drvdata(pdev, mci);
- pdata->name = "mv64x60_mc_err";
- mci->dev_name = dev_name(&pdev->dev);
- pdata->edac_idx = edac_mc_idx++;
-
- r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!r) {
- printk(KERN_ERR "%s: Unable to get resource for "
- "MC err regs\n", __func__);
- res = -ENOENT;
- goto err;
- }
-
- if (!devm_request_mem_region(&pdev->dev,
- r->start,
- resource_size(r),
- pdata->name)) {
- printk(KERN_ERR "%s: Error while requesting mem region\n",
- __func__);
- res = -EBUSY;
- goto err;
- }
-
- pdata->mc_vbase = devm_ioremap(&pdev->dev,
- r->start,
- resource_size(r));
- if (!pdata->mc_vbase) {
- printk(KERN_ERR "%s: Unable to setup MC err regs\n", __func__);
- res = -ENOMEM;
- goto err;
- }
-
- ctl = readl(pdata->mc_vbase + MV64X60_SDRAM_CONFIG);
- if (!(ctl & MV64X60_SDRAM_ECC)) {
- /* Non-ECC RAM? */
- printk(KERN_WARNING "%s: No ECC DIMMs discovered\n", __func__);
- res = -ENODEV;
- goto err;
- }
-
- edac_dbg(3, "init mci\n");
- mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
- mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
- mci->edac_cap = EDAC_FLAG_SECDED;
- mci->mod_name = EDAC_MOD_STR;
- mci->ctl_name = mv64x60_ctl_name;
-
- if (edac_op_state == EDAC_OPSTATE_POLL)
- mci->edac_check = mv64x60_mc_check;
-
- mci->ctl_page_to_phys = NULL;
-
- mci->scrub_mode = SCRUB_SW_SRC;
-
- mv64x60_init_csrows(mci, pdata);
-
- /* setup MC registers */
- writel(0, pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
- ctl = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL);
- ctl = (ctl & 0xff00ffff) | 0x10000;
- writel(ctl, pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL);
-
- res = edac_mc_add_mc(mci);
- if (res) {
- edac_dbg(3, "failed edac_mc_add_mc()\n");
- goto err;
- }
-
- if (edac_op_state == EDAC_OPSTATE_INT) {
- /* acquire interrupt that reports errors */
- pdata->irq = platform_get_irq(pdev, 0);
- res = devm_request_irq(&pdev->dev,
- pdata->irq,
- mv64x60_mc_isr,
- 0,
- "[EDAC] MC err",
- mci);
- if (res < 0) {
- printk(KERN_ERR "%s: Unable to request irq %d for "
- "MV64x60 DRAM ERR\n", __func__, pdata->irq);
- res = -ENODEV;
- goto err2;
- }
-
- printk(KERN_INFO EDAC_MOD_STR " acquired irq %d for MC Err\n",
- pdata->irq);
- }
-
- /* get this far and it's successful */
- edac_dbg(3, "success\n");
-
- return 0;
-
-err2:
- edac_mc_del_mc(&pdev->dev);
-err:
- devres_release_group(&pdev->dev, mv64x60_mc_err_probe);
- edac_mc_free(mci);
- return res;
-}
-
-static int mv64x60_mc_err_remove(struct platform_device *pdev)
-{
- struct mem_ctl_info *mci = platform_get_drvdata(pdev);
-
- edac_dbg(0, "\n");
-
- edac_mc_del_mc(&pdev->dev);
- edac_mc_free(mci);
- return 0;
-}
-
-static struct platform_driver mv64x60_mc_err_driver = {
- .probe = mv64x60_mc_err_probe,
- .remove = mv64x60_mc_err_remove,
- .driver = {
- .name = "mv64x60_mc_err",
- }
-};
-
-static struct platform_driver * const drivers[] = {
- &mv64x60_mc_err_driver,
- &mv64x60_cpu_err_driver,
- &mv64x60_sram_err_driver,
-#ifdef CONFIG_PCI
- &mv64x60_pci_err_driver,
-#endif
-};
-
-static int __init mv64x60_edac_init(void)
-{
-
- printk(KERN_INFO "Marvell MV64x60 EDAC driver " MV64x60_REVISION "\n");
- printk(KERN_INFO "\t(C) 2006-2007 MontaVista Software\n");
-
- /* make sure error reporting method is sane */
- switch (edac_op_state) {
- case EDAC_OPSTATE_POLL:
- case EDAC_OPSTATE_INT:
- break;
- default:
- edac_op_state = EDAC_OPSTATE_INT;
- break;
- }
-
- return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
-}
-module_init(mv64x60_edac_init);
-
-static void __exit mv64x60_edac_exit(void)
-{
- platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
-}
-module_exit(mv64x60_edac_exit);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Montavista Software, Inc.");
-module_param(edac_op_state, int, 0444);
-MODULE_PARM_DESC(edac_op_state,
- "EDAC Error Reporting state: 0=Poll, 2=Interrupt");
diff --git a/drivers/edac/mv64x60_edac.h b/drivers/edac/mv64x60_edac.h
deleted file mode 100644
index c7f209c92a1a..000000000000
--- a/drivers/edac/mv64x60_edac.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * EDAC defs for Marvell MV64x60 bridge chip
- *
- * Author: Dave Jiang <djiang@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- */
-#ifndef _MV64X60_EDAC_H_
-#define _MV64X60_EDAC_H_
-
-#define MV64x60_REVISION " Ver: 2.0.0"
-#define EDAC_MOD_STR "MV64x60_edac"
-
-#define mv64x60_printk(level, fmt, arg...) \
- edac_printk(level, "MV64x60", fmt, ##arg)
-
-#define mv64x60_mc_printk(mci, level, fmt, arg...) \
- edac_mc_chipset_printk(mci, level, "MV64x60", fmt, ##arg)
-
-/* CPU Error Report Registers */
-#define MV64x60_CPU_ERR_ADDR_LO 0x00 /* 0x0070 */
-#define MV64x60_CPU_ERR_ADDR_HI 0x08 /* 0x0078 */
-#define MV64x60_CPU_ERR_DATA_LO 0x00 /* 0x0128 */
-#define MV64x60_CPU_ERR_DATA_HI 0x08 /* 0x0130 */
-#define MV64x60_CPU_ERR_PARITY 0x10 /* 0x0138 */
-#define MV64x60_CPU_ERR_CAUSE 0x18 /* 0x0140 */
-#define MV64x60_CPU_ERR_MASK 0x20 /* 0x0148 */
-
-#define MV64x60_CPU_CAUSE_MASK 0x07ffffff
-
-/* SRAM Error Report Registers */
-#define MV64X60_SRAM_ERR_CAUSE 0x08 /* 0x0388 */
-#define MV64X60_SRAM_ERR_ADDR_LO 0x10 /* 0x0390 */
-#define MV64X60_SRAM_ERR_ADDR_HI 0x78 /* 0x03f8 */
-#define MV64X60_SRAM_ERR_DATA_LO 0x18 /* 0x0398 */
-#define MV64X60_SRAM_ERR_DATA_HI 0x20 /* 0x03a0 */
-#define MV64X60_SRAM_ERR_PARITY 0x28 /* 0x03a8 */
-
-/* SDRAM Controller Registers */
-#define MV64X60_SDRAM_CONFIG 0x00 /* 0x1400 */
-#define MV64X60_SDRAM_ERR_DATA_HI 0x40 /* 0x1440 */
-#define MV64X60_SDRAM_ERR_DATA_LO 0x44 /* 0x1444 */
-#define MV64X60_SDRAM_ERR_ECC_RCVD 0x48 /* 0x1448 */
-#define MV64X60_SDRAM_ERR_ECC_CALC 0x4c /* 0x144c */
-#define MV64X60_SDRAM_ERR_ADDR 0x50 /* 0x1450 */
-#define MV64X60_SDRAM_ERR_ECC_CNTL 0x54 /* 0x1454 */
-#define MV64X60_SDRAM_ERR_ECC_ERR_CNT 0x58 /* 0x1458 */
-
-#define MV64X60_SDRAM_REGISTERED 0x20000
-#define MV64X60_SDRAM_ECC 0x40000
-
-#ifdef CONFIG_PCI
-/*
- * Bit 0 of MV64x60_PCIx_ERR_MASK does not exist on the 64360 and because of
- * errata FEr-#11 and FEr-##16 for the 64460, it should be 0 on that chip as
- * well. IOW, don't set bit 0.
- */
-#define MV64X60_PCIx_ERR_MASK_VAL 0x00a50c24
-
-/* Register offsets from PCIx error address low register */
-#define MV64X60_PCI_ERROR_ADDR_LO 0x00
-#define MV64X60_PCI_ERROR_ADDR_HI 0x04
-#define MV64X60_PCI_ERROR_ATTR 0x08
-#define MV64X60_PCI_ERROR_CMD 0x10
-#define MV64X60_PCI_ERROR_CAUSE 0x18
-#define MV64X60_PCI_ERROR_MASK 0x1c
-
-#define MV64X60_PCI_ERR_SWrPerr 0x0002
-#define MV64X60_PCI_ERR_SRdPerr 0x0004
-#define MV64X60_PCI_ERR_MWrPerr 0x0020
-#define MV64X60_PCI_ERR_MRdPerr 0x0040
-
-#define MV64X60_PCI_PE_MASK (MV64X60_PCI_ERR_SWrPerr | \
- MV64X60_PCI_ERR_SRdPerr | \
- MV64X60_PCI_ERR_MWrPerr | \
- MV64X60_PCI_ERR_MRdPerr)
-
-struct mv64x60_pci_pdata {
- int pci_hose;
- void __iomem *pci_vbase;
- char *name;
- int irq;
- int edac_idx;
-};
-
-#endif /* CONFIG_PCI */
-
-struct mv64x60_mc_pdata {
- void __iomem *mc_vbase;
- int total_mem;
- char *name;
- int irq;
- int edac_idx;
-};
-
-struct mv64x60_cpu_pdata {
- void __iomem *cpu_vbase[2];
- char *name;
- int irq;
- int edac_idx;
-};
-
-struct mv64x60_sram_pdata {
- void __iomem *sram_vbase;
- char *name;
- int irq;
- int edac_idx;
-};
-
-#endif
diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c
index 851e53e122aa..d0aef83dca2a 100644
--- a/drivers/edac/r82600_edac.c
+++ b/drivers/edac/r82600_edac.c
@@ -204,7 +204,6 @@ static void r82600_check(struct mem_ctl_info *mci)
{
struct r82600_error_info info;
- edac_dbg(1, "MC%d\n", mci->mc_idx);
r82600_get_error_info(mci, &info);
r82600_process_error_info(mci, &info, 1);
}
diff --git a/drivers/edac/skx_base.c b/drivers/edac/skx_base.c
index 2c7db95df326..6a4f0b27c654 100644
--- a/drivers/edac/skx_base.c
+++ b/drivers/edac/skx_base.c
@@ -174,7 +174,7 @@ static bool skx_check_ecc(u32 mcmtr)
return !!GET_BITFIELD(mcmtr, 2, 2);
}
-static int skx_get_dimm_config(struct mem_ctl_info *mci)
+static int skx_get_dimm_config(struct mem_ctl_info *mci, struct res_config *cfg)
{
struct skx_pvt *pvt = mci->pvt_info;
u32 mtr, mcmtr, amap, mcddrtcfg;
@@ -195,7 +195,7 @@ static int skx_get_dimm_config(struct mem_ctl_info *mci)
pci_read_config_dword(imc->chan[i].cdev,
0x80 + 4 * j, &mtr);
if (IS_DIMM_PRESENT(mtr)) {
- ndimms += skx_get_dimm_info(mtr, mcmtr, amap, dimm, imc, i, j);
+ ndimms += skx_get_dimm_info(mtr, mcmtr, amap, dimm, imc, i, j, cfg);
} else if (IS_NVDIMM_PRESENT(mcddrtcfg, j)) {
ndimms += skx_get_nvdimm_info(dimm, imc, i, j,
EDAC_MOD_STR);
@@ -702,7 +702,7 @@ static int __init skx_init(void)
d->imc[i].node_id = node_id;
rc = skx_register_mci(&d->imc[i], d->imc[i].chan[0].cdev,
"Skylake Socket", EDAC_MOD_STR,
- skx_get_dimm_config);
+ skx_get_dimm_config, cfg);
if (rc < 0)
goto fail;
}
diff --git a/drivers/edac/skx_common.c b/drivers/edac/skx_common.c
index 2b4ce8e5ac2f..81c3e2ec6f56 100644
--- a/drivers/edac/skx_common.c
+++ b/drivers/edac/skx_common.c
@@ -304,15 +304,25 @@ static int skx_get_dimm_attr(u32 reg, int lobit, int hibit, int add,
#define numcol(reg) skx_get_dimm_attr(reg, 0, 1, 10, 0, 2, "cols")
int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm,
- struct skx_imc *imc, int chan, int dimmno)
+ struct skx_imc *imc, int chan, int dimmno,
+ struct res_config *cfg)
{
- int banks = 16, ranks, rows, cols, npages;
+ int banks, ranks, rows, cols, npages;
+ enum mem_type mtype;
u64 size;
ranks = numrank(mtr);
rows = numrow(mtr);
cols = numcol(mtr);
+ if (cfg->support_ddr5 && (amap & 0x8)) {
+ banks = 32;
+ mtype = MEM_DDR5;
+ } else {
+ banks = 16;
+ mtype = MEM_DDR4;
+ }
+
/*
* Compute size in 8-byte (2^3) words, then shift to MiB (2^20)
*/
@@ -332,7 +342,7 @@ int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm,
dimm->nr_pages = npages;
dimm->grain = 32;
dimm->dtype = get_width(mtr);
- dimm->mtype = MEM_DDR4;
+ dimm->mtype = mtype;
dimm->edac_mode = EDAC_SECDED; /* likely better than this */
snprintf(dimm->label, sizeof(dimm->label), "CPU_SrcID#%u_MC#%u_Chan#%u_DIMM#%u",
imc->src_id, imc->lmc, chan, dimmno);
@@ -390,7 +400,8 @@ unknown_size:
int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev,
const char *ctl_name, const char *mod_str,
- get_dimm_config_f get_dimm_config)
+ get_dimm_config_f get_dimm_config,
+ struct res_config *cfg)
{
struct mem_ctl_info *mci;
struct edac_mc_layer layers[2];
@@ -425,13 +436,15 @@ int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev,
}
mci->mtype_cap = MEM_FLAG_DDR4 | MEM_FLAG_NVDIMM;
+ if (cfg->support_ddr5)
+ mci->mtype_cap |= MEM_FLAG_DDR5;
mci->edac_ctl_cap = EDAC_FLAG_NONE;
mci->edac_cap = EDAC_FLAG_NONE;
mci->mod_name = mod_str;
mci->dev_name = pci_name(pdev);
mci->ctl_page_to_phys = NULL;
- rc = get_dimm_config(mci);
+ rc = get_dimm_config(mci, cfg);
if (rc < 0)
goto fail;
diff --git a/drivers/edac/skx_common.h b/drivers/edac/skx_common.h
index 78f8c1de0b71..bf56bebff138 100644
--- a/drivers/edac/skx_common.h
+++ b/drivers/edac/skx_common.h
@@ -59,6 +59,7 @@ struct skx_dev {
struct mem_ctl_info *mci;
struct pci_dev *mdev; /* for i10nm CPU */
void __iomem *mbase; /* for i10nm CPU */
+ int chan_mmio_sz; /* for i10nm CPU */
u8 mc; /* system wide mc# */
u8 lmc; /* socket relative mc# */
u8 src_id, node_id;
@@ -82,7 +83,8 @@ struct skx_pvt {
enum type {
SKX,
- I10NM
+ I10NM,
+ SPR
};
enum {
@@ -118,9 +120,13 @@ struct res_config {
unsigned int decs_did;
/* Default bus number configuration register offset */
int busno_cfg_offset;
+ /* Per DDR channel memory-mapped I/O size */
+ int ddr_chan_mmio_sz;
+ bool support_ddr5;
};
-typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci);
+typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci,
+ struct res_config *cfg);
typedef bool (*skx_decode_f)(struct decoded_addr *res);
typedef void (*skx_show_retry_log_f)(struct decoded_addr *res, char *msg, int len);
@@ -136,14 +142,16 @@ int skx_get_all_bus_mappings(struct res_config *cfg, struct list_head **list);
int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm);
int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm,
- struct skx_imc *imc, int chan, int dimmno);
+ struct skx_imc *imc, int chan, int dimmno,
+ struct res_config *cfg);
int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc,
int chan, int dimmno, const char *mod_str);
int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev,
const char *ctl_name, const char *mod_str,
- get_dimm_config_f get_dimm_config);
+ get_dimm_config_f get_dimm_config,
+ struct res_config *cfg);
int skx_mce_check_error(struct notifier_block *nb, unsigned long val,
void *data);
diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index 12211dc040e8..7e7146b22c16 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -1344,7 +1344,8 @@ static int mc_probe(struct platform_device *pdev)
#ifdef CONFIG_EDAC_DEBUG
if (priv->p_data->quirks & DDR_ECC_DATA_POISON_SUPPORT) {
- if (edac_create_sysfs_attributes(mci)) {
+ rc = edac_create_sysfs_attributes(mci);
+ if (rc) {
edac_printk(KERN_ERR, EDAC_MC,
"Failed to create sysfs entries\n");
goto free_edac_mc;
diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c
index a65e2f78a402..49ab5721aab2 100644
--- a/drivers/edac/x38_edac.c
+++ b/drivers/edac/x38_edac.c
@@ -238,7 +238,6 @@ static void x38_check(struct mem_ctl_info *mci)
{
struct x38_error_info info;
- edac_dbg(1, "MC%d\n", mci->mc_idx);
x38_get_and_clear_error_info(mci, &info);
x38_process_error_info(mci, &info);
}