diff options
Diffstat (limited to 'drivers/net/ethernet/cavium')
| -rw-r--r-- | drivers/net/ethernet/cavium/liquidio/octeon_device.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/net/ethernet/cavium/liquidio/octeon_device.c b/drivers/net/ethernet/cavium/liquidio/octeon_device.c index ac32facaa427..fbde7c58c4db 100644 --- a/drivers/net/ethernet/cavium/liquidio/octeon_device.c +++ b/drivers/net/ethernet/cavium/liquidio/octeon_device.c @@ -1324,7 +1324,7 @@ u64 lio_pci_readq(struct octeon_device *oct, u64 addr) { u64 val64; unsigned long flags; - u32 val32, addrhi; + u32 addrhi; spin_lock_irqsave(&oct->pci_win_lock, flags); @@ -1339,10 +1339,10 @@ u64 lio_pci_readq(struct octeon_device *oct, u64 addr) writel(addrhi, oct->reg_list.pci_win_rd_addr_hi); /* Read back to preserve ordering of writes */ - val32 = readl(oct->reg_list.pci_win_rd_addr_hi); + readl(oct->reg_list.pci_win_rd_addr_hi); writel(addr & 0xffffffff, oct->reg_list.pci_win_rd_addr_lo); - val32 = readl(oct->reg_list.pci_win_rd_addr_lo); + readl(oct->reg_list.pci_win_rd_addr_lo); val64 = readq(oct->reg_list.pci_win_rd_data); @@ -1355,7 +1355,6 @@ void lio_pci_writeq(struct octeon_device *oct, u64 val, u64 addr) { - u32 val32; unsigned long flags; spin_lock_irqsave(&oct->pci_win_lock, flags); @@ -1365,7 +1364,7 @@ void lio_pci_writeq(struct octeon_device *oct, /* The write happens when the LSB is written. So write MSB first. */ writel(val >> 32, oct->reg_list.pci_win_wr_data_hi); /* Read the MSB to ensure ordering of writes. */ - val32 = readl(oct->reg_list.pci_win_wr_data_hi); + readl(oct->reg_list.pci_win_wr_data_hi); writel(val & 0xffffffff, oct->reg_list.pci_win_wr_data_lo); |