summaryrefslogtreecommitdiffstats
path: root/sound/soc/codecs/ad193x.c
diff options
context:
space:
mode:
Diffstat (limited to 'sound/soc/codecs/ad193x.c')
-rw-r--r--sound/soc/codecs/ad193x.c68
1 files changed, 45 insertions, 23 deletions
diff --git a/sound/soc/codecs/ad193x.c b/sound/soc/codecs/ad193x.c
index 05f4514048e2..80dab5df9633 100644
--- a/sound/soc/codecs/ad193x.c
+++ b/sound/soc/codecs/ad193x.c
@@ -240,10 +240,8 @@ static int ad193x_set_dai_fmt(struct snd_soc_dai *codec_dai,
}
/* For DSP_*, LRCLK's polarity must be inverted */
- if (fmt & SND_SOC_DAIFMT_DSP_A) {
- change_bit(ffs(AD193X_DAC_LEFT_HIGH) - 1,
- (unsigned long *)&dac_fmt);
- }
+ if (fmt & SND_SOC_DAIFMT_DSP_A)
+ dac_fmt ^= AD193X_DAC_LEFT_HIGH;
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBM_CFM: /* codec clk & frm master */
@@ -415,6 +413,48 @@ static struct snd_soc_dai_driver ad193x_no_adc_dai = {
.ops = &ad193x_dai_ops,
};
+struct ad193x_reg_default {
+ unsigned int reg;
+ unsigned int val;
+};
+
+/* codec register values to set after reset */
+static void ad193x_reg_default_init(struct ad193x_priv *ad193x)
+{
+ const struct ad193x_reg_default reg_init[] = {
+ { 0, 0x99 }, /* PLL_CLK_CTRL0: pll input: mclki/xi 12.288Mhz */
+ { 1, 0x04 }, /* PLL_CLK_CTRL1: no on-chip Vref */
+ { 2, 0x40 }, /* DAC_CTRL0: TDM mode */
+ { 3, 0x00 }, /* DAC_CTRL1: reset */
+ { 4, 0x1A }, /* DAC_CTRL2: 48kHz de-emphasis, unmute dac */
+ { 5, 0x00 }, /* DAC_CHNL_MUTE: unmute DAC channels */
+ { 6, 0x00 }, /* DAC_L1_VOL: no attenuation */
+ { 7, 0x00 }, /* DAC_R1_VOL: no attenuation */
+ { 8, 0x00 }, /* DAC_L2_VOL: no attenuation */
+ { 9, 0x00 }, /* DAC_R2_VOL: no attenuation */
+ { 10, 0x00 }, /* DAC_L3_VOL: no attenuation */
+ { 11, 0x00 }, /* DAC_R3_VOL: no attenuation */
+ { 12, 0x00 }, /* DAC_L4_VOL: no attenuation */
+ { 13, 0x00 }, /* DAC_R4_VOL: no attenuation */
+ };
+ const struct ad193x_reg_default reg_adc_init[] = {
+ { 14, 0x03 }, /* ADC_CTRL0: high-pass filter enable */
+ { 15, 0x43 }, /* ADC_CTRL1: sata delay=1, adc aux mode */
+ { 16, 0x00 }, /* ADC_CTRL2: reset */
+ };
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(reg_init); i++)
+ regmap_write(ad193x->regmap, reg_init[i].reg, reg_init[i].val);
+
+ if (ad193x_has_adc(ad193x)) {
+ for (i = 0; i < ARRAY_SIZE(reg_adc_init); i++) {
+ regmap_write(ad193x->regmap, reg_adc_init[i].reg,
+ reg_adc_init[i].val);
+ }
+ }
+}
+
static int ad193x_component_probe(struct snd_soc_component *component)
{
struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(component);
@@ -422,25 +462,7 @@ static int ad193x_component_probe(struct snd_soc_component *component)
int num, ret;
/* default setting for ad193x */
-
- /* unmute dac channels */
- regmap_write(ad193x->regmap, AD193X_DAC_CHNL_MUTE, 0x0);
- /* de-emphasis: 48kHz, powedown dac */
- regmap_write(ad193x->regmap, AD193X_DAC_CTRL2, 0x1A);
- /* dac in tdm mode */
- regmap_write(ad193x->regmap, AD193X_DAC_CTRL0, 0x40);
-
- /* adc only */
- if (ad193x_has_adc(ad193x)) {
- /* high-pass filter enable */
- regmap_write(ad193x->regmap, AD193X_ADC_CTRL0, 0x3);
- /* sata delay=1, adc aux mode */
- regmap_write(ad193x->regmap, AD193X_ADC_CTRL1, 0x43);
- }
-
- /* pll input: mclki/xi */
- regmap_write(ad193x->regmap, AD193X_PLL_CLK_CTRL0, 0x99); /* mclk=24.576Mhz: 0x9D; mclk=12.288Mhz: 0x99 */
- regmap_write(ad193x->regmap, AD193X_PLL_CLK_CTRL1, 0x04);
+ ad193x_reg_default_init(ad193x);
/* adc only */
if (ad193x_has_adc(ad193x)) {