summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* spi/spi-atmel: BUG: fix doesn' support 16 bits transfers using PIORichard Genoud2013-05-021-9/+38
| | | | | | | | | Fix using PIO transfer mode only support 8 bits transfer, doesn't support 16 bits. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi-topcliff-pch: fix to use list_for_each_entry_safe() when delete list itemsWei Yongjun2013-04-281-6/+6
| | | | | | | | | Since we will remove items off the list using list_del_init() we need to use a safe version of the list_for_each_entry() macro aptly named list_for_each_entry_safe(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@sirena.org.uk>
* spi-topcliff-pch: missing platform_driver_unregister() on error in ↵Wei Yongjun2013-04-251-1/+3
| | | | | | | | | | pch_spi_init() Add the missing platform_driver_unregister() before return from pch_spi_init() in the error handling case. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* ARM: dts: add pinctrl property for spi node for atmel SoCWenyou Yang2013-04-245-0/+110
| | | | | | Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* ARM: dts: add spi nodes for the atmel boardsRichard Genoud2013-04-245-0/+50
| | | | | | | | Signed-off-by: Richard Genoud <richard.genoud@gmail.com> [wenyou.yang@atmel.com: added spi nodes for the sam9263ek, sam9g20ek, sam9m10g45ek and sam9n12ek boards] [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* ARM: dts: add spi nodes for atmel SoCRichard Genoud2013-04-245-0/+90
| | | | | | | | | Signed-off-by: Richard Genoud <richard.genoud@gmail.com> [wenyou.yang@atmel.com: add spi nodes for sam9260, sam9263, sam9g45 and sam9n12] [wenyou.yang@atmel.com: remove spi property "cs-gpios" to the board dts files] [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* ARM: at91: add clocks for spi dt entriesRichard Genoud2013-04-244-0/+8
| | | | | | | | Signed-off-by: Richard Genoud <richard.genoud@gmail.com> [<wenyou.yang@atmel.com: declare the spi clocks for sam9260, at91sam9g45, and at91sam9n12] [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi/spi-atmel: add dmaengine supportNicolas Ferre2013-04-241-21/+566
| | | | | | | | | | | | | | | | | | | | | | | | | Add dmaengine support. Using "has_dma_support" member of struct is used to select the transfer mode: dmaengine or pdc. For the dmaengine transfer mode, it supports both 8 bits and 16 bits transfer. For the dmaengine transfer mode, if it fails to config dmaengine, or if the message length is less than 16 bytes, it will use the PIO transfer mode. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> [wenyou.yang@atmel.com: using "has_dma_support" to select dmaengine as the spi xfer mode] [wenyou.yang@atmel.com: fix DMA: OOPS if buffer > 4096 bytes] [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Richard Genoud <richard.genoud@gmail.com> [richard.genoud@gmail.com: update with dmaengine interface] [richard.genoud@gmail.com: fix __init/__devinit sections mismatch] [richard.genoud@gmail.com: adapt to slave_config changes] [richard.genoud@gmail.com: add support t0 16 bits transfer] Tested-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi/spi-atmel: add flag to controller data for lock operationsNicolas Ferre2013-04-231-14/+21
| | | | | | | | | | | | | Will allow to drop the lock during DMA operations. Replacing non-irqsave versions with irqsave versions of the lock to make it correct in both pdc and dmaengine transfer mode Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi/spi-atmel: add physical base addressNicolas Ferre2013-04-231-0/+2
| | | | | | | | | | Needed for future use with dmaengine enabled driver. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi/sirf: fix MODULE_DEVICE_TABLEArnd Bergmann2013-04-231-1/+1
| | | | | | | | | This fixes building the spi-sirf driver as a loadable module, which uses an incorrect MODULE_DEVICE_TABLE, by changing the reference to the correct symbol. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* MAINTAINERS: Add git repository and update my addressMark Brown2013-04-181-1/+2
| | | | Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi/s3c64xx: Check for errors in dmaengine prepare_transfer()Mark Brown2013-04-181-1/+25
| | | | | | Don't silently ignore errors, report them. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi/s3c64xx: Fix non-dmaengine usageMark Brown2013-04-181-3/+3
| | | | | | | | | | The multiplatform conversion in commit 788437 (spi: s3c64xx: move to generic dmaengine API) tested for the use of the Samsung-specific DMA API with SAMSUNG_DMADEV when in fact S3C_DMA should be used. This renderd DMA based transfers non-functional on platforms not using dmaengine. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi: omap2-mcspi: fix error return code in omap2_mcspi_probe()Wei Yongjun2013-04-181-1/+2
| | | | | | | | Fix to return a negative error code from the error handling case instead of 0, as returned elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi/s3c64xx: let device core setup the default pin configurationThomas Abraham2013-04-162-68/+6
| | | | | | | | | | | | | With device core now able to setup the default pin configuration, the pin configuration code based on the deprecated Samsung specific gpio bindings is removed. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Grant Likely <grant.likely@linaro.org>
* MAINTAINERS: Update Grant's email address and maintainershipGrant Likely2013-04-161-12/+6
| | | | | | | | | | | | | | | I've taken a full time position with Linaro and so I'll be using my Linaro email address from this point on. It has also been many years since I've touched any of the Xilinx related code so mark those items as unmaintained. In addition, Mark Brown is taking the lead on SPI maintainership now, so I've reversed the order of our names for that entry. Signed-off-by: Grant Likely <grant.likely@linaro.org> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com>
* spi: omap2-mcspi: Fix transfers if DMADEVICES is not setTony Lindgren2013-04-151-10/+22
| | | | | | | | | | | | | | Selecting CONFIG_DMADEVICES is optional, and we must be able to continue even without DMA. Otherwise things like omap4430sdp nfsroot will fail if DMA is not selected. Note that the driver already supports PIO mode, but we fail to fall back to PIO if requesting DMA channels fails. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi: s3c64xx: move to generic dmaengine APIArnd Bergmann2013-04-123-44/+154
| | | | | | | | | | | | | | | | | | The spi-s3c64xx uses a Samsung proprietary interface for talking to the DMA engine, which does not work with multiplatform kernels. This version of the patch leaves the old code in place, behind an #ifdef. This can be removed in the future, after the s3c64xx platform start supporting the regular dmaengine interface. An earlier version of this patch was tested successfully on exynos5250 by Padma Venkat. The conversion was rather mechanical, since the samsung interface is just a shallow wrapper around the dmaengine interface. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* spi-gpio: init CS before spi_bitbang_setup()Josef Ahmad2013-04-101-1/+1
| | | | | | | | | | | | | | | | spi_bitbang_setup() deasserts the chip select line to initialise the device. The chip select GPIO line is obtained from spi_gpio->cs_gpios[] private data. Currently, devices that are not registered under devicetree environment will call into spi_bitbang_setup() with stale cs_gpios[]. This patch ensures spi_gpio->cs_gpios[] is always initialised prior to calling spi_bitbang_setup(). Reviewed-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Josef Ahmad <josef.ahmad@intel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi: spi-mpc512x-psc: let transmiter/receiver enabled when in xfer loopAnatolij Gustschin2013-04-091-7/+3
| | | | | | | | | | There is no need to disable transmitter/receiver after each loop iteration and re-enable it for next loop iteration. Enable the transmitter/receiver before xfer loop starts and disable it when the whole transfer is done. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi: spi-mpc512x-psc: add support for gpio chip selectsAnatolij Gustschin2013-04-091-6/+25
| | | | | | | | | Currently the driver only uses one internal chip select. Add support for gpio chip selects configured by cs-gpios DT binding. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi/bcm63xx: remove unused speed_hz variableJonas Gorski2013-04-083-14/+0
| | | | | | | | | speed_hz is a write only member, so we can safely remove it and its generation. Also fixes the missing clk_put after getting the periph clock. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi: tegra: slink: make local symbols staticWei Yongjun2013-04-081-2/+2
| | | | | | | | | Neither tegra20_spi_cdata nor tegra30_spi_cdata are used outside this file so they can, and should, be static. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi/pxa2xx: Convert to devm_ioremap_resource()Sachin Kamat2013-04-081-5/+4
| | | | | | | | | | | | Use the newly introduced devm_ioremap_resource() instead of devm_request_and_ioremap() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages; so all explicit error messages can be removed from the failure code paths. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi/tegra114: add spi driverLaxman Dewangan2013-04-074-0/+1281
| | | | | | | | | | | | | | | | Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller is different than the older SoCs SPI controller in internal design as well as register interface. This driver supports the: - non DMA based transfer for smaller transfer i.e. less than FIFO depth. - APB DMA based transfer for larger transfer i.e. more than FIFO depth. - Clock gating through runtime PM callbacks. - registration through DT only. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/tegra: remove unused Tegra platform data headerStephen Warren2013-04-071-40/+0
| | | | | | | The platform data header is no longer used. Delete it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/tegra-slink: assume CONFIG_OF, remove platform dataStephen Warren2013-04-071-34/+11
| | | | | | | | | | Tegra only supports, and always enables, device tree. Remove all ifdefs and runtime checks for DT support from the driver. Platform data is therefore no longer required. Rework the driver to parse the device tree directly into struct tegra_slink_data. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/tegra-sflash: assume CONFIG_OF, remove platform dataStephen Warren2013-04-071-32/+9
| | | | | | | | | | Tegra only supports, and always enables, device tree. Remove all ifdefs and runtime checks for DT support from the driver. Platform data is therefore no longer required. Rework the driver to parse the device tree directly into struct tegra_sflash_data. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/tegra-slink: remove redundant codeStephen Warren2013-04-071-31/+1
| | | | | | | | There is no code to set spi->controller_data, and hence the HW CS logic can never trigger. Remove the unused code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/spi-fsl-spi: Add support for gpio chipselects for GRLIB type coresAndreas Larsson2013-04-072-5/+46
| | | | | | | | This relies upon of_spi_register_master to find out which gpios to use. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/spi-fsl-spi: Add support for Aeroflex Gaisler GRLIB cores normally ↵Andreas Larsson2013-04-075-15/+103
| | | | | | | | | | | | | | | | | | | | running on SPARC This adds support for the mostly register-compatible SPICTRL cores from the GRLIB VHDL IP core library from Aeroflex Gaisler. They are normally running on SPARC. A different entry in of_fsl_spi_match matches this core and indicates a different hardware type that is used to set up different function pointers and special cases. The GRLIB core operates in cpu mode. The number of bits per word might be limited. There might be native chipselects selected via a slave select register. These differences to the FSL type cores, if present, are indicated by a capabilities register. Other register and function differences exists but are not relevant to the driver. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/spi-fsl-spi: Add support for setting a maximum number of bits per wordAndreas Larsson2013-04-072-1/+8
| | | | | | Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/spi-fsl-spi: Introduce a type for the driverAndreas Larsson2013-04-072-7/+34
| | | | | | | | | For being able to distinguishing between the regular type of cores and others with different entries in of_fsl_spi_match. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/spi-fsl-spi: Move setting non-zero tx and rx shifts to a function ↵Andreas Larsson2013-04-072-20/+36
| | | | | | | | accessed by a function pointer Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/spi-fsl-spi: Make sure in spi_fsl_setup that chipselect becomes inactiveAndreas Larsson2013-04-071-0/+4
| | | | | | | | | This is needed for a device in SPI_CS_HIGH mode that otherwise could start out active for the first transaction. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/spi-fsl-spi: Make driver usable in CPU mode outside of an FSL_SOC ↵Andreas Larsson2013-04-079-405/+520
| | | | | | | | | | | | | | | | environment This makes the spi-fsl-spi driver usable in CPU mode outside of an FSL_SOC and even an powerpc environment by moving CPM mode functionality to a separate file that is only compiled and linked in an FSL_SOC environment and adding some ifdefs to hide types and functions or provide alternatives. For devicetree probing a "clock-frequency" property is used for clock frequency instead of calls to FSL_SOC-specific functions. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* mxs/spi: fix error return code in mxs_spi_probe()Wei Yongjun2013-04-031-0/+1
| | | | | | | | Fix to return a negative error code from the error handling case instead of 0, as returned elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* spi: tegra: slink: do prepare dma transfer with DMA_CTRL_ACK flagMark Brown2013-04-031-2/+2
| | | | | This reverts commit faa98f7ea6c720beec8a800c9ac6975f760467e2 which was applied in error due to discussion ending up in the wrong thread.
* spi/s3c64xx: add CONFIG_PM_SLEEP to suspend/resume functionsJingoo Han2013-04-011-2/+2
| | | | | | | | | | | | | Add CONFIG_PM_SLEEP to suspend/resume functions to fix the following build warning when CONFIG_PM_SLEEP is not selected. This is because sleep PM callbacks defined by SET_SYSTEM_SLEEP_PM_OPS are only used when the CONFIG_PM_SLEEP is enabled. drivers/spi/spi-s3c64xx.c:1362:12: warning: 's3c64xx_spi_suspend' defined but not used [-Wunused-function] drivers/spi/spi-s3c64xx.c:1381:12: warning: 's3c64xx_spi_resume' defined but not used [-Wunused-function] Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* Merge branch 'spi-fix' into spi-nextMark Brown2013-04-013-25/+33
|\
| * spi/mpc512x-psc: optionally keep PSC SS asserted across xfer segmenstsAnatolij Gustschin2013-04-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SPI slave devices require asserted chip select signal across multiple transfer segments of an SPI message. Currently the driver always de-asserts the internal SS signal for every single transfer segment of the message and ignores the 'cs_change' flag of the transfer description. Disable the internal chip select (SS) only if this is needed and indicated by the 'cs_change' flag. Without this change, each partial transfer of a surrounding multi-part SPI transaction might erroneously change the SS signal, which might prevent slaves from answering the request that was sent in a previous transfer segment because the transaction could be considered aborted (SS was de-asserted before reading the response). Reported-by: Gerhard Sittig <gerhard.sittig@ifm.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
| * spi: Unlock a spinlock before calling into the controller driver.Bryan Freed2013-04-011-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_pump_messages() calls into a controller driver with unprepare_transfer_hardware() which is documented as "This may sleep". As in the prepare_transfer_hardware() call below, we should release the queue_lock spinlock before making the call. Rework the logic a bit to hold queue_lock to protect the 'busy' flag, then release it to call unprepare_transfer_hardware(). Signed-off-by: Bryan Freed <bfreed@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| * spi/s3c64xx: modified error interrupt handling and initGirish K S2013-04-011-16/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The status of the interrupt is available in the status register, so reading the clear pending register and writing back the same value will not actually clear the pending interrupts. This patch modifies the interrupt handler to read the status register and clear the corresponding pending bit in the clear pending register. Modified the hwInit function to clear all the pending interrupts. Signed-off-by: Girish K S <ks.giri@samsung.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
* | spi/spi-atmel: status information passed through controller dataNicolas Ferre2013-04-011-5/+8
| | | | | | | | | | | | | | | | | | | | The status of transfer is stored in controller data structure so that it can be used not only by atmel_spi_msg_done() function. This will be useful for upcoming dmaengine enabled driver. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* | spi/spi-atmel: call unmapping on transfers buffersNicolas Ferre2013-04-011-3/+5
| | | | | | | | | | | | Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* | spi/spi-atmel: add support transfer on CS1,2,3, not only on CS0Wenyou Yang2013-04-011-13/+12
| | | | | | | | | | | | Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* | spi/spi-atmel: detect the capabilities of SPI core by reading the VERSION ↵Wenyou Yang2013-04-011-16/+50
| | | | | | | | | | | | | | | | | | | | | | | | register. The "has_dma_support" needed for future use with dmaengine driver. [Fixed some unneded ternery operators -- broonie] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* | spi: tegra: slink: do not prepare dma transfer with DMA_CTRL_ACK flagLaxman Dewangan2013-04-011-2/+2
| | | | | | | | | | | | | | | | | | | | Spi starts transfer using dma with DMA_CTRL_ACK which is not require becasue spi driver does not use completed dma_desc after transfer done and so it does not ack the dma descriptor. Removing the DMA_CTRL_ACK flag to avoid memory leak in dma driver. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* | spi/spidev: Use PTR_RET functionAlexandru Gheorghiu2013-04-011-1/+1
| | | | | | | | | | | | | | | | Replaced calls to IS_ERR and PTR_ERR with PTR_RET function. Patch found using coccinelle. Signed-off-by: Alexandru Gheorghiu <gheorghiuandru@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-04 23:38:33 +0000