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* get rid of 'parent' argument of ->d_compare()Al Viro2016-07-3122-38/+40
| | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* cifs, msdos, vfat, hfs+: don't bother with parent in ->d_compare()Al Viro2016-07-295-5/+5
| | | | | | dentry->d_sb is just as good as parent->d_sb Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* affs ->d_compare(): don't bother with ->d_inodeAl Viro2016-07-292-5/+3
| | | | | | Use ->d_sb directly. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* fold _d_rehash() and __d_rehash() togetherAl Viro2016-07-291-23/+11
| | | | | | | | | | The only place where we feed to __d_rehash() something other than d_hash(dentry->d_name.hash) is __d_move(), where we give it d_hash of another dentry. Postpone rehashing until we'd switched the names and we are rid of that exception, along with the need to keep _d_rehash() and __d_rehash() separate. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* fold dentry_rcuwalk_invalidate() into its only remaining callerAl Viro2016-07-291-15/+2
| | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/ideLinus Torvalds2016-07-294-5/+6
|\ | | | | | | | | | | | | | | | | | | | | Pull IDE updates from David Miller: "Just a couple small bug fixes, nothing overly exciting in here" * git://git.kernel.org/pub/scm/linux/kernel/git/davem/ide: ide: missing break statement in set_timings_mdma() ide: hpt366: fix incorrect mask when checking at cmd_high_time ide-tape: fix misprint in failure handling in idetape_init() cmd640: add __init attribute
| * ide: missing break statement in set_timings_mdma()Dan Carpenter2016-07-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | There was clearly supposed to be a break statement here. Currently we use the k2 ata timings instead of sh ata ones we intended. Probably no one has this hardware anymore so it likely doesn't make a difference beyond the static checker warning. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David S. Miller <davem@davemloft.net>
| * ide: hpt366: fix incorrect mask when checking at cmd_high_timeColin Ian King2016-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the HPT366 data sheet, PCI config space dword 0x40-0x43 bits 11:8 specify the primary drive cmd_high_time, however, currently just 3 bits of the 4 are being used because the mask is 0x07 and not 0x0f. Fix the mask, allowing for the 40MHz clock to be detected. Also add in missing space between switch and parenthesis to clean up a checkpatch warning. Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * ide-tape: fix misprint in failure handling in idetape_init()Alexey Khoroshilov2016-07-261-3/+3
| | | | | | | | | | | | | | | | | | | | If driver_register() failed there is no sense to call driver_unregister(). unregister_chrdev() should be called here. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
| * cmd640: add __init attributeJulia Lawall2016-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add __init attribute on a function that is only called from other __init functions and that is not inlined, at least with gcc version 4.8.4 on an x86 machine with allyesconfig. Currently, the function is put in the .text.unlikely segment. Declaring it as __init will cause it to be put in the .init.text and to disappear after initialization. The result of objdump -x on the function before the change is as follows: 0000000000000000 l F .text.unlikely 00000000000000e4 cmd640x_init_one And after the change it is as follows: 00000000000000d2 l F .init.text 00000000000000df cmd640x_init_one Done with the help of Coccinelle. The semantic patch checks for local static non-init functions that are called from an __init function and are not called from any other function. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparcLinus Torvalds2016-07-2914-94/+173
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull sparc updates from David Miller: 1) Double spin lock bug in sunhv serial driver, from Dan Carpenter. 2) Use correct RSS estimate when determining whether to grow the huge TSB or not, from Mike Kravetz. 3) Don't use full three level page tables for hugepages, PMD level is sufficient. From Nitin Gupta. 4) Mask out extraneous bits from TSB_TAG_ACCESS register, we only want the address bits. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc64: Trim page tables for 8M hugepages sparc64 mm: Fix base TSB sizing when hugetlb pages are used sparc: serial: sunhv: fix a double lock bug sparc32: off by ones in BUG_ON() sparc: Don't leak context bits into thread->fault_address
| * | sparc64: Trim page tables for 8M hugepagesNitin Gupta2016-07-296-68/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For PMD aligned (8M) hugepages, we currently allocate all four page table levels which is wasteful. We now allocate till PMD level only which saves memory usage from page tables. Also, when freeing page table for 8M hugepage backed region, make sure we don't try to access non-existent PTE level. Orabug: 22630259 Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64 mm: Fix base TSB sizing when hugetlb pages are usedMike Kravetz2016-07-286-15/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | do_sparc64_fault() calculates both the base and huge page RSS sizes and uses this information in calls to tsb_grow(). The calculation for base page TSB size is not correct if the task uses hugetlb pages. hugetlb pages are not accounted for in RSS, therefore the call to get_mm_rss(mm) does not include hugetlb pages. However, the number of pages based on huge_pte_count (which does include hugetlb pages) is subtracted from this value. This will result in an artificially small and often negative RSS calculation. The base TSB size is then often set to max_tsb_size as the passed RSS is unsigned, so a negative value looks really big. THP pages are also accounted for in huge_pte_count, and THP pages are accounted for in RSS so the calculation in do_sparc64_fault() is correct if a task only uses THP pages. A single huge_pte_count is not sufficient for TSB sizing if both hugetlb and THP pages can be used. Instead of a single counter, use two: one for hugetlb and one for THP. Signed-off-by: Mike Kravetz <mike.kravetz@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: serial: sunhv: fix a double lock bugDan Carpenter2016-07-271-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | We accidentally take the "port->lock" twice in a row. This old code was supposed to be deleted. Fixes: e58e241c1788 ('sparc: serial: Clean up the locking for -rt') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc32: off by ones in BUG_ON()Dan Carpenter2016-07-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Smatch complains that these tests are off by one, which is true but not life threatening. arch/sparc/kernel/irq_32.c:169 irq_link() error: buffer overflow 'irq_map' 384 <= 384 Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: Don't leak context bits into thread->fault_addressDavid S. Miller2016-07-273-4/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On pre-Niagara systems, we fetch the fault address on data TLB exceptions from the TLB_TAG_ACCESS register. But this register also contains the context ID assosciated with the fault in the low 13 bits of the register value. This propagates into current_thread_info()->fault_address and can cause trouble later on. So clear the low 13-bits out of the TLB_TAG_ACCESS value in the cases where it matters. Reported-by: Mikulas Patocka <mpatocka@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | Merge tag 'arc-4.8-rc1' of ↵Linus Torvalds2016-07-294-3/+5
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC updates from Vineet Gupta: "Things have been calm here - nothing much except for a few fixes" * tag 'arc-4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: mm: don't loose PTE_SPECIAL in pte_modify() ARC: dma: fix address translation in arc_dma_free ARC: typo fix in mm/ioremap.c ARC: fix linux-next build breakage
| * | | ARC: mm: don't loose PTE_SPECIAL in pte_modify()Vineet Gupta2016-07-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LTP madvise05 was generating mm splat | [ARCLinux]# /sd/ltp/testcases/bin/madvise05 | BUG: Bad page map in process madvise05 pte:80e08211 pmd:9f7d4000 | page:9fdcfc90 count:1 mapcount:-1 mapping: (null) index:0x0 flags: 0x404(referenced|reserved) | page dumped because: bad pte | addr:200b8000 vm_flags:00000070 anon_vma: (null) mapping: (null) index:1005c | file: (null) fault: (null) mmap: (null) readpage: (null) | CPU: 2 PID: 6707 Comm: madvise05 And for newer kernels, the system was rendered unusable afterwards. The problem was mprotect->pte_modify() clearing PTE_SPECIAL (which is set to identify the special zero page wired to the pte). When pte was finally unmapped, special casing for zero page was not done, and instead it was treated as a "normal" page, tripping on the map counts etc. This fixes ARC STAR 9001053308 Cc: <stable@vger.kernel.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | | ARC: dma: fix address translation in arc_dma_freeVladimir Kondratiev2016-07-201-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | page should be calculated using physical address. If platform uses non-trivial dma-to-phys memory translation, dma_handle should be converted to physicval address before calculation of page. Failing to do so results in struct page * pointing to wrong or non-existent memory. Fixes: f2e3d55397ff ("ARC: dma: reintroduce platform specific dma<->phys") Cc: stable@vger.kernel.org #4.6+ Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@intel.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | | ARC: typo fix in mm/ioremap.cAlexey Brodkin2016-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | | ARC: fix linux-next build breakageVineet Gupta2016-07-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ~/linux/arch/arc/kernel/setup.c: In function show_cpuinfo: | ~/linux/arch/arc/kernel/setup.c:463:9: error: implicit declaration of function of_find_node_by_name [-Werror=implicit-function-declaration] | struct device_node *core_clk = of_find_node_by_name(NULL, "core_clk"); Reported-by: Anton Kolesov <akolesov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | | | Merge branch 'for-linus' of ↵Linus Torvalds2016-07-294-653/+675
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/egtvedt/linux-avr32 Pull AVR32 updates from Hans-Christian Noren Egtvedt. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/egtvedt/linux-avr32: avr32: off by one in at32_init_pio() avr32: fixup code style in unistd.h and syscall_table.S avr32: wire up preadv2 and pwritev2 syscalls
| * | | | avr32: off by one in at32_init_pio()Dan Carpenter2016-07-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pio_dev[] array has MAX_NR_PIO_DEVICES elements so the > should be >=. Fixes: 5f97f7f9400d ('[PATCH] avr32 architecture') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
| * | | | avr32: fixup code style in unistd.h and syscall_table.SHans-Christian Noren Egtvedt2016-07-292-654/+654
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch swaps the mix of tabs and space for alignment of comment after code to use spaces only. Also document why recvmmsg was defined twice in the syscall_table.S table, but only once in unistd.h. In short, wired in the table by generic arch patch, but forgotten in unistd.h (review slip).
| * | | | avr32: wire up preadv2 and pwritev2 syscallsHans-Christian Noren Egtvedt2016-07-293-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch wires up the new preadv2 and pwritev2 syscall on AVR32. On AVR32, all parameters beyond the 5th are passed on the stack. System calls don't use the stack -- they borrow a callee-saved register instead. This means that syscalls that take 6 parameters must be called through a stub that pushes the last parameter on the stack. Signed-off-by: Hans-Christian Noren Egtvedt <egtvedt@samfundet.no>
* | | | | Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds2016-07-2925-171/+373
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: "Included in this update are: - Patches from Gregory Clement to fix the coherent DMA cases in our dma-mapping code. - A number of CPU errata updates and fixes. - ARM cpuidle improvements from Jisheng Zhang. - Fix from Kees for the location of _etext. - Cleanups from Masahiro Yamada to avoid duplicated messages during the kernel build, and remove CONFIG_ARCH_HAS_BARRIERS. - Remove a udelay loop limitation, allowing for faster CPUs to calibrate the delay correctly. - Cleanup some left-overs from the SW PAN implementation. - Ensure that a modified address limit is not visible to exception handlers" * 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (21 commits) ARM: 8586/1: cpuidle: make arm_cpuidle_suspend() a bit more efficient ARM: 8585/1: cpuidle: fix !cpuidle_ops[cpu].init case during init ARM: 8561/4: dma-mapping: Fix the coherent case when iommu is used ARM: 8561/3: dma-mapping: Don't use outer_flush_range when the L2C is coherent ARM: 8560/1: errata: Workaround errata A12 825619 / A17 852421 ARM: 8559/1: errata: Workaround erratum A12 821420 ARM: 8558/1: errata: Workaround errata A12 818325/852422 A17 852423 ARM: save and reset the address limit when entering an exception ARM: 8577/1: Fix Cortex-A15 798181 errata initialization ARM: 8584/1: floppy: avoid gcc-6 warning ARM: 8583/1: mm: fix location of _etext ARM: 8582/1: remove unused CONFIG_ARCH_HAS_BARRIERS ARM: 8306/1: loop_udelay: remove bogomips value limitation ARM: 8581/1: add missing <asm/prom.h> to arch/arm/kernel/devtree.c ARM: 8576/1: avoid duplicating "Kernel: arch/arm/boot/*Image is ready" ARM: 8556/1: on a generic DT system: do not touch l2x0 ARM: uaccess: remove put_user() code duplication ARM: 8580/1: Remove orphaned __addr_ok() definition ARM: get rid of horrible *(unsigned int *)(regs + 1) ARM: introduce svc_pt_regs structure ...
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| *-. \ \ \ \ Merge branches 'cpuidle', 'fixes' and 'misc' into for-linusRussell King2016-07-28283-1685/+2851
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| | | * | | | | ARM: 8561/4: dma-mapping: Fix the coherent case when iommu is usedGregory CLEMENT2016-07-141-21/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When doing dma allocation with IOMMU the __iommu_alloc_atomic() was used even when the system was coherent. However, this function allocates from a non-cacheable pool, which is fine when the device is not cache coherent but won't work as expected in the device is cache coherent. Indeed, the CPU and device must access the memory using the same cacheability attributes. Moreover when the devices are coherent, the mmap call must not change the pg_prot flags in the vma struct. The arm_coherent_iommu_mmap_attrs has been updated in the same way that it was done for the arm_dma_mmap in commit 55af8a91640d ("ARM: 8387/1: arm/mm/dma-mapping.c: Add arm_coherent_dma_mmap"). Suggested-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8561/3: dma-mapping: Don't use outer_flush_range when the L2C is coherentGregory CLEMENT2016-07-141-20/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a L2 cache controller is used in a system that provides hardware coherency, the entire outer cache operations are useless, and can be skipped. Moreover, on some systems, it is harmful as it causes deadlocks between the Marvell coherency mechanism, the Marvell PCIe controller and the Cortex-A9. In the current kernel implementation, the outer cache flush range operation is triggered by the dma_alloc function. This operation can be take place during runtime and in some circumstances may lead to the PCIe/PL310 deadlock on Armada 375/38x SoCs. This patch extends the __dma_clear_buffer() function to receive a boolean argument related to the coherency of the system. The same things is done for the calling functions. Reported-by: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.16+ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8560/1: errata: Workaround errata A12 825619 / A17 852421Doug Anderson2016-07-142-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The workaround for both errata is to set bit 24 in the diagnostic register. There are no known end-user bugs solved by fixing this errata, but the fix is trivial and it seems sane to apply it. The arguments for why this needs to be in the kernel are similar to the arugments made in the patch "Workaround errata A12 818325/852422 A17 852423". Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8559/1: errata: Workaround erratum A12 821420Doug Anderson2016-07-142-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This erratum has a very simple workaround (set a bit in a register), so let's apply it. Apparently the workaround's downside is a very slight power impact. Note that applying this errata fixes deadlocks that are easy to reproduce with real world applications. The arguments for why this needs to be in the kernel are similar to the arugments made in the patch "Workaround errata A12 818325/852422 A17 852423". Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8558/1: errata: Workaround errata A12 818325/852422 A17 852423Doug Anderson2016-07-142-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several similar errata on Cortex A12 and A17 that all have the same workaround: setting bit[12] of the Feature Register. Technically the list of errata are: - A12 818325: Execution of an UNPREDICTABLE STR or STM instruction might deadlock. Fixed in r0p1. - A12 852422: Execution of a sequence of instructions might lead to either a data corruption or a CPU deadlock. Not fixed in any A12s yet. - A17 852423: Execution of a sequence of instructions might lead to either a data corruption or a CPU deadlock. Not fixed in any A17s yet. Since A12 got renamed to A17 it seems likely that there won't be any future Cortex-A12 cores, so we'll enable for all Cortex-A12. For Cortex-A17 I believe that all known revisions are affected and that all knows revisions means <= r1p2. Presumably if a new A17 was released it would have this problem fixed. Note that in <https://patchwork.kernel.org/patch/4735341/> folks previously expressed opposition to this change because: A) It was thought to only apply to r0p0 and there were no known r0p0 boards supported in mainline. B) It was argued that such a workaround beloned in firmware. Now that this same fix solves other errata on real boards (like rk3288) point A) is addressed. Point B) is impossible to address on boards like rk3288. On rk3288 the firmware doesn't stay resident in RAM and isn't involved at all in the suspend/resume process nor in the SMP bringup process. That means that the most the firmware could do would be to set the bit on "core 0" and this bit would be lost at suspend/resume time. It is true that we could write a "generic" solution that saved the boot-time "core 0" value of this register and applied it at SMP bringup / resume time. However, since this register (described as the "Feature Register" in errata) appears to be undocumented (as far as I can tell) and is only modified for these errata, that "generic" solution seems questionably cleaner. The generic solution also won't fix existing users that haven't happened to do a FW update. Note that in ARM64 presumably PSCI will be universal and fixes like this will end up in ATF. Hopefully we are nearing the end of this style of errata workaround. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Huang Tao <huangtao@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: save and reset the address limit when entering an exceptionRussell King2016-07-075-6/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we enter an exception, the current address limit should not apply to the exception context: if the exception context wishes to access kernel space via the user accessors (eg, perf code), it must explicitly request such access. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
| | | * | | | | ARM: 8584/1: floppy: avoid gcc-6 warningArnd Bergmann2016-07-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc-6.0 warns about comparisons between two identical expressions, which is what we get in the floppy driver when writing to the FD_DOR register: drivers/block/floppy.c: In function 'set_dor': drivers/block/floppy.c:810:44: error: self-comparison always evaluates to true [-Werror=tautological-compare] fd_outb(newdor, FD_DOR); It would be nice to use a static inline function instead of the macro, to avoid the warning, but we cannot do that because the FD_DOR definition is incomplete at this point. Adding a cast to (u32) is a harmless way to shut up the warning, just not very nice. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8583/1: mm: fix location of _etextKees Cook2016-07-022-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The _etext position is defined to be the end of the kernel text code, and should not include any part of the data segments. This interferes with things that might check memory ranges and expect executable code up to _etext. Just to be conservative, leave the kernel resource as it was, using __init_begin instead of _etext as the end mark. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8582/1: remove unused CONFIG_ARCH_HAS_BARRIERSMasahiro Yamada2016-07-022-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 2b749cb3a515 ("ARM: realview: remove private barrier implementation"), this config is not used by any platform. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8306/1: loop_udelay: remove bogomips value limitationNicolas Pitre2016-06-223-14/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we don't support ARMv3 anymore, the loop based delay code can convert microsecs into number of loops using a 64-bit multiplication and more precision. This allows us to lift the hard limit of 3355 on the bogomips value as loops_per_jiffy may now safely span the full 32-bit range. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8581/1: add missing <asm/prom.h> to arch/arm/kernel/devtree.cBen Dooks2016-06-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following warnings by including declarations from <asm/prom.h>: arch/arm/kernel/devtree.c:69:13: warning: symbol 'arm_dt_init_cpu_maps' was not declared. Should it be static? arch/arm/kernel/devtree.c:210:27: warning: symbol 'setup_machine_fdt' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8576/1: avoid duplicating "Kernel: arch/arm/boot/*Image is ready"Masahiro Yamada2016-06-222-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3939f3345050 ("ARM: 8418/1: add boot image dependencies to not generate invalid images") fixed bad image generation for the parallel building, but as its side effect, Kbuild now descends into arch/arm/boot/ again and again, duplicating the log messages. It looks clumsy, so let's display the same message only once. This commit moves the log rules from arch/arm/boot/Makefile to arch/arm/Makefile. I did not delete them completely because *Image are the final targets that users are interested in. Without this commit, the log of incremental build is like follows: $ make ARCH=arm UIMAGE_LOADADDR=0x80208000 uImage CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CHK include/generated/bounds.h CHK include/generated/timeconst.h CHK include/generated/asm-offsets.h CALL scripts/checksyscalls.sh CHK include/generated/compile.h Kernel: arch/arm/boot/Image is ready Kernel: arch/arm/boot/Image is ready Kernel: arch/arm/boot/zImage is ready Kernel: arch/arm/boot/Image is ready Kernel: arch/arm/boot/zImage is ready Image arch/arm/boot/uImage is ready With this commit, it will look like follows: $ make ARCH=arm UIMAGE_LOADADDR=0x80208000 uImage CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CHK include/generated/bounds.h CHK include/generated/timeconst.h CHK include/generated/asm-offsets.h CALL scripts/checksyscalls.sh CHK include/generated/compile.h Kernel: arch/arm/boot/Image is ready Kernel: arch/arm/boot/zImage is ready Kernel: arch/arm/boot/uImage is ready Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8556/1: on a generic DT system: do not touch l2x0Linus Walleij2016-06-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set no bits, mask all bits in the AUX l2x0 register for the default DT ARM system: if anything needs to be modified, it should be done using DT bindings. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: uaccess: remove put_user() code duplicationRussell King2016-06-221-57/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the code duplication between put_user() and __put_user(). The code which selected the implementation based upon the pointer size, and declared the local variable to hold the value to be put are common to both implementations. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: 8580/1: Remove orphaned __addr_ok() definitionRobin Murphy2016-06-221-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 8c56cc8be5b3 ("ARM: 7449/1: use generic strnlen_user and strncpy_from_user functions"), the definition of __addr_ok() has been languishing unused; eradicate the sucker. Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | | | | ARM: get rid of horrible *(unsigned int *)(regs + 1)Russell King2016-06-222-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Get rid of the horrible "*(unsigned int *)(regs + 1)" to get at the parent context domain access register value, instead using the newly introduced svc_pt_regs structure. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
| | | * | | | | ARM: introduce svc_pt_regs structureRussell King2016-06-224-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the privileged mode pt_regs are an extended version of the saved userland pt_regs, introduce a new svc_pt_regs structure to describe this layout. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
| | | * | | | | ARM: rename S_FRAME_SIZE to PT_REGS_SIZERussell King2016-06-226-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | S_FRAME_SIZE is no longer the size of the kernel stack frame, so this name is misleading. It is the size of the kernel pt_regs structure. Name it so. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
| | * | | | | | ARM: 8577/1: Fix Cortex-A15 798181 errata initializationMatija Glavinic Pecotic2016-07-021-4/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current errata initialization doesn't take properly revision and REVIDR into account. Depending on the core revision, revidr bits should not be taken into account. Errata misleadingly declares r3p3 to be error-free, but this is not the case. Include rp3p3 in errata initialization. Here are possible fixes defined in revidr register for r2 and r3 [1,2]: r0p0-r2p1: No fixes applied r2p2,r2p3: REVIDR[4]: 798181 Moving a virtual page that is being accessed by an active process can lead to unexpected behavior REVIDR[9]: Not defined r2p4,r3p0,r3p1,r3p2: REVIDR[4]: 798181 Moving a virtual page that is being accessed by an active process can lead to unexpected behavior REVIDR[9]: 798181 Moving a virtual page that is being accessed by an active process can lead to unexpected behavior - This is an update to a previously released ECO. r3p3: REVIDR[4]: Reserved REVIDR[9]: 798181 Moving a virtual page that is being accessed by an active process can lead to unexpected behavior - This is an update to a previously released ECO. And here is proposed handling from the same document: * In r3p2 and earlier versions with REVIDR[4]= 0,the full workaround is required. * In r3p2 and earlier versions with REVIDR[4]=1, REVIDR[9]=0, only the portion of the workaround up to the end of step 6 is required. * In r3p2 and earlier versions with REVIDR[4]=1, REVIDR[9]=1, no workaround is required. * In r3p3, if REVIDR[9]=0, only the portion of the workaround up to the end of step 6 is required. * In r3p3, if REVIDR[9]=1, no workaround is required. These imply following: REVIDR[9] set -> No WA REVIDR[4] set, REVIDR[9] cleared -> Partial WA Both cleared -> Full WA Where certain bits should and should not be taken into account depending on whether they are defined for the revision. Although not explicitly mentioned in the errata note, REVIDR[9] set, with REVIDR[4] cleared is valid combination which requires no WA. This is confirmed by ARM support and errata will be updated. [1] ARM CortexTM-A15 MPCore - NEON Product revision r3 Software Developers Errata Notice ARM-EPM-028093 v20.0 Released [2] ARM CortexTM-A15 MPCore - NEON Product Revision r2 Software Developers Errata Notice ARM-EPM-028090 v19.3 Released Signed-off-by: Matija Glavinic Pecotic <matija.glavinic-pecotic.ext@nokia.com> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | | ARM: 8586/1: cpuidle: make arm_cpuidle_suspend() a bit more efficientJisheng Zhang2016-07-141-11/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, we check cpuidle_ops.suspend every time when entering a low-power idle state. But this check could be avoided in this hot path by moving it into arm_cpuidle_read_ops() to reduce arm_cpuidle_suspend overhead a bit. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | | ARM: 8585/1: cpuidle: fix !cpuidle_ops[cpu].init case during initJisheng Zhang2016-07-141-3/+11
| | |/ / / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's assume cpuidle_ops exists but it doesn't implement the according init callback, current arm_cpuidle_init() will return success to its caller, but in fact it should return -EOPNOTSUPP. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | | | Merge branch 'for-linus' of ↵Linus Torvalds2016-07-297-41/+44
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuse Pull fuse updates from Miklos Szeredi: "This fixes error propagation from writeback to fsync/close for writeback cache mode as well as adding a missing capability flag to the INIT message. The rest are cleanups. (The commits are recent but all the code actually sat in -next for a while now. The recommits are due to conflict avoidance and the addition of Cc: stable@...)" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuse: fuse: use filemap_check_errors() mm: export filemap_check_errors() to modules fuse: fix wrong assignment of ->flags in fuse_send_init() fuse: fuse_flush must check mapping->flags for errors fuse: fsync() did not return IO errors fuse: don't mess with blocking signals new helper: wait_event_killable_exclusive() fuse: improve aio directIO write performance for size extending writes
| * | | | | | | fuse: use filemap_check_errors()Miklos Szeredi2016-07-291-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-13 19:17:35 +0000