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* Merge tag 'mips_4.17' of ↵Linus Torvalds2018-04-1059-84/+1381
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips Pull MIPS updates from James Hogan: "These are the main MIPS changes for 4.17. Rough overview: (1) generic platform: Add support for Microsemi Ocelot SoCs (2) crypto: Add CRC32 and CRC32C HW acceleration module (3) Various cleanups and misc improvements More detailed summary: Miscellaneous: - hang more efficiently on halt/powerdown/restart - pm-cps: Block system suspend when a JTAG probe is present - expand make help text for generic defconfigs - refactor handling of legacy defconfigs - determine the entry point from the ELF file header to fix microMIPS for certain toolchains - introduce isa-rev.h for MIPS_ISA_REV and use to simplify other code Minor cleanups: - DTS: boston/ci20: Unit name cleanups and correction - kdump: Make the default for PHYSICAL_START always 64-bit - constify gpio_led in Alchemy, AR7, and TXX9 - silence a couple of W=1 warnings - remove duplicate includes Platform support: Generic platform: - add support for Microsemi Ocelot - dt-bindings: Add vendor prefix for Microsemi Corporation - dt-bindings: Add bindings for Microsemi SoCs - add ocelot SoC & PCB123 board DTS files - MAINTAINERS: Add entry for Microsemi MIPS SoCs - enable crc32-mips on r6 configs ath79: - fix AR724X_PLL_REG_PCIE_CONFIG offset BCM47xx: - firmware: Use mac_pton() for MAC address parsing - add Luxul XAP1500/XWR1750 WiFi LEDs - use standard reset button for Luxul XWR-1750 BMIPS: - enable CONFIG_BRCMSTB_PM in bmips_stb_defconfig for build coverage - add STB PM, wake-up timer, watchdog DT nodes Octeon: - drop '.' after newlines in printk calls ralink: - pci-mt7621: Enable PCIe on MT7688" * tag 'mips_4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (37 commits) MIPS: BCM47XX: Use standard reset button for Luxul XWR-1750 MIPS: BCM47XX: Add Luxul XAP1500/XWR1750 WiFi LEDs MIPS: Make the default for PHYSICAL_START always 64-bit MIPS: Use the entry point from the ELF file header MAINTAINERS: Add entry for Microsemi MIPS SoCs MIPS: generic: Add support for Microsemi Ocelot MIPS: mscc: Add ocelot PCB123 device tree MIPS: mscc: Add ocelot dtsi dt-bindings: mips: Add bindings for Microsemi SoCs dt-bindings: Add vendor prefix for Microsemi Corporation MIPS: ath79: Fix AR724X_PLL_REG_PCIE_CONFIG offset MIPS: pci-mt7620: Enable PCIe on MT7688 MIPS: pm-cps: Block system suspend when a JTAG probe is present MIPS: VDSO: Replace __mips_isa_rev with MIPS_ISA_REV MIPS: BPF: Replace __mips_isa_rev with MIPS_ISA_REV MIPS: cpu-features.h: Replace __mips_isa_rev with MIPS_ISA_REV MIPS: Introduce isa-rev.h to define MIPS_ISA_REV MIPS: Hang more efficiently on halt/powerdown/restart FIRMWARE: bcm47xx_nvram: Replace mac address parsing MIPS: BMIPS: Add Broadcom STB watchdog nodes ...
| * MIPS: BCM47XX: Use standard reset button for Luxul XWR-1750Dan Haab2018-04-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The original patch submitted for support of the Luxul XWR-1750 used a non-standard button handler for the reset button. This patch will allow using the standard KEY_RESTART Signed-off-by: Dan Haab <dan.haab@luxul.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18981/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: BCM47XX: Add Luxul XAP1500/XWR1750 WiFi LEDsDan Haab2018-03-281-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Luxul devices use PCIe connected GPIO LEDs that are not available until the PCI subsytem and its drivers load. Using the same array for these LEDs would block registering any LEDs until all GPIOs become available. This may be undesired behavior as some LEDs should be available as early as possible (e.g. system status LED). This patch will allow registering available LEDs while deferring these PCIe GPIO connected 'extra' LEDs until they become available. Signed-off-by: Dan Haab <dan.haab@luxul.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18952/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: Make the default for PHYSICAL_START always 64-bitMaciej W. Rozycki2018-03-281-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the default for PHYSICAL_START always 64-bit, ensuring that a correct sign-extended value is used if a 32-bit image is loaded by a 64-bit system, and matching how the load address is set in platform Makefile fragments (arch/mips/*/Platform) in the absence of the PHYSICAL_START configuration option. Of course PHYSICAL_START itself is a misnomer as the load address is virtual rather than physical (or otherwise sign-extension would not apply). Fixes: 7aa1c8f47e7e ("MIPS: kdump: Add support") Signed-off-by: Maciej W. Rozycki <macro@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maxim Uvarov <muvarov@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18939/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: Use the entry point from the ELF file headerMaciej W. Rozycki2018-03-221-14/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to fetch the correct entry point with the ISA bit included, for use by non-ELF boot loaders, parse the output of `objdump -f' for the start address recorded in the kernel executable itself, rather than using `nm' to get the value of the `kernel_entry' symbol. Sign-extend the address retrieved if 32-bit, so that execution is correctly started on 64-bit processors as well. The tool always prints the entry point using either 8 or 16 hexadecimal digits, matching the address width (aka class) of the ELF file, even in the presence of leading zeros. Signed-off-by: Maciej W. Rozycki <macro@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18912/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MAINTAINERS: Add entry for Microsemi MIPS SoCsAlexandre Belloni2018-03-211-0/+9
| | | | | | | | | | | | | | | | | | | | | | Add myself as a maintainer for the Microsemi MIPS SoCs. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Allan Nielsen <Allan.Nielsen@microsemi.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18857/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: generic: Add support for Microsemi OcelotAlexandre Belloni2018-03-215-0/+133
| | | | | | | | | | | | | | | | | | | | | | | | Introduce support for the MIPS based Microsemi Ocelot SoCs. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Allan Nielsen <Allan.Nielsen@microsemi.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18858/ [jhogan@kernel.org: update ocelot_defconfig specification] Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: mscc: Add ocelot PCB123 device treeAlexandre Belloni2018-03-212-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a device tree for the Microsemi Ocelot PCB123 evaluation board. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Allan Nielsen <Allan.Nielsen@microsemi.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/18856/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: mscc: Add ocelot dtsiAlexandre Belloni2018-03-213-0/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a device tree include file for the Microsemi Ocelot SoC. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Allan Nielsen <Allan.Nielsen@microsemi.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/18855/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * dt-bindings: mips: Add bindings for Microsemi SoCsAlexandre Belloni2018-03-211-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | Add bindings for Microsemi SoCs. Currently only Ocelot is supported. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Rob Herring <robh+dt@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Allan Nielsen <Allan.Nielsen@microsemi.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18854/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * dt-bindings: Add vendor prefix for Microsemi CorporationAlexandre Belloni2018-03-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Microsemi Corporation provides semiconductor and system solutions for aerospace & defense, communications, data center and industrial markets. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Allan Nielsen <Allan.Nielsen@microsemi.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18853/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: ath79: Fix AR724X_PLL_REG_PCIE_CONFIG offsetMathias Kresin2018-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the QCA u-boot source the "PCIE Phase Lock Loop Configuration (PCIE_PLL_CONFIG)" register is for all SoCs except the QCA955X and QCA956X at offset 0x10. Since the PCIE PLL config register is only defined for the AR724x fix only this value. The value is wrong since the day it was added and isn't used by any driver yet. Signed-off-by: Mathias Kresin <dev@kresin.me> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16048/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: pci-mt7620: Enable PCIe on MT7688Daniel Golle2018-03-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use PCIe support for MT7628AN also on MT7688. Tested on WRTNODE2R. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Cc: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-mediatek@lists.infradead.org Patchwork: https://patchwork.linux-mips.org/patch/16223/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: pm-cps: Block system suspend when a JTAG probe is presentMatt Redfearn2018-03-091-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a JTAG probe is connected to a MIPS cluster, then the CPC detects it and latches the CPC.STAT_CONF.EJTAG_PROBE bit to 1. While set, attempting to send a power-down command to a core will be blocked, and the CPC will instead send the core to clock-off state. This can interfere with systems fully entering a low power state where all cores, CM, GIC, etc are powered down. Detect that a JTAG probe is / has been connected to the cluster and block the suspend attempt. Attempting to suspend the system while a JTAG probe is connected now yields: # echo mem > /sys/power/state [ 11.654000] PM: Syncing filesystems ... done. [ 11.658000] JTAG probe is connected - abort suspend -sh: echo: write error: Operation not permitted # To restore suspend, the JTAG probe should be disconnected or put into quiescent state. Platform code can then clear the CPC.STAT_CONF.EJTAG_PROBE bit. Reported-by: Ed Blake <ed.blake@sondrel.com> Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18641/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: VDSO: Replace __mips_isa_rev with MIPS_ISA_REVMatt Redfearn2018-03-091-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | Remove the need to check that __mips_isa_rev is defined by using the newly added MIPS_ISA_REV. Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18678/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: BPF: Replace __mips_isa_rev with MIPS_ISA_REVMatt Redfearn2018-03-091-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove the need to check that __mips_isa_rev is defined by using the newly added MIPS_ISA_REV. Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18677/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: cpu-features.h: Replace __mips_isa_rev with MIPS_ISA_REVMatt Redfearn2018-03-091-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove the need to check that __mips_isa_rev is defined by using the newly added MIPS_ISA_REV. Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: "Maciej W. Rozycki" <macro@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18675/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: Introduce isa-rev.h to define MIPS_ISA_REVMatt Redfearn2018-03-091-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are multiple instances in the kernel where we need to include or exclude particular instructions based on the ISA revision of the target processor. For MIPS32 / MIPS64, the compiler exports a __mips_isa_rev define. However, when targeting MIPS I - V, this define is absent. This leads to each use of __mips_isa_rev having to check that it is defined first. To simplify this, introduce the isa-rev.h header which always exports MIPS_ISA_REV. The name is changed so as to avoid confusion with the compiler builtin and to avoid accidentally using the builtin. MIPS_ISA_REV is defined to the compilers builtin if provided, or 0, which satisfies all current usages. Suggested-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Reviewed-by: Maciej W. Rozycki <macro@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18676/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: Hang more efficiently on halt/powerdown/restartPaul Burton2018-03-091-6/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic MIPS implementations of halting, powering down or restarting the system all hang using a busy loop as a last resort. We have many platforms which avoid this loop by implementing their own, many using some variation upon executing a wait instruction to lower CPU power usage if we reach this point. In order to prepare for cleaning up these various custom implementations of the same thing, this patch makes the generic machine_halt(), machine_power_off() & machine_restart() functions each make use of the wait instruction to lower CPU power usage in cases where we know that the wait instruction is available. If wait isn't known to be supported then we fall back to calling cpu_wait(), and if we don't have a cpu_wait() callback then we effectively continue using a busy loop. In effect the new machine_hang() function provides a superset of the functionality that the various platforms currently provide differing subsets of. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17178/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * FIRMWARE: bcm47xx_nvram: Replace mac address parsingAndy Shevchenko2018-03-092-15/+4
| | | | | | | | | | | | | | | | | | | | | | Replace sscanf() with mac_pton(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: David S. Miller <davem@davemloft.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17982/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: BMIPS: Add Broadcom STB watchdog nodesJaedon Shin2018-03-0616-0/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds watchdog device nodes to BCM7xxx MIPS based SoCs. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17729/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: BMIPS: Add Broadcom STB wake-up timer nodesJaedon Shin2018-03-0612-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds wake-up timer device nodes to BCM7xxx MIPS based SoCs. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17728/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: BMIPS: Add Broadcom STB power management nodesJaedon Shin2018-03-065-0/+279
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds power management nodes to BCM7xxx MIPS based SoCs. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17727/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: Expand help text to list generic defconfigsJames Hogan2018-03-051-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Expand the MIPS Makefile help text to list generic board names, generic defconfigs, and legacy defconfigs which have been converted to generic and are still usable. Here's a snippet of the new "make ARCH=mips help" output: ... If you are targeting a system supported by generic kernels you may configure the kernel for a given architecture target like so: {micro32,32,64}{r1,r2,r6}{el,}_defconfig <BOARDS="list of boards"> Where BOARDS is some subset of the following: boston ni169445 ranchu sead-3 xilfpga Specifically the following generic default configurations are supported: 32r1_defconfig - Build generic kernel for MIPS32 r1 32r1el_defconfig - Build generic kernel for MIPS32 r1 little endian 32r2_defconfig - Build generic kernel for MIPS32 r2 32r2el_defconfig - Build generic kernel for MIPS32 r2 little endian 32r6_defconfig - Build generic kernel for MIPS32 r6 32r6el_defconfig - Build generic kernel for MIPS32 r6 little endian 64r1_defconfig - Build generic kernel for MIPS64 r1 64r1el_defconfig - Build generic kernel for MIPS64 r1 little endian 64r2_defconfig - Build generic kernel for MIPS64 r2 64r2el_defconfig - Build generic kernel for MIPS64 r2 little endian 64r6_defconfig - Build generic kernel for MIPS64 r6 64r6el_defconfig - Build generic kernel for MIPS64 r6 little endian micro32r2_defconfig - Build generic kernel for microMIPS32 r2 micro32r2el_defconfig - Build generic kernel for microMIPS32 r2 little endian The following legacy default configurations have been converted to generic and can still be used: sead3_defconfig - Build 32r2el_defconfig BOARDS=sead-3 sead3micro_defconfig - Build micro32r2el_defconfig BOARDS=sead-3 xilfpga_defconfig - Build 32r2el_defconfig BOARDS=xilfpga ... Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: Matt Redfearn <matt.redfearn@mips.com> Cc: linux-mips@linux-mips.org Cc: linux-kbuild@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/18598/
| * MIPS: Refactor legacy defconfigsJames Hogan2018-02-191-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define legacy defconfigs which have been converted to the generic platform more programatically, so that they can be listed in the Makefile help text and as a separate Makefile target without duplication. Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: Matt Redfearn <matt.redfearn@mips.com> Cc: linux-mips@linux-mips.org Cc: linux-kbuild@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/18596/
| * MIPS: generic: Enable crc32-mips on r6 configsJames Hogan2018-02-192-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the crc32-mips module on MIPS generic r6 configs, where the required MIPS r6 CRC instructions may be available. As well as allowing the CRC instructions to be utilised, this should also ensure the module gets some build coverage. Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: Marcin Nowakowski <marcin.nowakowski@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18602/
| * MIPS: crypto: Add crc32 and crc32c hw accelerated moduleMarcin Nowakowski2018-02-195-0/+370
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This module registers crc32 and crc32c algorithms that use the optional CRC32[bhwd] and CRC32C[bhwd] instructions in MIPSr6 cores. Signed-off-by: Marcin Nowakowski <marcin.nowakowski@mips.com> Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: linux-mips@linux-mips.org Cc: linux-crypto@vger.kernel.org Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Patchwork: https://patchwork.linux-mips.org/patch/18601/ [jhogan@kernel.org: Add CRYPTO_ALG_OPTIONAL_KEY flag on Eric Biggers' suggestion, due to commit a208fa8f3303 ("crypto: hash - annotate algorithms taking optional key") in v4.16-rc1]
| * MIPS: Add crc instruction support flag to elf_hwcapMarcin Nowakowski2018-02-193-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Indicate that CRC32 and CRC32C instuctions are supported by the CPU through elf_hwcap flags. This will be used by a follow-up commit that introduces crc32(c) crypto acceleration modules and is required by GENERIC_CPU_AUTOPROBE feature. Signed-off-by: Marcin Nowakowski <marcin.nowakowski@mips.com> Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18600/
| * MIPS: Remove a warning when PHYS_OFFSET is 0x0Mathieu Malaterre2018-02-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rewrite the comparison in `else if` statement, case where `min_low_pfn > ARCH_PFN_OFFSET` has already been checked in the first `if` statement: if (min_low_pfn > ARCH_PFN_OFFSET) { Fix non-fatal warning during compilation using W=1: arch/mips/kernel/setup.c: In function ‘bootmem_init’: arch/mips/kernel/setup.c:461:25: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] } else if (min_low_pfn < ARCH_PFN_OFFSET) { ^ Signed-off-by: Mathieu Malaterre <malat@debian.org> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18176/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: Make declaration for function `memory_region_available` staticMathieu Malaterre2018-02-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix non-fatal warning during compilation using W=1: arch/mips/kernel/setup.c:158:13: warning: no previous prototype for ‘memory_region_available’ [-Wmissing-prototypes] bool __init memory_region_available(phys_addr_t start, phys_addr_t size) ^~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Mathieu Malaterre <malat@debian.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18175/ [jhogan@kernel.org: tweak whitespace] Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: dts: Fix a typo in the node unit nameMathieu Malaterre2018-02-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The unit name was 8c00000 but since the reg property is declared as: reg = <0x0 0x4c00000 0x1 0xfb400000>; the unit name should have been instead 4c00000. Tested on MIPS Creator CI20 (v1): $ cat /sys/firmware/devicetree/.../partitions/partition@4c00000/label;echo system Reported-by: James Hogan <jhogan@kernel.org> Signed-off-by: Mathieu Malaterre <malat@debian.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Paul Burton <paul.burton@mips.com> Cc: Paul Cercueil <paul@crapouillou.net> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/18529/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: dts: Remove leading 0x and 0s from bindings notationMathieu Malaterre2018-02-192-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Improve the DTS files by removing all the leading "0x" and zeros to fix the following dtc warnings: Warning (unit_address_format): Node /XXX unit name should not have leading "0x" and Warning (unit_address_format): Node /XXX unit name should not have leading 0s Converted using the following command: find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -E -i -e "s/@0x([0-9a-fA-F\.]+)\s?\{/@\L\1 \{/g" -e "s/@0+([0-9a-fA-F\.]+)\s?\{/@\L\1 \{/g" {} + For simplicity, two sed expressions were used to solve each warnings separately. To make the regex expression more robust a few other issues were resolved, namely setting unit-address to lower case, and adding a whitespace before the the opening curly brace: https://elinux.org/Device_Tree_Linux#Linux_conventions This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation") Reported-by: David Daney <ddaney@caviumnetworks.com> Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Mathieu Malaterre <malat@debian.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Paul Burton <paul.burton@mips.com> Cc: Paul Cercueil <paul@crapouillou.net> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/18528/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: TXX9: Constify gpio_ledArvind Yadav2018-02-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | gpio_leds are not supposed to change at runtime. struct gpio_led_platform_data contains a const struct gpio_led pointer since v2.6.39, so mark the gpio_led structures const too. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18008/ [jhogan@kernel.org: improve commit message] Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: AR7: Constify gpio_ledArvind Yadav2018-02-191-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | gpio_leds are not supposed to change at runtime. struct gpio_led_platform_data contains a const struct gpio_led pointer since v2.6.39, so mark the gpio_led structures const too. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18007/ [jhogan@kernel.org: improve commit message] Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: Alchemy: Constify gpio_ledArvind Yadav2018-02-192-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | gpio_leds are not supposed to change at runtime. struct gpio_led_platform_data contains a const struct gpio_led pointer since v2.6.39, so mark the gpio_led structures const too. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18006/ [jhogan@kernel.org: improve commit message] Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: Remove duplicate includesPravin Shedge2018-02-191-2/+0
| | | | | | | | | | | | | | | | | | | | | | These duplicate includes have been found with scripts/checkincludes.pl but they have been removed manually to avoid removing false positives. Signed-off-by: Pravin Shedge <pravin.shedge4linux@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17920/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: BMIPS: Enable CONFIG_SOC_BRCMSTBJaedon Shin2018-02-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SOC_BRCMSTB in bmips_stb_defconfig. CONFIG_BRCMSTB_PM is also enabled by default option in Kconfig. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org Reviewed-by: James Hogan <jhogan@kernel.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/18590/ Signed-off-by: James Hogan <jhogan@kernel.org>
| * MIPS: Octeon: Fix logging messages with spurious periods after newlinesJoe Perches2018-02-191-5/+5
| | | | | | | | | | | | | | | | | | | | | | Using a period after a newline causes bad output. Fixes: 64b139f97c01 ("MIPS: OCTEON: irq: add CIB and other fixes") Signed-off-by: Joe Perches <joe@perches.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17886/ Signed-off-by: James Hogan <jhogan@kernel.org>
* | Merge tag 'trace-v4.17' of ↵Linus Torvalds2018-04-1030-3268/+8372
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace Pull tracing updates from Steven Rostedt: "New features: - Tom Zanussi's extended histogram work. This adds the synthetic events to have histograms from multiple event data Adds triggers "onmatch" and "onmax" to call the synthetic events Several updates to the histogram code from this - Allow way to nest ring buffer calls in the same context - Allow absolute time stamps in ring buffer - Rewrite of filter code parsing based on Al Viro's suggestions - Setting of trace_clock to global if TSC is unstable (on boot) - Better OOM handling when allocating large ring buffers - Added initcall tracepoints (consolidated initcall_debug code with them) And other various fixes and clean ups" * tag 'trace-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace: (68 commits) init: Have initcall_debug still work without CONFIG_TRACEPOINTS init, tracing: Have printk come through the trace events for initcall_debug init, tracing: instrument security and console initcall trace events init, tracing: Add initcall trace events tracing: Add rcu dereference annotation for test func that touches filter->prog tracing: Add rcu dereference annotation for filter->prog tracing: Fixup logic inversion on setting trace_global_clock defaults tracing: Hide global trace clock from lockdep ring-buffer: Add set/clear_current_oom_origin() during allocations ring-buffer: Check if memory is available before allocation lockdep: Add print_irqtrace_events() to __warn vsprintf: Do not preprocess non-dereferenced pointers for bprintf (%px and %pK) tracing: Uninitialized variable in create_tracing_map_fields() tracing: Make sure variable string fields are NULL-terminated tracing: Add action comparisons when testing matching hist triggers tracing: Don't add flag strings when displaying variable references tracing: Fix display of hist trigger expressions containing timestamps ftrace: Drop a VLA in module_exists() tracing: Mention trace_clock=global when warning about unstable clocks tracing: Default to using trace_global_clock if sched_clock is unstable ...
| * | init: Have initcall_debug still work without CONFIG_TRACEPOINTSSteven Rostedt (VMware)2018-04-071-2/+26
| | | | | | | | | | | | | | | | | | | | | Add macros around the initcall_debug tracepoint code to have the code to default back to the old method if CONFIG_TRACEPOINTS is not enabled. Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
| * | init, tracing: Have printk come through the trace events for initcall_debugSteven Rostedt (VMware)2018-04-061-16/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With trace events set before and after the initcall function calls, instead of having a separate routine for printing out the initcalls when initcall_debug is specified on the kernel command line, have the code register a callback to the tracepoints where the initcall trace events are. This removes the need for having a separate function to do the initcalls as the tracepoint callbacks can handle the printk. It also includes other initcalls that are not called by the do_one_initcall() which includes console and security initcalls. Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
| * | init, tracing: instrument security and console initcall trace eventsAbderrahmane Benbachir2018-04-062-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trace events have been added around the initcall functions defined in init/main.c. But console and security have their own initcalls. This adds the trace events associated for those initcall functions. Link: http://lkml.kernel.org/r/1521765208.19745.2.camel@polymtl.ca Cc: Ingo Molnar <mingo@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Abderrahmane Benbachir <abderrahmane.benbachir@polymtl.ca> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
| * | init, tracing: Add initcall trace eventsSteven Rostedt (VMware)2018-04-062-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Being able to trace the start and stop of initcalls is useful to see where the timings are an issue. There is already an "initcall_debug" parameter, but that can cause a large overhead itself, as the printing of the information may take longer than the initcall functions. Adding in a start and finish trace event around the initcall functions, as well as a trace event that records the level of the initcalls, one can get a much finer measurement of the times and interactions of the initcalls themselves, as trace events are much lighter than printk()s. Suggested-by: Abderrahmane Benbachir <abderrahmane.benbachir@polymtl.ca> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
| * | tracing: Add rcu dereference annotation for test func that touches filter->progSteven Rostedt (VMware)2018-04-061-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A boot up test function update_pred_fn() dereferences filter->prog without the proper rcu annotation. To do this, we must also take the event_mutex first. Normally, this isn't needed because this test function can not race with other use cases that touch the event filters (it is disabled if any events are enabled). Reported-by: kbuild test robot <fengguang.wu@intel.com> Fixes: 80765597bc587 ("tracing: Rewrite filter logic to be simpler and faster") Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
| * | tracing: Add rcu dereference annotation for filter->progSteven Rostedt (VMware)2018-04-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ftrace_function_set_filter() referenences filter->prog without annotation and sparse complains about it. It needs a rcu_dereference_protected() wrapper. Reported-by: kbuild test robot <fengguang.wu@intel.com> Fixes: 80765597bc587 ("tracing: Rewrite filter logic to be simpler and faster") Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
| * | tracing: Fixup logic inversion on setting trace_global_clock defaultsChris Wilson2018-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 932066a15335 ("tracing: Default to using trace_global_clock if sched_clock is unstable"), the logic for deciding to override the default clock if unstable was reversed from the earlier posting. I was trying to reduce the width of the message by using an early return rather than a if-block, but reverted back to using the if-block and accidentally left the predicate inverted. Link: http://lkml.kernel.org/r/20180404212450.26646-1-chris@chris-wilson.co.uk Fixes: 932066a15335 ("tracing: Default to using trace_global_clock if sched_clock is unstable") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
| * | tracing: Hide global trace clock from lockdepSteven Rostedt (VMware)2018-04-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function tracing can trace in NMIs and such. If the TSC is determined to be unstable, the tracing clock will switch to the global clock on boot up, unless "trace_clock" is specified on the kernel command line. The global clock disables interrupts to access sched_clock_cpu(), and in doing so can be done within lockdep internals (because of function tracing and NMIs). This can trigger false lockdep splats. The trace_clock_global() is special, best not to trace the irq logic within it. Link: http://lkml.kernel.org/r/20180404145015.77bde42d@gandalf.local.home Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
| * | ring-buffer: Add set/clear_current_oom_origin() during allocationsSteven Rostedt (VMware)2018-04-061-10/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As si_mem_available() can say there is enough memory even though the memory available is not useable by the ring buffer, it is best to not kill innocent applications because the ring buffer is taking up all the memory while it is trying to allocate a great deal of memory. If the allocator is user space (because kernel threads can also increase the size of the kernel ring buffer on boot up), then after si_mem_available() says there is enough memory, set the OOM killer to kill the current task if an OOM triggers during the allocation. Link: http://lkml.kernel.org/r/20180404062340.GD6312@dhcp22.suse.cz Suggested-by: Michal Hocko <mhocko@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
| * | ring-buffer: Check if memory is available before allocationSteven Rostedt (VMware)2018-04-061-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ring buffer is made up of a link list of pages. When making the ring buffer bigger, it will allocate all the pages it needs before adding to the ring buffer, and if it fails, it frees them and returns an error. This makes increasing the ring buffer size an all or nothing action. When this was first created, the pages were allocated with "NORETRY". This was to not cause any Out-Of-Memory (OOM) actions from allocating the ring buffer. But NORETRY was too strict, as the ring buffer would fail to expand even when there's memory available, but was taken up in the page cache. Commit 848618857d253 ("tracing/ring_buffer: Try harder to allocate") changed the allocating from NORETRY to RETRY_MAYFAIL. The RETRY_MAYFAIL would allocate from the page cache, but if there was no memory available, it would simple fail the allocation and not trigger an OOM. This worked fine, but had one problem. As the ring buffer would allocate one page at a time, it could take up all memory in the system before it failed to allocate and free that memory. If the allocation is happening and the ring buffer allocates all memory and then tries to take more than available, its allocation will not trigger an OOM, but if there's any allocation that happens someplace else, that could trigger an OOM, even though once the ring buffer's allocation fails, it would free up all the previous memory it tried to allocate, and allow other memory allocations to succeed. Commit d02bd27bd33dd ("mm/page_alloc.c: calculate 'available' memory in a separate function") separated out si_mem_availble() as a separate function that could be used to see how much memory is available in the system. Using this function to make sure that the ring buffer could be allocated before it tries to allocate pages we can avoid allocating all memory in the system and making it vulnerable to OOMs if other allocations are taking place. Link: http://lkml.kernel.org/r/1522320104-6573-1-git-send-email-zhaoyang.huang@spreadtrum.com CC: stable@vger.kernel.org Cc: linux-mm@kvack.org Fixes: 848618857d253 ("tracing/ring_buffer: Try harder to allocate") Requires: d02bd27bd33dd ("mm/page_alloc.c: calculate 'available' memory in a separate function") Reported-by: Zhaoyang Huang <huangzhaoyang@gmail.com> Tested-by: Joel Fernandes <joelaf@google.com> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
| * | lockdep: Add print_irqtrace_events() to __warnSteven Rostedt (VMware)2018-04-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Running a test on a x86_32 kernel I triggered a bug that an interrupt disable/enable isn't being catched by lockdep. At least knowing where the last one was found would be helpful, but the warnings that are produced do not show this information. Even without debugging lockdep, having the WARN() display the last place hard and soft irqs were enabled or disabled is valuable. Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-28 20:24:23 +0000