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* clk: Add set_rate_and_parent() opStephen Boyd2014-01-163-19/+77
* reset: Silence warning in reset-controller.hStephen Boyd2014-01-161-0/+1
* clk: sirf: re-arch to make the codes support both prima2 and atlas6Barry Song2014-01-167-172/+458
* clk: composite: pass mux_hw into determine_rateMike Turquette2014-01-151-1/+1
* Merge branch 'clk-next-shmobile' into clk-nextMike Turquette2014-01-141-4/+8
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| * clk: shmobile: Fix MSTP clock array initializationValentine Barshak2014-01-141-2/+6
| * clk: shmobile: Fix MSTP clock indexValentine Barshak2014-01-141-2/+2
* | Merge tag 'for_3.14/samsung-clk' of git://git.kernel.org/pub/scm/linux/kernel...Mike Turquette2014-01-0814-1170/+1963
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| * | ARM: dts: exynos5420: add input clocks to audss clock controllerAndrew Bresticker2014-01-081-2/+2
| * | clk: exynos-audss: add support for Exynos 5420Andrew Bresticker2014-01-083-10/+40
| * | ARM: dts: exynos5250: add input clocks to audss clock controllerAndrew Bresticker2014-01-081-0/+2
| * | clk: exynos5250: add clock ID for div_pcm0Andrew Bresticker2014-01-083-1/+3
| * | clk: exynos-audss: allow input clocks to be specified in device treeAndrew Bresticker2014-01-082-7/+50
| * | clk: exynos-audss: convert to platform deviceAndrew Bresticker2014-01-081-16/+88
| * | clk: exynos5440: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-47/+34
| * | ARM: exynos5440: create a DT header defining CLK IDsAndrzej Hajda2014-01-081-0/+42
| * | clk: exynos5420: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-339/+309
| * | ARM: exynos5420: create a DT header defining CLK IDsAndrzej Hajda2014-01-081-0/+188
| * | clk: exynos5250: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-295/+264
| * | ARM: exynos5250: create a DT header defining CLK IDsAndrzej Hajda2014-01-081-0/+159
| * | clk: exynos4: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-455/+402
| * | ARM: exynos4: create a DT header defining CLK IDsAndrzej Hajda2014-01-081-0/+244
| * | clk: exynos5250: register APLL rate tableAndrew Bresticker2014-01-081-1/+24
| * | clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apllSachin Kamat2013-12-301-1/+2
| * | clk: samsung: exynos5250: Fix parents of gate clocks from MFC domainTomasz Figa2013-12-301-3/+5
| * | clk: samsung: exynos5250: Correct parent list of audio muxesTomasz Figa2013-12-301-3/+3
| * | clk: samsung: exynos5250: Add missing unpopulated mux parentsTomasz Figa2013-12-301-4/+12
| * | clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domainTomasz Figa2013-12-301-6/+8
| * | clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domainTomasz Figa2013-12-301-8/+17
| * | clk: samsung: exynos5250: Make names of mux and div clocks consistentTomasz Figa2013-12-301-122/+123
| * | clk: samsung: exynos5250: Sort definitions by registers and bitfieldTomasz Figa2013-12-301-102/+188
| * | Merge branch 'samsung-fixes' into samsung-next-baseTomasz Figa2013-12-305-12/+18
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| | * | clk: exynos: File scope reg_save array should depend on PM_SLEEPKrzysztof Kozlowski2013-12-301-5/+5
| | * | clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan2013-12-301-1/+2
| | * | ARM: dts: exynos5250: Fix MDMA0 clock numberAbhilash Kesavan2013-12-301-1/+1
| | * | clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan2013-12-302-1/+6
| | * | clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan2013-12-301-1/+1
| | * | clk: exynos5250: fix sysmmu_mfc{l,r} gate clocksAndrew Bresticker2013-12-301-2/+2
| | * | clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim2013-12-301-1/+1
* | | | ARM: dts: Add clock provider specific properties to max77686 nodeTomasz Figa2014-01-083-0/+3
* | | | clk: max77686: Register OF clock providerTomasz Figa2014-01-083-0/+65
* | | | clk: max77686: Refactor driver data handlingTomasz Figa2014-01-081-13/+14
* | | | clk: max77686: Fix clean-up in error and remove pathsTomasz Figa2014-01-081-19/+10
* | | | clk: max77686: Make max77686_clk_register() return struct clk *Tomasz Figa2014-01-081-7/+10
* | | | clk: max77686: Refactor successful exit of probe functionTomasz Figa2014-01-081-2/+1
* | | | clk: max77686: Provide .recalc_rate() operationTomasz Figa2014-01-081-0/+7
* | | | clk: max77686: Correct callback used for checking clock statusTomasz Figa2014-01-081-2/+2
* | | | MAINTAINERS: Add entry for Samsung SoC clock driversTomasz Figa2014-01-081-0/+6
* | | | Merge branch 'clk-next-unregister' into clk-nextMike Turquette2013-12-3111-19/+235
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| * \ \ \ Merge branch 'clk/clk-unregister' of git://linuxtv.org/snawrocki/samsung into...Mike Turquette2013-12-0411-19/+235
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