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| * | | riscv: add ISA extension parsing for ZtsoClément Léger2024-01-092-0/+2
* | | | use linux/export.h rather than asm-generic/export.hAl Viro2024-01-095-5/+5
* | | | Merge patch series "Fix XIP boot and make XIP testable in QEMU"Palmer Dabbelt2024-01-094-7/+14
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| * | | | riscv: Allow disabling of BUILTIN_DTB for XIPFrederik Haxel2024-01-092-4/+6
| * | | | riscv: Fixed wrong register in XIP_FIXUP_FLASH_OFFSET macroFrederik Haxel2024-01-091-1/+1
| * | | | riscv: Make XIP bootable againFrederik Haxel2024-01-092-2/+7
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* | | | riscv: Remove SHADOW_OVERFLOW_STACK_SIZE macroSong Shuai2024-01-091-1/+0
* | | | Merge remote-tracking branch 'palmer/fixes' into for-nextPalmer Dabbelt2024-01-0911-52/+130
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| * | | | riscv: Fix set_direct_map_default_noflush() to reset _PAGE_EXECAlexandre Ghiti2024-01-091-1/+1
| * | | | riscv: Fix module_alloc() that did not reset the linear mapping permissionsAlexandre Ghiti2024-01-091-1/+2
| * | | | riscv: Fix wrong usage of lm_alias() when splitting a huge linear mappingAlexandre Ghiti2024-01-091-2/+7
| * | | | riscv: Check if the code to patch lies in the exit sectionAlexandre Ghiti2024-01-094-1/+15
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| * | | riscv: errata: andes: Probe for IOCP only once in boot stageLad Prabhakar2023-12-061-7/+13
| * | | riscv: Fix SMP when shadow call stacks are enabledSamuel Holland2023-12-061-1/+1
| * | | dt-bindings: perf: riscv,pmu: drop unneeded quotesRob Herring2023-12-061-1/+1
| * | | riscv: fix misaligned access handling of C.SWSP and C.SDSPClément Léger2023-12-061-4/+2
| * | | RISC-V: hwprobe: Always use u64 for extension bitsAndrew Jones2023-12-061-1/+1
| * | | Support rv32 ULEB128 testCharlie Jenkins2023-12-061-4/+4
| * | | Merge patch series "riscv: Fix issues with module loading"Palmer Dabbelt2023-12-041-30/+84
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| | * | riscv: Correct type casting in module loadingCharlie Jenkins2023-12-041-2/+2
| | * | riscv: Safely remove entries from relocation listCharlie Jenkins2023-12-041-28/+82
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* | | riscv; fix __user annotation in save_v_state()Ben Dooks2024-01-091-1/+1
* | | riscv: fix __user annotation in traps_misaligned.cBen Dooks2024-01-091-3/+3
* | | riscv: Select ARCH_WANTS_NO_INSTRJisheng Zhang2024-01-091-0/+1
* | | Merge patch series "riscv: CPU operations cleanup"Palmer Dabbelt2024-01-099-95/+24
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| * | | riscv: Use the same CPU operations for all CPUsSamuel Holland2024-01-045-23/+18
| * | | riscv: Remove unused members from struct cpu_operationsSamuel Holland2024-01-048-58/+1
| * | | riscv: Deduplicate code in setup_smp()Samuel Holland2024-01-041-20/+11
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* | | riscv: Remove obsolete rv32_defconfig fileSamuel Holland2024-01-091-139/+0
* | | Merge patch series "RISC-V: hwprobe: Introduce which-cpus"Palmer Dabbelt2024-01-0912-348/+693
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| * | | RISC-V: selftests: Add which-cpus hwprobe testAndrew Jones2024-01-032-1/+158
| * | | RISC-V: hwprobe: Introduce which-cpus flagAndrew Jones2024-01-035-14/+204
| * | | RISC-V: Move the hwprobe syscall to its own fileAndrew Jones2024-01-033-285/+290
| * | | RISC-V: hwprobe: Clarify cpus size parameterAndrew Jones2024-01-036-30/+23
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* | | RISC-V: Remove the removed single-letter extensionsPalmer Dabbelt2024-01-032-10/+0
* | | Merge patch series "riscv: Use READ_ONCE()/WRITE_ONCE() for pte accesses"Palmer Dabbelt2023-12-2013-120/+157
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| * | | riscv: Use accessors to page table entries instead of direct dereferenceAlexandre Ghiti2023-12-2010-113/+128
| * | | riscv: mm: Only compile pgtable.c if MMUAlexandre Ghiti2023-12-201-2/+1
| * | | mm: Introduce pudp/p4dp/pgdp_get() functionsAlexandre Ghiti2023-12-202-0/+23
| * | | riscv: Use WRITE_ONCE() when setting page table entriesAlexandre Ghiti2023-12-202-5/+5
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* | | dt-bindings: riscv: cpus: Add AMD MicroBlaze V compatibleMichal Simek2023-12-201-0/+1
* | | Merge patch series "riscv: report more ISA extensions through hwprobe"Palmer Dabbelt2023-12-127-25/+551
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| * dt-bindings: riscv: add Zfa ISA extension descriptionClément Léger2023-12-121-0/+6
| * riscv: hwprobe: export Zfa ISA extensionClément Léger2023-12-123-0/+6
| * riscv: add ISA extension parsing for ZfaClément Léger2023-12-122-0/+2
| * dt-bindings: riscv: add Zvfh[min] ISA extension descriptionClément Léger2023-12-121-0/+12
| * riscv: hwprobe: export Zvfh[min] ISA extensionsClément Léger2023-12-123-0/+12
| * riscv: add ISA extension parsing for Zvfh[min]Clément Léger2023-12-122-0/+4
| * dt-bindings: riscv: add Zihintntl ISA extension descriptionClément Léger2023-12-121-0/+6
| * riscv: hwprobe: export Zhintntl ISA extensionClément Léger2023-12-123-0/+5
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