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* fsi/gpio: Use relative-addressing commandsJeremy Kerr2018-06-121-11/+91
| | | | | | | | | | | | FSI CFAMs support shorter commands that use a relative (or same) address as the last. This change introduces a last_addr to the master state, and uses it for subsequent reads/writes, and performs relative addressing when a subsequent read/write is in range. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/gpio: Include command build in locked sectionJeremy Kerr2018-06-121-7/+18
| | | | | | | | | | For implementing relative addressing mode, we'll need to build a command that is coherent with CFAM state. To do that, include the build_command_* functions in the locked section of read/write/term. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Delay sampling of FSI data inputBenjamin Herrenschmidt2018-06-121-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Most SoC GPIO implementations, including the Aspeed one, have synchronizers on the GPIO inputs. This means that the value read from a GPIO is a couple of clocks old, from whatever clock source feeds those synchronizers. In practice, this means that in no-delay mode, we are using a value that can potentially be a bit too old and too close to the clock edge establishing the data on the other side of the link. The voltage converters we use on some systems make this worse and sensitive to things like voltage fluctuations etc... This is, we believe, the cause of occasional CRC errors encountered during heavy activity on the LPC bus. This is fixed by introducing a dummy GPIO read before the actual data read. It slows down SBEFIFO by about 15% (less than any delay primitive) and the end result is so far solid. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Reduce dpoll clocksBenjamin Herrenschmidt2018-06-121-2/+3
| | | | | | | | | | | | | | | | | FSI_GPIO_DPOLL_CLOCKS is the number of clocks before sending a DPOLL command after receiving a BUSY status. It should be at least tSendDelay (16 clocks). According to comments in the code, it needs to also be at least 21 clocks due to HW issues. It's currently 100 clocks which impacts performances negatively in some cases. Reduces it in half to 50 clocks which seems to still be solid. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Reduce turnaround clocksBenjamin Herrenschmidt2018-06-121-1/+1
| | | | | | | | | | | | | | | | | FSI_GPIO_PRIME_SLAVE_CLOCKS is the number of clocks if the "idle" phase between the end of a response and the beginning of the next one. It corresponds to tSendDelay in the FSI specification. The default value in the slave is 16 clocks. 100 is way overkill and significantly reduces the driver performance. This changes it to 20 (which gives the HW a bit of margin still just in case). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Add "no-gpio-delays" optionBenjamin Herrenschmidt2018-06-124-4/+19
| | | | | | | | | | | | | | | | | This adds support for an optional device-tree property that makes the driver skip all the delays around clocking the GPIOs and set it in the device-tree of common POWER9 based OpenPower platforms. This useful on chips like the AST2500 where the GPIO block is running at a fairly low clock frequency (25Mhz typically). In this case, the delays are unnecessary and due to the low precision of the timers, actually quite harmful in terms of performance. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Sample input data on different clock phaseBenjamin Herrenschmidt2018-06-121-3/+5
| | | | | | | | | | | | | | We currently sample the input data right after we toggle the clock low, then high. The slave establishes the data on the rising edge, so this is not ideal. We should sample it on the low phase instead. This currently works because we have an extra delay, but subsequent patches will remove it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi: gpio: Use a mutex to protect transfersJeremy Kerr2018-06-121-22/+64
| | | | | | | | | | | Reduce time spent with interrupts disabled by limiting the critical sections to bitbanging FSI symbols. We only need to ensure exclusive use of the bus for an entire transfer, not that the transfer be performed in atomic context. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi: gpio: Remove unused 'id' variableAndrew Jeffery2018-06-121-2/+1
| | | | | | Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi: gpio: Trace busy countAndrew Jeffery2018-06-122-0/+19
| | | | | | | | | | | | An observation from trace output of the existing FSI tracepoints was that the remote device was sometimes reporting as busy. Add a new tracepoint reporting the busy count in order to get a better grip on how often this is the case. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Eddie James <eajames@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* Merge tag 'armsoc-late' of ↵Linus Torvalds2018-06-1168-3409/+8943
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late updates from Olof Johansson: "This is a branch with a few merge requests that either came in late, or took a while longer for us to review and merge than usual and thus cut it a bit close to the merge window. We stage them in a separate branch and if things look good, we still send them up -- and that's the case here. This is mostly DT additions for Renesas platforms, adding IP block descriptions for existing and new SoCs. There are also some driver updates for Qualcomm platforms for SMEM/QMI and GENI, which is their generalized serial protocol interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits) soc: qcom: smem: introduce qcom_smem_virt_to_phys() soc: qcom: qmi: fix a buffer sizing bug MAINTAINERS: Update pattern for qcom_scm soc: Unconditionally include qcom Makefile soc: qcom: smem: check sooner in qcom_smem_set_global_partition() soc: qcom: smem: fix qcom_smem_set_global_partition() soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private() soc: qcom: smem: byte swap values properly soc: qcom: smem: return proper type for cached entry functions soc: qcom: smem: fix first cache entry calculation soc: qcom: cmd-db: Make endian-agnostic drivers: qcom: add command DB driver arm64: dts: renesas: salvator-common: Add ADV7482 support ARM: dts: r8a7740: Add CEU1 ARM: dts: r8a7740: Add CEU0 arm64: dts: renesas: salvator-common: enable VIN arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7795-es1: add CSI-2 node ...
| * Merge tag 'renesas-dt-for-v4.18' of ↵Olof Johansson2018-06-0227-554/+1235
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late Renesas ARM Based SoC DT Updates for v4.18 * R-Mobile A1 (r8a7740) SoC - Describe CEU, IRQC, SYS-DMAC and USB devices - Cleanup for consistency with other Renesas SoCs and enhanced maintainability * RZ/A1H (r7s72100) SoC - Describe CEU device * R-Car Gen2, RZ/G1 and RZ/A1H SoCs - Add PMU device nodes * RZ/A1H (r7s72100) SoC - Correct interrupt types * R-Mobile APE6 (r8a73a4) APE4EVM board and SH-Mobile AG5 (sh73a0) SoC - Use generic disable-wp instead of now deprecated toshiba,mmc-wrprotect-disable property * EMMA Mobile EV2 (emev2) and SH-Mobile AG5 (sh73a0) SoCs - Add missing interrupt-affinity to PMU * R-Car H2 (r8a7790) and R-Mobile APE6 (r8a73a4) SoCs - Correct mask for GIC PPI interrupts * R-Car H2 (r8a7790), M2-W (r8a7791), M2-N (r8a7793) and E2 (r8a7794) SoCs - Describe FDP1 instances * R-Car Gen2 and RZ/G1 SoCs - Describe watchdog devices - For R-Car Gen2 this involves updating the SMP routine side as it is changed by a driver updated to allow watchdog device support * Alt board for R-Car E2 (r8a7794) SoC * RBoards for -Car Gen2 SoCs and kzm9d board for EMMA Mobile EV2 (emev2) SoC * iW-RainboW-G23S board for RZ/G1C (r8a77470) SoC - Initial SoC and board support - Enable EtherAVB - Describe all SCIF devices * Boards for R-Car Gen2 SoCs - Enable watchdog support * Wheat board for V2H (r8a7792) SoC - Correct ADV7513 address usage * tag 'renesas-dt-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (69 commits) ARM: dts: r8a7740: Add CEU1 ARM: dts: r8a7740: Add CEU0 ARM: dts: r8a7745: Add PMU device node ARM: dts: r8a7743: Add PMU device node ARM: dts: r8a7794: Add PMU device node ARM: dts: r8a7793: Add PMU device node ARM: dts: r8a7792: Add PMU device node ARM: dts: r8a7791: Add PMU device node ARM: dts: r8a7790: Add PMU device nodes ARM: dts: r7s72100: Add PMU device node ARM: dts: r7s72100: Correct RTC interrupt types ARM: dts: r7s72100: Correct watchdog timer interrupt type ARM: dts: emev2: Add missing interrupt-affinity to PMU node ARM: dts: sh73a0: Add missing interrupt-affinity to PMU node ARM: dts: r8a73a4: Correct mask for GIC PPI interrupts ARM: dts: r8a7790: Correct mask for GIC PPI interrupts ARM: shmobile: r8a7794: alt: add EEPROM to DTS ARM: dts: kzm9d: Drop unnecessary address properties from gpio_keys node ARM: dts: silk: Drop unnecessary address properties from vin port node ARM: dts: alt: Drop unnecessary address properties from vin port node ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * ARM: dts: r8a7740: Add CEU1Simon Horman2018-05-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
| | * ARM: dts: r8a7740: Add CEU0Jacopo Mondi2018-05-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Describe CEU0 peripheral for Renesas R-Mobile A1 R8A7740 Soc. Reported-by: Geert Uytterhoeven <geert@glider.be> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: dropped clock-names property] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7745: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A7 CPU cores on RZ/G1E by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7743: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on RZ/G1M by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7794: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A7 CPU cores on R-Car E2 by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7793: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on R-Car M2-N by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7792: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on R-Car V2H by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7791: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on R-Car M2-W by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7790: Add PMU device nodesGeert Uytterhoeven2018-05-141-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 and Cortex-A7 CPU cores on R-Car H2 by adding device nodes for the two PMUs. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available hw perfevents: /pmu-1: failed to probe PMU! hw perfevents: /pmu-1: failed to register PMU devices! The last two lines are due to the Cortex-A7 CPU cores being described in DT, but not enabled by the firmware. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r7s72100: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A9 CPU core on RZ/A1H by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r7s72100: Correct RTC interrupt typesGeert Uytterhoeven2018-05-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware User's Manual rev. 3.00, the realtime clock interrupts are level not edge interrupts. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r7s72100: Correct watchdog timer interrupt typeGeert Uytterhoeven2018-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware User's Manual rev. 3.00, the watchdog timer interrupt is a level interrupt. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: emev2: Add missing interrupt-affinity to PMU nodeGeert Uytterhoeven2018-05-141-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMU node references two interrupts, but lacks the interrupt-affinity property, which is required in that case: hw perfevents: no interrupt-affinity property for /pmu, guessing. Add the missing property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: sh73a0: Add missing interrupt-affinity to PMU nodeGeert Uytterhoeven2018-05-141-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMU node references two interrupts, but lacks the interrupt-affinity property, which is required in that case: hw perfevents: no interrupt-affinity property for /pmu, guessing. Add the missing property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a73a4: Correct mask for GIC PPI interruptsGeert Uytterhoeven2018-05-141-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R-Mobile APE6 (r8a73a4) contains four Cortex-A15 and four Cortex-A7 cores, hence the second interrupt specifier cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", so GIC interrupts are delivered to all 8 processor cores. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7790: Correct mask for GIC PPI interruptsGeert Uytterhoeven2018-05-141-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R-Car H2 (r8a7790) contains four Cortex-A15 and four Cortex-A7 cores, hence the second interrupt specifier cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", to make sure interrupts can be delivered to all 8 processor cores. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: shmobile: r8a7794: alt: add EEPROM to DTSWolfram Sang2018-05-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Same EEPROM as on Koelsch, et al. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: kzm9d: Drop unnecessary address properties from gpio_keys nodeSimon Horman2018-05-021-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpio_keys node does not have an address and thus does not need address-cells or address size-properties. This is flagged by dtc as follows: # make dtbs W=1 arch/arm/boot/dts/emev2-kzm9d.dtb: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
| | * ARM: dts: silk: Drop unnecessary address properties from vin port nodeSimon Horman2018-05-021-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vin port node does not have an address and thus does not need address-cells or address size-properties. This is flagged by dtc as follows: # make dtbs W=1 arch/arm/boot/dts/r8a7794-silk.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
| | * ARM: dts: alt: Drop unnecessary address properties from vin port nodeSimon Horman2018-05-021-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vin port node does not have an address and thus does not need address-cells or address size-properties. This is flagged by dtc as follows: # make dtbs W=1 arch/arm/boot/dts/r8a7794-alt.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
| | * ARM: dts: koelsch: Drop unnecessary address properties from port nodesSimon Horman2018-05-021-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vin port nodes does not have an address and thus does not need address-cells or address size-properties. This is flagged by dtc as follows: # make dtbs W=1 arch/arm/boot/dts/r8a7791-koelsch.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property arch/arm/boot/dts/r8a7791-koelsch.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef1000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
| | * ARM: dts: gose: Drop unnecessary address properties from port nodesSimon Horman2018-05-021-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vin port nodes does not have an address and thus does not need address-cells or address size-properties. This is flagged by dtc as follows: # make dtbs W=1 arch/arm/boot/dts/r8a7793-gose.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property arch/arm/boot/dts/r8a7793-gose.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef1000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
| | * ARM: dts: porter: Drop unnecessary address properties from vin port nodeSimon Horman2018-05-021-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vin port node does not have an address and thus does not need address-cells or address size-properties. This is flagged by dtc as follows: # make dtbs W=1 arch/arm/boot/dts/r8a7791-porter.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef0000/port: unnecessary #address-cells/#size-cells without Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
| | * ARM: dts: lager: Drop unnecessary address properties from port nodeSimon Horman2018-05-021-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vin port node does not have an address and thus does not need address-cells or address size-properties. This is flagged by dtc as follows: # make dtbs W=1 arch/arm/boot/dts/r8a7790-lager.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef1000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
| | * ARM: dts: r8a7790: Fix sort order of VSP1/FDP1 nodesKieran Bingham2018-05-011-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 5d3b50d3c04d ("ARM: dts: renesas: r8a7790: Add FDP1 instances") introduced the FDP1 for the r8a7790, but broke the sort ordering of the device tree nodes. Move the last VSP up to it's peers to correct the ordering. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: iwg23s-sbc: Add EtherAVB supportBiju Das2018-04-301-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | Define the iW-RainboW-G23S board dependent part of the EtherAVB device node. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a77470: Add EtherAVB supportBiju Das2018-04-301-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Define the generic R8A77470 part of the EtherAVB device node. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: renesas: r8a7790: Add FDP1 instancesLaurent Pinchart2018-04-251-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | The r8a7790 has three FDP1 instances. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a77470: Add SCIF DMA supportBiju Das2018-04-251-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add SCIF DMA support for R8A77470 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a77470: Add SCIF supportBiju Das2018-04-251-2/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Describe SCIF ports in the R8A77470 device tree. Also it fixes the CPG clock index ZS from 6 to 5. Fixes: 6929dfc5918049 ("ARM: dts: r8a77470: Initial SoC device tree") Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: silk: Enable watchdog supportGeert Uytterhoeven2018-04-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the watchdog, so the board can be restarted by a watchdog timeout. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: alt: Enable watchdog supportGeert Uytterhoeven2018-04-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the watchdog, so the board can be restarted by a watchdog timeout. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: gose: Enable watchdog supportGeert Uytterhoeven2018-04-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the watchdog, so the board can be restarted by a watchdog timeout. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: wheat: Enable watchdog supportGeert Uytterhoeven2018-04-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the watchdog, so the board can be restarted by a watchdog timeout. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: blanche: Enable watchdog supportGeert Uytterhoeven2018-04-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the watchdog, so the board can be restarted by a watchdog timeout. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: porter: Enable watchdog supportGeert Uytterhoeven2018-04-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the watchdog, so the board can be restarted by a watchdog timeout. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: koelsch: Enable watchdog supportGeert Uytterhoeven2018-04-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the watchdog, so the board can be restarted by a watchdog timeout. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: lager: Enable watchdog supportGeert Uytterhoeven2018-04-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the watchdog, so the board can be restarted by a watchdog timeout. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-27 23:26:26 +0000