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| | * | PCI: Restore ARI Capable Hierarchy before setting numVFsTony Nguyen2017-10-101-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the restore path, we previously read PCI_SRIOV_VF_OFFSET and PCI_SRIOV_VF_STRIDE before restoring PCI_SRIOV_CTRL_ARI: pci_restore_state pci_restore_iov_state sriov_restore_state pci_iov_set_numvfs pci_read_config_word(... PCI_SRIOV_VF_OFFSET, &iov->offset) pci_read_config_word(... PCI_SRIOV_VF_STRIDE, &iov->stride) pci_write_config_word(... PCI_SRIOV_CTRL, iov->ctrl) But per SR-IOV r1.1, sec 3.3.3.5, the device can use PCI_SRIOV_CTRL_ARI to determine PCI_SRIOV_VF_OFFSET and PCI_SRIOV_VF_STRIDE. Therefore, this path, which is used for suspend/resume and AER recovery, can corrupt iov->offset and iov->stride. Since the iov state is associated with the device, not the driver, if we reload the driver, it will use the the corrupted data, which may cause crashes like this: kernel BUG at drivers/pci/iov.c:157! RIP: 0010:pci_iov_add_virtfn+0x2eb/0x350 Call Trace: pci_enable_sriov+0x353/0x440 ixgbe_pci_sriov_configure+0xd5/0x1f0 [ixgbe] sriov_numvfs_store+0xf7/0x170 dev_attr_store+0x18/0x30 sysfs_kf_write+0x37/0x40 kernfs_fop_write+0x120/0x1b0 vfs_write+0xb5/0x1a0 SyS_write+0x55/0xc0 Restore PCI_SRIOV_CTRL_ARI before calling pci_iov_set_numvfs(), then restore the rest of PCI_SRIOV_CTRL (which may set PCI_SRIOV_CTRL_VFE) afterwards. Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> [bhelgaas: changelog, add comment, also clear ARI if necessary] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alexander Duyck <alexander.h.duyck@intel.com> CC: Emil Tantilov <emil.s.tantilov@intel.com>
| | * | PCI: Create SR-IOV virtfn/physfn links before attaching driverStuart Hayes2017-10-101-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When creating virtual functions, create the "virtfn%u" and "physfn" links in sysfs *before* attaching the driver instead of after. When we attach the driver to the new virtual network interface first, there is a race when the driver attaches to the new sends out an "add" udev event, and the network interface naming software (biosdevname or systemd, for example) tries to look at these links. Signed-off-by: Stuart Hayes <stuart.w.hayes@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Expose SR-IOV offset, stride, and VF device ID via sysfsFilippo Sironi2017-10-101-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Expose the SR-IOV device offset, stride, and VF device ID via sysfs to make it easier for userspace applications to consume them. Signed-off-by: Filippo Sironi <sironi@amazon.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Cache the VF device ID in the SR-IOV structureFilippo Sironi2017-10-052-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cache the VF device ID in the SR-IOV structure and use it instead of reading it over and over from the PF config space capability. Signed-off-by: Filippo Sironi <sironi@amazon.de> [bhelgaas: rename to "vf_device" to match pci_dev->device] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Add Kconfig PCI_IOV dependency for PCI_REALLOC_ENABLE_AUTOSascha El-Sharkawy2017-10-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure only valid Kconfig configurations for PCI_REALLOC_ENABLE_AUTO. This is done by selecting PCI_IOV, which is required by PCI_REALLOC_ENABLE_AUTO to work. Signed-off-by: Sascha El-Sharkawy <elscha@sse.uni-hildesheim.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Remove unused function __pci_reset_function()Jan H. Schönherr2017-10-052-33/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The last caller of __pci_reset_function() has been removed. Remove the function as well. Signed-off-by: Jan H. Schönherr <jschoenh@amazon.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Remove reset argument from pci_iov_{add,remove}_virtfn()Jan H. Schönherr2017-10-053-19/+11
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "reset" argument passed to pci_iov_add_virtfn() and pci_iov_remove_virtfn() is always zero since 46cb7b1bd86f ("PCI: Remove unused SR-IOV VF Migration support") Remove the argument together with the associated code. Signed-off-by: Jan H. Schönherr <jschoenh@amazon.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Russell Currey <ruscur@russell.cc>
| * | Merge branch 'pci/switchtec' into nextBjorn Helgaas2017-11-141-1/+1
| |\ \ | | | | | | | | | | | | | | | | * pci/switchtec: switchtec: Make struct event_regs static
| | * | switchtec: Make struct event_regs staticColin Ian King2017-10-051-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The structure event_regs is local to the source and does not need to be in global scope, so make it static. Cleans up sparse warning: symbol 'event_regs' was not declared. Should it be static Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Logan Gunthorpe <logang@deltatee.com>
| * | Merge branch 'pci/resource' into nextBjorn Helgaas2017-11-148-17/+380
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/resource: PCI: Fail pci_map_rom() if the option ROM is invalid PCI: Move pci_map_rom() error path x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 00-1f, 30-3f, 60-7f) PCI: Add pci_resize_resource() for resizing BARs PCI: Add resizable BAR infrastructure PCI: Add PCI resource type mask #define
| | * | PCI: Fail pci_map_rom() if the option ROM is invalidChangbin Du2017-11-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we detect a invalid PCI option ROM (e.g., invalid ROM header signature), we should unmap it immediately and fail. It doesn't make any sense to return a mapped area with size of 0. I have seen this case on Intel GVTg vGPU, which has no VBIOS. It will not cause a real problem, but we should skip it as early as possible. Signed-off-by: Changbin Du <changbin.du@intel.com> [bhelgaas: split non-functional change into separate patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Move pci_map_rom() error pathChangbin Du2017-11-081-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move pci_map_rom() error code to the end to prepare for adding another error path. No functional change intended. Signed-off-by: Changbin Du <changbin.du@intel.com> [bhelgaas: split non-functional change into separate patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 00-1f, 30-3f, 60-7f)Christian König2017-10-251-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Manually enable a 64GB 64-bit BAR so we have enough room for graphics devices with large framebuffers. Most BIOSes don't enable this for compatibility reasons. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
| | * | PCI: Add pci_resize_resource() for resizing BARsChristian König2017-10-253-0/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a pci_resize_resource() interface to allow device drivers to resize BARs of their devices. This is useful for devices with large local storage, e.g., graphics devices. These devices often only expose 256MB BARs initially to be compatible with 32-bit systems. This function only tries to reprogram the windows of the bridge directly above the requesting device and only the BAR of the same type (usually mem, 64bit, prefetchable). This is done to avoid disturbing other drivers by changing the BARs of their devices. Drivers should use the following sequence to resize their BARs: 1. Disable memory decoding of the device using the PCI cfg dword. 2. Use pci_release_resource() to release all BARs which can move during the resize, including the one you want to resize. 3. Call pci_resize_resource() for each BAR you want to resize. 4. Call pci_assign_unassigned_bus_resources() to reassign new locations for all BARs which are not resized, but could move. 5. If everything worked as expected, enable memory decoding in the device again using the PCI cfg dword. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Add resizable BAR infrastructureChristian König2017-10-243-2/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add resizable BAR infrastructure, including defines and helper functions to read the possible sizes of a BAR and update its size. See PCIe r3.1, sec 7.22. Link: https://pcisig.com/sites/default/files/specification_documents/ECN_Resizable-BAR_24Apr2008.pdf Signed-off-by: Christian König <christian.koenig@amd.com> [bhelgaas: rename to functions with "rebar" (to match #defines), drop shift #defines, drop "_MASK" suffixes, fix typos, fix kerneldoc] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
| | * | PCI: Add PCI resource type mask #defineChristian König2017-10-241-9/+8
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a #define for the PCI resource type mask. We use this mask multiple times in the bus setup. Signed-off-by: Christian König <christian.koenig@amd.com> [bhelgaas: move to setup-bus.c] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
| * | Merge branch 'pci/portdrv' into nextBjorn Helgaas2017-11-141-0/+1
| |\ \ | | | | | | | | | | | | | | | | * pci/portdrv: PCI/portdrv: Turn off PCIe services during shutdown
| | * | PCI/portdrv: Turn off PCIe services during shutdownSinan Kaya2017-11-061-0/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the PCIe services such as AER are being left enabled during shutdown. This might cause spurious AER errors while SOC is being powered down. Clean up the PCIe services gracefully during shutdown to clear these false positives. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | Merge branch 'pci/msi' into nextBjorn Helgaas2017-11-142-96/+77
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/msi: PCI/portdrv: Compute MSI/MSI-X IRQ vectors after final allocation PCI/portdrv: Factor out Interrupt Message Number lookup PCI/portdrv: Consolidate comments PCI/portdrv: Add #defines for AER and DPC Interrupt Message Number masks
| | * | PCI/portdrv: Compute MSI/MSI-X IRQ vectors after final allocationBjorn Helgaas2017-10-211-10/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When setting up portdrv MSI/MSI-X interrupts, we previously allocated the maximum possible number of vectors, read the Interrupt Message Numbers for each service, saved the IRQ for each, freed the vectors, and finally used the largest Message Number to reallocate only as many vectors as we need. The problem is that freeing the vectors invalidates their IRQs, so the saved IRQ numbers may now be invalid, which can result in errors like this: pcie_pme: probe of 0000:00:00.0:pcie001 failed with error -22 pciehp 0000:00:00.0:pcie004: Cannot get irq 20 for the hotplug controller aer: probe of 0000:00:00.0:pcie002 failed with error -22 dpc 0000:00:00.0:pcie010: request IRQ22 failed: -22 Change the setup so we save the Interrupt Message Numbers (not the IRQs) before we free the original setup, then use the Message Numbers to compute the IRQs (via pci_irq_vector()) *after* we reallocate the vectors. This should always be safe for MSI-X because the Message Numbers are fixed. For MSI, the hardware is allowed to change Message Numbers when we update the MSI Multiple Message Enable field when reallocating the vectors, but since we allocate enough vectors to accommodate the largest Message Number we found, that's unlikely. See PCIe r3.1, sec 7.8.2, 7.10.10, 7.31.2. Fixes: 3674cc49da9a ("PCI/portdrv: Use pci_irq_alloc_vectors()") Based-on-patch-by: Dongdong Liu <liudongdong3@huawei.com> Tested-by: Dongdong Liu <liudongdong3@huawei.com> # HiSilicon hip08 Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
| | * | PCI/portdrv: Factor out Interrupt Message Number lookupBjorn Helgaas2017-10-201-48/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Factor out Interrupt Message Number lookup from the MSI/MSI-X interrupt setup. One side effect is that we only have to check once to see if we have enough vectors for all the services. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
| | * | PCI/portdrv: Consolidate commentsBjorn Helgaas2017-10-201-54/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidate some repetitive comments so we can see the code better. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
| | * | PCI/portdrv: Add #defines for AER and DPC Interrupt Message Number masksDongdong Liu2017-10-192-2/+4
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | In the AER case, the mask isn't strictly necessary because there are no higher-order bits above the Interrupt Message Number, but using a #define will make it possible to grep for it. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Dongdong Liu <liudongdong3@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
| * | Merge branch 'pci/misc' into nextBjorn Helgaas2017-11-1422-76/+27
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/misc: PCI: Fix kernel-doc build warning PCI: Move PCI_QUIRKS to the PCI bus menu alpha/PCI: Make pdev_save_srm_config() static PCI: Remove unused declarations PCI: Remove redundant pci_dev, pci_bus, resource declarations PCI: Remove redundant pcibios_set_master() declarations PCI/PME: Handle invalid data when reading Root Status x86/pci/intel_mid_pci: Constify intel_mid_pci_ops and make it __initconst PCI: Constify pci_dev_type structure
| | * | PCI: Fix kernel-doc build warningRandy Dunlap2017-11-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix build error in kernel-doc notation: ../drivers/pci/pci.c:3479: ERROR: Unexpected indentation. "::" tells the kernel-doc "reStructuredText" processor that the following block is a literal block of some blob that should be kept as is. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> [bhelgaas: add hint about "::" meaning] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Move PCI_QUIRKS to the PCI bus menuRandy Dunlap2017-11-072-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Localize PCI_QUIRKS in the PCI bus menu. Move PCI_QUIRKS to the PCI bus menu instead of the (often broken) General Setup EXPERT menu. The prompt still depends on EXPERT. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | alpha/PCI: Make pdev_save_srm_config() staticBjorn Helgaas2017-11-072-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | pdev_save_srm_config() and struct pdev_srm_saved_conf are only used in arch/alpha/kernel/pci.c, so make them static there. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Ingo Molnar <mingo@kernel.org>
| | * | PCI: Remove unused declarationsBjorn Helgaas2017-11-074-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove these unused declarations: pcibios_config_init() # never defined anywhere pcibios_scan_root() # only defined by x86 pcibios_get_irq_routing_table() # only defined by x86 pcibios_set_irq_routing() # only defined by x86 Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@kernel.org>
| | * | PCI: Remove redundant pci_dev, pci_bus, resource declarationsBjorn Helgaas2017-11-0711-28/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <linux/pci.h> defines struct pci_bus and struct pci_dev and includes the struct resource definition before including <asm/pci.h>. Nobody includes <asm/pci.h> directly, so they don't need their own declarations. Remove the redundant struct pci_dev, pci_bus, resource declarations. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Ingo Molnar <mingo@kernel.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> # CRIS Acked-by: Ralf Baechle <ralf@linux-mips.org> # MIPS
| | * | PCI: Remove redundant pcibios_set_master() declarationsBjorn Helgaas2017-11-078-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All users of pcibios_set_master() include <linux/pci.h>, which already has a declaration. Remove the unnecessary declarations from the <asm/pci.h> files. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@kernel.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> # CRIS Acked-by: Ralf Baechle <ralf@linux-mips.org> # MIPS
| | * | PCI/PME: Handle invalid data when reading Root StatusQiang2017-11-071-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCIe PME and native hotplug share the same interrupt number, so hotplug interrupts are also processed by PME. In some cases, e.g., a Link Down interrupt, a device may be present but unreachable, so when we try to read its Root Status register, the read fails and we get all ones data (0xffffffff). Previously, we interpreted that data as PCI_EXP_RTSTA_PME being set, i.e., "some device has asserted PME," so we scheduled pcie_pme_work_fn(). This caused an infinite loop because pcie_pme_work_fn() tried to handle PME requests until PCI_EXP_RTSTA_PME is cleared, but with the link down, PCI_EXP_RTSTA_PME can't be cleared. Check for the invalid 0xffffffff data everywhere we read the Root Status register. 1469d17dd341 ("PCI: pciehp: Handle invalid data when reading from non-existent devices") added similar checks in the hotplug driver. Signed-off-by: Qiang Zheng <zhengqiang10@huawei.com> [bhelgaas: changelog, also check in pcie_pme_work_fn(), use "~0" to follow other similar checks] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | x86/pci/intel_mid_pci: Constify intel_mid_pci_ops and make it __initconstBhumika Goyal2017-10-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make this const as it is only used during a copy operation. This usage is inside init function and the structure is not referenced after initialisation, so make it __initconst too. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Constify pci_dev_type structureBhumika Goyal2017-10-052-2/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | Make this const as it not modified in the file referencing it. It is only stored in a const field 'type' of a device structure. Also, add const to the variable declaration in the header file. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | Merge branch 'pci/hotplug' into nextBjorn Helgaas2017-11-1417-116/+419
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/hotplug: PCI: pciehp: Do not clear Presence Detect Changed during initialization PCI: pciehp: Fix race condition handling surprise link down PCI: Distribute available resources to hotplug-capable bridges PCI: Distribute available buses to hotplug-capable bridges PCI: Do not allocate more buses than available in parent PCI: Open-code the two pass loop when scanning bridges PCI: Move pci_hp_add_bridge() to drivers/pci/probe.c PCI: Add for_each_pci_bridge() helper PCI: shpchp: Convert timers to use timer_setup() PCI: cpqphp: Convert timers to use timer_setup() PCI: pciehp: Convert timers to use timer_setup() PCI: ibmphp: Use common error handling code in unconfigure_boot_device()
| | * | PCI: pciehp: Do not clear Presence Detect Changed during initializationMika Westerberg2017-11-061-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is possible that the hotplug event has already happened before the driver is attached to a PCIe hotplug downstream port. If we just clear the status we never get the hotplug interrupt and thus the event will be missed. To make sure that does not happen, we leave Presence Detect Changed bit untouched during initialization. Then once the event is unmasked we get an interrupt and handle the hotplug event properly. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: pciehp: Fix race condition handling surprise link downMika Westerberg2017-11-063-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A surprise link down may retrain very quickly causing the same slot generate a link up event before handling the link down event completes. Since the link is active, the power off work queued from the first link down will cause a second down event when power is disabled. However, the link up event sets the slot state to POWERON_STATE before the event to handle this is enqueued, making the second down event believe it needs to do something. This creates constant link up and down event cycle. To prevent this it is better to handle each event at the time in order it occurred, so change the driver to use ordered workqueue instead. A normal device hotplug triggers two events (presense detect and link up) that are already handled properly in the driver but we currently log an error if we find an existing device in the slot. Since this is not an error change the log level to be debug instead to avoid scaring users. This is based on the original work by Ashok Raj. Link: https://patchwork.kernel.org/patch/9469023 Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Distribute available resources to hotplug-capable bridgesMika Westerberg2017-11-061-0/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The same problem that we have with bus space applies to other resources as well. Linux only allocates the minimal amount of resources so that the devices currently present barely fit there. This prevents extending the chain later on because the resource windows allocated for hotplug downstream ports are too small. Follow what we already did for bus number and assign all available extra resources to hotplug-capable bridges. This makes it possible to extend the hierarchy later. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Distribute available buses to hotplug-capable bridgesMika Westerberg2017-11-061-18/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | System BIOS sometimes allocates extra bus space for hotplug-capable PCIe root/downstream ports. This space is needed if the device plugged to the port will have more hotplug-capable downstream ports. A good example of this is Thunderbolt. Each Thunderbolt device contains a PCIe switch and one or more hotplug-capable PCIe downstream ports where the daisy chain can be extended. Currently Linux only allocates minimal bus space to make sure all the enumerated devices barely fit there. The BIOS reserved extra space is not taken into consideration at all. Because of this we run out of bus space pretty quickly when more PCIe devices are attached to hotplug downstream ports in order to extend the chain. Modify the PCI core so we distribute the available BIOS allocated bus space equally between hotplug-capable bridges to make sure there is enough bus space for extending the hierarchy later on. Update kernel docs of the affected functions. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Do not allocate more buses than available in parentMika Westerberg2017-11-061-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One can ask more buses to be reserved for hotplug bridges by passing pci=hpbussize=N in the kernel command line. If the parent bus does not have enough bus space available we incorrectly create child bus with the requested number of subordinate buses. In the example below hpbussize is set to one more than we have available buses in the root port: pci 0000:07:00.0: [8086:1578] type 01 class 0x060400 pci 0000:07:00.0: scanning [bus 00-00] behind bridge, pass 0 pci 0000:07:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:07:00.0: scanning [bus 00-00] behind bridge, pass 1 pci_bus 0000:08: busn_res: can not insert [bus 08-ff] under [bus 07-3f] (conflicts with (null) [bus 07-3f]) pci_bus 0000:08: scanning bus ... pci_bus 0000:0a: bus scan returning with max=40 pci_bus 0000:0a: busn_res: [bus 0a-ff] end is updated to 40 pci_bus 0000:0a: [bus 0a-40] partially hidden behind bridge 0000:07 [bus 07-3f] pci_bus 0000:08: bus scan returning with max=40 pci_bus 0000:08: busn_res: [bus 08-ff] end is updated to 40 Instead of allowing this, limit the subordinate number to be less than or equal the maximum subordinate number allocated for the parent bus (if it has any). Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> [bhelgaas: remove irrelevant dmesg messages] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Open-code the two pass loop when scanning bridgesMika Westerberg2017-11-061-7/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current scanning code is really hard to understand because it calls the same function in a loop where pass value is changed without any comments explaining it: for (pass = 0; pass < 2; pass++) for_each_pci_bridge(dev, bus) max = pci_scan_bridge(bus, dev, max, pass); Unfamiliar reader cannot tell easily what is the purpose of this loop without looking at internals of pci_scan_bridge(). In order to make this bit easier to understand, open-code the loop in pci_scan_child_bus() and pci_hp_add_bridge() with added comments. No functional changes intended. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Move pci_hp_add_bridge() to drivers/pci/probe.cMika Westerberg2017-11-063-32/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is not much point of having a file with a single function in it. Instead we can just move pci_hp_add_bridge() to drivers/pci/probe.c and make it available always when PCI core is enabled. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> [bhelgaas: convert printk to dev_err()] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: Add for_each_pci_bridge() helperAndy Shevchenko2017-11-068-32/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following pattern is often used: list_for_each_entry(dev, &bus->devices, bus_list) { if (pci_is_bridge(dev)) { ... } } Add a for_each_pci_bridge() helper to make that code easier to write and read by reducing indentation level. It also saves one or few lines of code in each occurrence. Convert PCI core parts here at the same time. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> [bhelgaas: fold in http://lkml.kernel.org/r/20171013165352.25550-1-andriy.shevchenko@linux.intel.com] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: shpchp: Convert timers to use timer_setup()Kees Cook2017-11-061-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Arvind Yadav <arvind.yadav.cs@gmail.com> Cc: Quentin Lambert <lambert.quentin@gmail.com> Cc: Aleksandr Bezzubikov <zuban32s@gmail.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com>
| | * | PCI: cpqphp: Convert timers to use timer_setup()Kees Cook2017-11-063-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. This has the result of fixing pushbutton_helper_thread(), which was truncating the event pointer to 32 bits. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Arvind Yadav <arvind.yadav.cs@gmail.com> Cc: Quentin Lambert <lambert.quentin@gmail.com> Cc: Aleksandr Bezzubikov <zuban32s@gmail.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com>
| | * | PCI: pciehp: Convert timers to use timer_setup()Kees Cook2017-11-061-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. This fixes what appears to be a bug in passing the wrong pointer to the timer handler (address of ctrl pointer instead of ctrl pointer). Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Mayurkumar Patel <mayurkumar.patel@intel.com> Cc: Keith Busch <keith.busch@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de>
| | * | PCI: ibmphp: Use common error handling code in unconfigure_boot_device()Markus Elfring2017-11-061-8/+11
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | Combine two error paths that emit the same message and return the same error code. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> [bhelgaas: changelog] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | Merge branch 'pci/endpoint' into nextBjorn Helgaas2017-11-141-2/+31
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/endpoint: misc: pci_endpoint_test: Fix BUG_ON error during pci_disable_msi() misc: pci_endpoint_test: Fix pci_endpoint_test not releasing resources on remove misc: pci_endpoint_test: Fix failure path return values in probe misc: pci_endpoint_test: Avoid triggering a BUG() misc: pci_endpoint_test: Prevent some integer overflows
| | * | misc: pci_endpoint_test: Fix BUG_ON error during pci_disable_msi()Kishon Vijay Abraham I2017-10-311-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_disable_msi() throws a Kernel BUG if the driver has successfully requested an IRQ and not released it. Fix it here by freeing IRQs before invoking pci_disable_msi(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | misc: pci_endpoint_test: Fix pci_endpoint_test not releasing resources on removeKishon Vijay Abraham I2017-10-311-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) in pci_endpoint_test_remove() returns 0, which results in returning early without releasing the resources. This is as a result of misc_device not having a valid name. Fix it here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | misc: pci_endpoint_test: Fix failure path return values in probeKishon Vijay Abraham I2017-10-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Return value of pci_endpoint_test_probe is not set properly in a couple of failure cases. Fix it here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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