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* ms_block: fix spelling mistake "randomally" -> "randomly"Colin Ian King2019-09-111-1/+1
| | | | | | | There is a spelling mistake in a dbg_verbose message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: hi3798cv200: make array degrees static const, makes object smallerColin Ian King2019-09-111-1/+1
| | | | | | | | | | | | | | | | | | Don't populate the array degrees on the stack but instead make it static const. Makes the object code smaller by 46 bytes. Before: text data bss dec hex filename 5356 1560 0 6916 1b04 dw_mmc-hi3798cv200.o After: text data bss dec hex filename 5214 1656 0 6870 1ad6 dw_mmc-hi3798cv200.o (gcc version 9.2.1, amd64) Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Convert to use sdio_irq_claimed()Ulf Hansson2019-09-112-7/+1
| | | | | | | | | Instead of keeping track of whether SDIO IRQs have been enabled via an internal sdhci status flag, avoid the open-coding and convert into using sdio_irq_claimed(). Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Drop redundant code for SDIO IRQsUlf Hansson2019-09-113-25/+16
| | | | | | | | | | | | | | | | Nowadays sdhci prevents runtime suspend when SDIO IRQs are enabled. However, some variants such as sdhci-esdhc-imx's, tries to allow runtime suspend while having the SDIO IRQs enabled, but without supporting remote wakeups. This support is a bit questionable, especially if the host device have a PM domain attached that can be power gated, but more importantly, the code have also become redundant (which was not the case when it was introduced). Rather than keeping the redundant code around, let's drop it and leave this to be revisited later on. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Drop redundant check in sdhci_ack_sdio_irq()Ulf Hansson2019-09-111-2/+1
| | | | | | | | | | | The sdhci_ack_sdio_irq() is called only when SDIO IRQs are enabled. Therefore, let's drop the redundant check of the internal SDHCI_SDIO_IRQ_ENABLED flag and just re-enable the IRQs immediately. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Fixup processing of SDIO IRQs during system suspend/resumeUlf Hansson2019-09-112-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | System suspend/resume of SDIO cards, with SDIO IRQs enabled and when using MMC_CAP2_SDIO_IRQ_NOTHREAD is unfortunate still suffering from a fragile behaviour. Some problems have been taken care of so far, but more issues remains. For example, calling the ->ack_sdio_irq() callback to let host drivers re-enable the SDIO IRQs is a bad idea, unless the IRQ have been consumed, which may not be the case during system suspend/resume. This may lead to that a host driver re-signals the same SDIO IRQ over and over again, causing a storm of IRQs and gives a ping-pong effect towards the sdio_irq_work(). Moreover, calling the ->enable_sdio_irq() callback at system resume to re-enable already enabled SDIO IRQs for the host, causes the runtime PM count for some host drivers to become in-balanced. This then leads to the host to remain runtime resumed, no matter if it's needed or not. To fix these problems, let's check if process_sdio_pending_irqs() actually consumed the SDIO IRQ, before we continue to ack the IRQ by invoking the ->ack_sdio_irq() callback. Additionally, there should be no need to re-enable SDIO IRQs as the host driver already knows if they were enabled at system suspend, thus also whether it needs to re-enable them at system resume. For this reason, drop the call to ->enable_sdio_irq() during system resume. In regards to these changes there is yet another issue, which is when there is an SDIO IRQ being signaled by the host driver, but after the SDIO card has been system suspended. Currently these IRQs are just thrown away, while we should at least make sure to try to consume them when the SDIO card has been system resumed. Fix this by queueing a sdio_irq_work() after we system resumed the SDIO card. Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: WARN if SDIO IRQs are enabled for non-powered card in suspendUlf Hansson2019-09-111-0/+2
| | | | | | | | | | To make sure SDIO func drivers behaves correctly during system suspend/resume, let add a WARN_ON in case the condition is a non-powered SDIO card and there are some SDIO IRQs still being claimed. Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Clarify that the ->ack_sdio_irq() callback is mandatoryUlf Hansson2019-09-112-2/+2
| | | | | | | | | | | | | | | | For the MMC_CAP2_SDIO_IRQ_NOTHREAD case and when using sdio_signal_irq(), the ->ack_sdio_irq() is already mandatory, which was not the case for those host drivers that called sdio_run_irqs() directly. As there are no longer any drivers calling sdio_run_irqs(), let's clarify the code by dropping the unnecessary check and explicitly state that the callback is mandatory in the header file. Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Clarify sdio_irq_pending flag for MMC_CAP2_SDIO_IRQ_NOTHREADUlf Hansson2019-09-111-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sdio_irq_pending flag is used to let host drivers indicate that it has signaled an IRQ. If that is the case and we only have a single SDIO func that have claimed an SDIO IRQ, our assumption is that we can avoid reading the SDIO_CCCR_INTx register and just call the SDIO func irq handler immediately. This makes sense, but the flag is set/cleared in a somewhat messy order, let's fix that up according to below. First, the flag is currently set in sdio_run_irqs(), which is executed as a work that was scheduled from sdio_signal_irq(). To make it more implicit that the host have signaled an IRQ, let's instead immediately set the flag in sdio_signal_irq(). This also makes the behavior consistent with host drivers that uses the legacy, mmc_signal_sdio_irq() API. This have no functional impact, because we don't expect host drivers to call sdio_signal_irq() until after the work (sdio_run_irqs()) have been executed anyways. Second, currently we never clears the flag when using the sdio_run_irqs() work, but only when using the sdio_irq_thread(). Let make the behavior consistent, by moving the flag to be cleared inside the common process_sdio_pending_irqs() function. Additionally, tweak the behavior of the flag slightly, by avoiding to clear it unless we processed the SDIO IRQ. The purpose with this at this point, is to keep the information about whether there have been an SDIO IRQ signaled by the host, so at system resume we can decide to process it without reading the SDIO_CCCR_INTx register. Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Move code to get pending SDIO IRQs to a functionMatthias Kaehlcke2019-09-111-16/+30
| | | | | | | | | | | | To improve code quality, let's move the code that gets pending SDIO IRQs from process_sdio_pending_irqs() into a dedicated function. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> [Ulf: Converted function into static] Tested-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mtk-sd: Re-store SDIO IRQs mask at system resumeUlf Hansson2019-09-111-0/+3
| | | | | | | | | | | | | | | | | In cases when SDIO IRQs have been enabled, runtime suspend is prevented by the driver. However, this still means msdc_runtime_suspend|resume() gets called during system suspend/resume, via pm_runtime_force_suspend|resume(). This means during system suspend/resume, the register context of the mtk-sd device most likely loses its register context, even in cases when SDIO IRQs have been enabled. To re-enable the SDIO IRQs during system resume, the mtk-sd driver currently relies on the mmc core to re-enable the SDIO IRQs when it resumes the SDIO card, but this isn't the recommended solution. Instead, it's better to deal with this locally in the mtk-sd driver, so let's do that. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: Re-store SDIO IRQs mask at system resumeUlf Hansson2019-09-111-0/+4
| | | | | | | | | | | | | | | | | | | In cases when SDIO IRQs have been enabled, runtime suspend is prevented by the driver. However, this still means dw_mci_runtime_suspend|resume() gets called during system suspend/resume, via pm_runtime_force_suspend|resume(). This means during system suspend/resume, the register context of the dw_mmc device most likely loses its register context, even in cases when SDIO IRQs have been enabled. To re-enable the SDIO IRQs during system resume, the dw_mmc driver currently relies on the mmc core to re-enable the SDIO IRQs when it resumes the SDIO card, but this isn't the recommended solution. Instead, it's better to deal with this locally in the dw_mmc driver, so let's do that. Tested-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Add helper function to indicate if SDIO IRQs is enabledUlf Hansson2019-09-111-0/+9
| | | | | | | | | | | | | | | | To avoid each host driver supporting SDIO IRQs, from keeping track internally about if SDIO IRQs has been claimed, let's introduce a common helper function, sdio_irq_claimed(). The function returns true if SDIO IRQs are claimed, via using the information about the number of claimed irqs. This is safe, even without any locks, as long as the helper function is called only from runtime/system suspend callbacks of the host driver. Tested-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* Merge branch 'fixes' into nextUlf Hansson2019-09-112-2/+2
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| * Revert "mmc: sdhci: Remove unneeded quirk2 flag of O2 SD host controller"Daniel Drake2019-09-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 414126f9e5abf1973c661d24229543a9458fa8ce. This commit broke eMMC storage access on a new consumer MiniPC based on AMD SoC, which has eMMC connected to: 02:00.0 SD Host controller: O2 Micro, Inc. Device 8620 (rev 01) (prog-if 01) Subsystem: O2 Micro, Inc. Device 0002 During probe, several errors are seen including: mmc1: Got data interrupt 0x02000000 even though no data operation was in progress. mmc1: Timeout waiting for hardware interrupt. mmc1: error -110 whilst initialising MMC card Reverting this commit allows the eMMC storage to be detected & usable again. Signed-off-by: Daniel Drake <drake@endlessm.com> Fixes: 414126f9e5ab ("mmc: sdhci: Remove unneeded quirk2 flag of O2 SD host controller") Cc: stable@vger.kernel.org # v5.1+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * Revert "mmc: bcm2835: Terminate timeout work synchronously"Stefan Wahren2019-09-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The commit 37fefadee8bb ("mmc: bcm2835: Terminate timeout work synchronously") causes lockups in case of hardware timeouts due the timeout work also calling cancel_delayed_work_sync() on its own. So revert it. Fixes: 37fefadee8bb ("mmc: bcm2835: Terminate timeout work synchronously") Cc: stable@vger.kernel.org Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-pci-o2micro: Fix O2 Host data read/write DLL Lock phase shift issueShirley Her (SC)2019-09-111-2/+122
| | | | | | | | | | | | | | | | Fix data read/write error in HS200 mode due to chip DLL lock phase shift Signed-off-by: Shirley Her <shirley.her@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-pci-o2micro: Move functions in preparation to fix DLL lock phase ↵Shirley Her (SC)2019-09-111-93/+94
| | | | | | | | | | | | | | | | | | | | shift issue Move functions in preparation to fix DLL lock phase shift issue Signed-off-by: Shirley Her <shirley.her@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-pci-o2micro: Change O2 Host PLL and DLL register nameShirley Her (SC)2019-09-111-8/+8
| | | | | | | | | | | | | | | | Change O2 Host PLL and DLL register name Signed-off-by: Shirley Her <shirley.her@bayhubtech.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci: Fix incorrect switch to HS modeAl Cooper2019-09-111-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When switching from any MMC speed mode that requires 1.8v (HS200, HS400 and HS400ES) to High Speed (HS) mode, the system ends up configured for SDR12 with a 50MHz clock which is an illegal mode. This happens because the SDHCI_CTRL_VDD_180 bit in the SDHCI_HOST_CONTROL2 register is left set and when this bit is set, the speed mode is controlled by the SDHCI_CTRL_UHS field in the SDHCI_HOST_CONTROL2 register. The SDHCI_CTRL_UHS field will end up being set to 0 (SDR12) by sdhci_set_uhs_signaling() because there is no UHS mode being set. The fix is to change sdhci_set_uhs_signaling() to set the SDHCI_CTRL_UHS field to SDR25 (which is the same as HS) for any switch to HS mode. This was found on a new eMMC controller that does strict checking of the speed mode and the corresponding clock rate. It caused the switch to HS400 mode to fail because part of the sequence to switch to HS400 requires a switch from HS200 to HS before going to HS400. Suggested-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Al Cooper <alcooperx@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-of-aspeed: Depend on CONFIG_OF_ADDRESSAndrew Jeffery2019-09-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Resolves the following build error reported by the 0-day bot: ERROR: "of_platform_device_create" [drivers/mmc/host/sdhci-of-aspeed.ko] undefined! SPARC does not set CONFIG_OF_ADDRESS so the symbol is missing. Depend on CONFIG_OF_ADDRESS to ensure the driver is only built for supported configurations. Fixes: 2d28dbe042f4 ("mmc: sdhci-of-aspeed: Add support for the ASPEED SD controller") Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-of-aspeed: Allow max-frequency limitation of SDCLKAndrew Jeffery2019-09-111-2/+18
| | | | | | | | | | | | | | | | | | | | Add a get_max_clock() handler to sdhci-of-aspeed to report f_max as the maximum clock rate if it is set. This enables artificial limitation of the bus speed via max-frequency in the devicetree for e.g. the AST2600 evaluation board where I was seeing errors at 200MHz. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-of-aspeed: Uphold clocks-on post-condition of set_clock()Andrew Jeffery2019-09-111-3/+0
| | | | | | | | | | | | | | | | | | | | The early-exit didn't seem to matter on the AST2500, but on the AST2600 the SD clock genuinely may not be running on entry to aspeed_sdhci_set_clock(). Remove the early exit to ensure we always run sdhci_enable_clk(). Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-of-aspeed: Drop redundant assignment to host->clockAndrew Jeffery2019-09-111-4/+1
| | | | | | | | | | | | | | | | host->clock is already managed by sdhci_set_ios(). Suggested-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmc_spi: Convert to use for_each_sg()Andy Shevchenko2019-09-111-1/+1
| | | | | | | | | | | | | | | | | | Use for_each_sg() macro instead of open coded variant. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhi: fill in actual_clockTamás Szűcs2019-09-111-5/+8
| | | | | | | | | | | | | | | | | | | | Save set clock in mmc_host actual_clock enabling exporting it via debugfs. This will indicate the precise SD clock in I/O settings rather than only the sometimes misleading requested clock. Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci: use lower/upper_32_bits() macros for DMA addressesMasahiro Yamada2019-09-111-14/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the DMA addresses are casted to (u64) for the upper 32bits to avoid "right shift count >= width of type" warning. <linux/kernel.h> provides macros to address this, and I like the macro names are self-documenting. I introduced a new helper, sdhci_set_adma_addr() to avoid the code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-cadence: override spec versionMasahiro Yamada2019-09-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The datasheet of the IP (sd4hc) says it is compiatible with SDHCI v4, but the spec version field in the version register is read as 2 (i.e. SDHCI_SPEC_300) based on the RTL provided by Cadence. Socionext did not fix it up when it integrated the IP into the SoCs. So, it is working as SDHCI v3. It is not a real problem because there is no difference in the program flow in sdhci.c between SDHCI_SPEC_300/400, but set the real version just in case. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci: constify references of parameters to __sdhci_read_caps()Masahiro Yamada2019-09-112-3/+4
| | | | | | | | | | | | | | | | | | | | | | __sdhci_read_caps() does not modify *ver, *caps, or *caps1. Probably, the caller of this function will want to constifythe parameters passed in. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mediatek: enable SDIO IRQ low level trigger functionyong mao2019-09-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | SDIO IRQ is not defaultly triggered by low level, but by falling edge. It needs to set related register to enable SDIO IRQ low level trigger function. Otherwise the SDIO IRQ may be lost in some specail condition. Signed-off-by: Yong Mao <yong.mao@mediatek.com> Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci: Export sdhci_abort_tuning function symbolBen Chuang2019-09-112-1/+3
| | | | | | | | | | | | | | | | | | | | | | Export sdhci_abort_tuning() function symbols which are used by other SD Host controller driver modules. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Co-developed-by: Michael K Johnson <johnsonm@danlj.org> Signed-off-by: Michael K Johnson <johnsonm@danlj.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | PCI: Add Genesys Logic, Inc. Vendor IDBen Chuang2019-09-111-0/+2
| | | | | | | | | | | | | | | | | | | | Add the Genesys Logic, Inc. vendor ID to pci_ids.h. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Co-developed-by: Michael K Johnson <johnsonm@danlj.org> Signed-off-by: Michael K Johnson <johnsonm@danlj.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci: Add PLL Enable support to internal clock setupBen Chuang2019-09-112-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable setup as part of the internal clock setup as described in 3.2.1 Internal Clock Setup Sequence of SD Host Controller Simplified Specification Version 4.20. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Co-developed-by: Michael K Johnson <johnsonm@danlj.org> Signed-off-by: Michael K Johnson <johnsonm@danlj.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci: Change timeout of loop for checking internal clock stableBen Chuang2019-09-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | According to section 3.2.1 internal clock setup in SD Host Controller Simplified Specifications 4.20, the timeout of loop for checking internal clock stable is defined as 150ms. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Co-developed-by: Michael K Johnson <johnsonm@danlj.org> Signed-off-by: Michael K Johnson <johnsonm@danlj.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-of-arasan: Add Support for Intel LGM eMMCRamuthevar Vadivel Muruganx2019-09-111-0/+15
| | | | | | | | | | | | | | | | | | | | | | The current arasan sdhci PHY configuration isn't compatible with the PHY on Intel's LGM(Lightning Mountain) SoC devices. Therefore, add a new compatible, to adapt the Intel's LGM eMMC PHY with arasan-sdhc controller to configure the PHY. Signed-off-by: Ramuthevar Vadivel Muruganx <vadivel.muruganx.ramuthevar@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | dt-bindings: mmc: sdhci-of-arasan: Add new compatible for Intel LGM eMMCRamuthevar Vadivel Murugan2019-09-111-0/+17
| | | | | | | | | | | | | | | | Add a new compatible to use the sdhc-arasan host controller driver with the eMMC PHY on Intel's Lightning Mountain SoC. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-of-aspeed: Fix return value check in aspeed_sdc_probe()Wei Yongjun2019-09-111-2/+2
| | | | | | | | | | | | | | | | | | | | In case of error, the function of_platform_device_create() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | dt-bindings: mmc: sdhci-of-aspeed: Update example ranges propertyAndrew Jeffery2019-09-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The example node in the binding uses the AST2500 compatible string for the SD controller with a 64kiB ranges property, but the SD controller is allocated 128kiB of MMIO space according to the AST2500 datasheet. Fix the example to correctly reflect the hardware in the AST2500, however it should be noted that the MMIO region is reduced to 64kiB in the AST2600 where a second SD controller block has been introduced into the address space. Also add the IBM copyright header that I left out of the initial patch. Suggested-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: bcm2835: Take SWIOTLB memory size limitation into accountStefan Wahren2019-09-111-1/+1
| | | | | | | | | | | | | | | | Make sure the sdhost driver doesn't use requests bigger than SWIOTLB can handle. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-of-aspeed: Add support for the ASPEED SD controllerAndrew Jeffery2019-09-113-0/+345
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a minimal driver for ASPEED's SD controller, which exposes two SDHCIs. The ASPEED design implements a common register set for the SDHCIs, and moves some of the standard configuration elements out to this common area (e.g. 8-bit mode, and card detect configuration which is not currently supported). The SD controller has a dedicated hardware interrupt that is shared between the slots. The common register set exposes information on which slot triggered the interrupt; early revisions of the patch introduced an irqchip for the register, but reality is it doesn't behave as an irqchip, and the result fits awkwardly into the irqchip APIs. Instead I've taken the simple approach of using the IRQ as a shared IRQ with some minor performance impact for the second slot. Ryan was the original author of the patch - I've taken his work and massaged it to drop the irqchip support and rework the devicetree integration. The driver has been smoke tested under qemu against a minimal SD controller model and lightly tested on an ast2500-evb. Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | dt-bindings: mmc: sdhci-of-aspeed: Document Aspeed SD controllerAndrew Jeffery2019-09-111-0/+105
| | | | | | | | | | | | | | | | | | | | | | The ASPEED SD/SDIO/MMC controller exposes two slots implementing the SDIO Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if only a single slot is enabled. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mediatek: support 24bits segment sizeChaotian Jing2019-09-111-3/+13
| | | | | | | | | | | | | | | | MSDC IP which support 64G DRAM will support 24bits BDMA buffer length, so add support it. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mediatek: fix controller busy when plug out SDChaotian Jing2019-09-111-3/+5
| | | | | | | | | | | | | | | | | | | | when plug out SD card, may get data CRC error, the MMC core will issue CMD13 to get card status, then CMD13 timeout(due to card plug out) will trigger CMD19 tuning, first CMD19 timeout has not call msdc_reset_hw() and cause the next CMD19 gets controller busy. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: renesas_sdhi_sys_dmac: Remove all R-Car Gen3 SoCsYoshihiro Shimoda2019-09-111-36/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All R-Car Gen3 SoCs with any ES version cannot use this DMAC actually. So, this patch removes the compatibles of R-Car Gen3 SoCs from renesas_sdhi_sys_dmac_of_match. Since the previous code has an empty whitelist to prevent probing of R-Car Gen3 SoCs, no behavior changes. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: jz4740: Drop dependency on arch headerPaul Cercueil2019-09-111-4/+0
| | | | | | | | | | | | | | | | We don't need to set the 'slave_id' anymore - that field is never read by the DMA driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: jz4740: Code cleanupPaul Cercueil2019-09-111-7/+7
| | | | | | | | | | | | | | | | Fix wrong code indentation which made the code hard to read, and fix return with value in void function. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-cadence: use struct_size() helperGustavo A. R. Silva2019-09-111-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct sdhci_cdns_priv { ... struct sdhci_cdns_phy_param phy_params[0]; }; Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes. So, replace the following form: sizeof(*priv) + sizeof(priv->phy_params[0]) * nr_phy_params with: struct_size(priv, phy_params, nr_phy_params) Also, notice that, in this case, variable priv_size is not necessary, hence it is removed. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-of-esdhc: add erratum A011334 support in ls1028a 1.0 SoCYinbo Zhu2019-09-111-0/+1
| | | | | | | | | | | | | | | | This patch is to add erratum A011334 support in ls1028a 1.0 SoC Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: Remove dev_err() usage after platform_get_irq()Stephen Boyd2019-09-1110-19/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-mmc@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-pci: Add another Id for Intel CMLAdrian Hunter2019-09-112-0/+2
| | | | | | | | | | | | | | Add another PCI Id for Intel CML. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-20 13:39:28 +0000