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* drm/gma500: Add generic cursor functionsPatrik Jakobsson2013-07-242-0/+156
| | | | Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/psb: Convert to generic crtc->destroyPatrik Jakobsson2013-07-241-22/+1
| | | | Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/mdfld: Use identical generic crtc funcsPatrik Jakobsson2013-07-241-22/+3
| | | | | | | Use the generic gma functions instead of the medfield functions where they are identical. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/oak: Use identical generic crtc funcsPatrik Jakobsson2013-07-241-22/+3
| | | | | | | Use the generic gma functions instead of the oaktrail functions where they are identical. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/psb: Convert to gma_crtc_dpms()Patrik Jakobsson2013-07-241-103/+1
| | | | Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500: Convert to generic gamma funcsPatrik Jakobsson2013-07-246-73/+6
| | | | | | | | This takes care of the remaining chips using the old generic code. We don't check if the pipe number is valid but the old code peeked in the register map before checking anyways so just ignore it. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/psb: Convert to gma_pipe_set_base()Patrik Jakobsson2013-07-241-72/+1
| | | | Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/cdv: Convert to generic gamma funcsPatrik Jakobsson2013-07-241-69/+1
| | | | | | | | There is a slight difference in how we pick the palette register in the generic function but we should be ok as long as psb_intel_crtc->pipe and the register map is sane. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/cdv: Convert to gma_crtc_dpms()Patrik Jakobsson2013-07-243-138/+8
| | | | Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500: Add IS_CDV() macroPatrik Jakobsson2013-07-241-0/+1
| | | | | | | This macro is needed for Cedarview specific stuff in the generic gma functions. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/cdv: Convert to gma_pipe_set_base()Patrik Jakobsson2013-07-241-76/+1
| | | | Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/psb: Use identical generic crtc funcsPatrik Jakobsson2013-07-241-37/+4
| | | | | | | This patch makes psb use the gma_xxx counterparts that are identical. I took them in one sweep as they should not cause any regressions. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500: Make all chips use gma_wait_for_vblankPatrik Jakobsson2013-07-247-29/+17
| | | | | | Also remove the duplicated oaktrail function. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/cdv: Use identical generic crtc funcsPatrik Jakobsson2013-07-242-67/+16
| | | | | | | This patch makes cdv use the gma_xxx counterparts that are identical. I took them in one sweep as they should not cause any regressions. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500: Add generic pipe/crtc functionsPatrik Jakobsson2013-07-242-0/+340
| | | | Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500: Remove the unused psb_intel_display.hPatrik Jakobsson2013-07-241-23/+0
| | | | Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/psb: Make use of generic clock codePatrik Jakobsson2013-07-244-167/+51
| | | | | | | Add chip specific callbacks for the generic and non-generic clock calculation code. Also remove as much dupilicated code as possible. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500: Make use of gma_pipe_has_type()Patrik Jakobsson2013-07-243-11/+11
| | | | | | | | Replace any use of xxx_intel_pipe_has_type() with the generic gma_pipe_has_type() function. Poulsbo still use it but that will be removed when we rip out psb_intel_pipe_has_type(). Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500/cdv: Make use of the generic clock codePatrik Jakobsson2013-07-243-163/+36
| | | | | | | Add chip specific callbacks for the generic and non-generic clock calculation code. Also remove as much dupilicated code as possible. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm/gma500: Add generic code for clock calculationPatrik Jakobsson2013-07-246-0/+226
| | | | | | | | This patch aims to unify the bits and pieces that are common (or similar enough) for pll clock calculations. Nothing makes use of this code yet That will come in later patches. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* drm: remove drm_orderDaniel Vetter2013-07-232-24/+0
| | | | | | | | All users of it are now gone! Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/radeon: s/drm_order/order_base_2/Daniel Vetter2013-07-238-33/+33
| | | | | | | | Last driver and pretty obviously a major user of this little function. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/r128: s/drm_order/order_base_2/Daniel Vetter2013-07-231-1/+1
| | | | | | | | Again just use the version provided by the linux core. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/bufs: s/drm_order/order_base_2/Daniel Vetter2013-07-231-6/+6
| | | | | | | | | The version offered by the core is ridiculously optimized and does the same thing. So use it. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm: move drm_getsarea into drm_bufs.cDaniel Vetter2013-07-232-15/+14
| | | | | | | | | | It fiddles the sarea out of the maps which are also handled in drm_bufs.c With this drm_drv.c is a notch more legacy free. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/gem: remove drm_gem_object_handle_unreferenceDaniel Vetter2013-07-231-18/+0
| | | | | | | | It's unused, everyone is using the _unlocked variant only. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/pci: remove useles #if 1David Herrmann2013-07-231-4/+0
| | | | | | | These don't make any sense, really.. Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/gem: simplify object initializationDavid Herrmann2013-07-237-31/+20
| | | | | | | | | | | | | | | | | | | | drm_gem_object_init() and drm_gem_private_object_init() do exactly the same (except for shmem alloc) so make the first use the latter to reduce code duplication. Also drop the return code from drm_gem_private_object_init(). It seems unlikely that we will extend it any time soon so no reason to keep it around. This simplifies code paths in drivers, too. Last but not least, fix gma500 to call drm_gem_object_release() before freeing objects that were allocated via drm_gem_private_object_init(). That isn't actually necessary for now, but might be in the future. Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Acked-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm: rip out dev->last_checkedDaniel Vetter2013-07-232-2/+0
| | | | | | | Only ever re-cleared in drm_setup, otherwise completely unused. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm: fold in drm_sg_alloc into the ioctlDaniel Vetter2013-07-233-13/+5
| | | | | | | There's no other caller from driver code, so we can fold this in. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/radeon: remove DRIVER_HAS_DMA/SG/PCI_DMA from the kms driverDaniel Vetter2013-07-231-2/+2
| | | | | | | | Really, this is all old-style stuff and just copy-pasta from the ums driver. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/nouveau: drop DRIVER_PCI_DMA and DRIVER_SGDaniel Vetter2013-07-231-1/+1
| | | | | | | | | The former doesn't do anything without DRIVER_HAVE_DMA (which is force-disabled for kms drivers anyway). The latter isn't used by the (kms) nouveau ddx. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm: kill dev->buf_readers and dev->buf_writersDaniel Vetter2013-07-232-4/+0
| | | | | | | Again totally unused, so just remove them. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/radoen: kill radeon_dma_ioctl_kmsDaniel Vetter2013-07-232-13/+0
| | | | | | | | | No need to create a dummy ioctl function to return -EINVAL, since that's what the core already does in the absence of the dma_ioctl callback. So we can safely remove this. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm: kill dev->ctx_start and dev->lck_startDaniel Vetter2013-07-232-5/+0
| | | | | | | Again completely unused, so just remove it. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm: kill dev->interrupt_flag and dev->dma_flagDaniel Vetter2013-07-232-4/+0
| | | | | | | Completely unused, so just remove them. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm: remove dev->last_switchDaniel Vetter2013-07-233-3/+0
| | | | | | | | Only ever assigned in the context code for real, with no readers anywhere. Remove it. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm: kill dev->context_waitDaniel Vetter2013-07-233-3/+0
| | | | | | | | No one ever waits on this waitqueue, so the wake_up call is wasted. Remove it all. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm: remove drm_modctx ioctl and use drm_noop insteadDaniel Vetter2013-07-233-9/+1
| | | | | | | It doesn't do anything, so kill the code. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@gmail.com>
* Merge tag 'drm-intel-next-2013-07-12' of ↵Dave Airlie2013-07-1931-1833/+2182
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~danvet/drm-intel into drm-next Highlights: - follow-up refactoring after the shared dpll rework that landed in 3.11 - oddball prep cleanups from Ben for ppgtt - encoder->get_config state tracking infrastructure from Jesse - used by the experimental fastboot support from Jesse (disabled by default) - make the error state file official and add it to our sysfs interface (Mika) - drm_mm prep changes from Ben, prepares to embedd the drm_mm_node (which will be used by the vma rework later on) - interrupt handling rework, follow up cleanups to the VECS enabling, hpd storm handling and fifo underrun reporting. - Big pile of smaller cleanups, code improvements and related stuff. * tag 'drm-intel-next-2013-07-12' of git://people.freedesktop.org/~danvet/drm-intel: (72 commits) drm/i915: clear DPLL reg when disabling i9xx dplls drm/i915: Fix up cpt pixel multiplier enable sequence drm/i915: clean up vlv ->pre_pll_enable and pll enable sequence drm/i915: move error state to own compilation unit drm/i915: Don't attempt to read an unitialized stack value drm/i915: Use for_each_pipe() when possible drm/i915: don't enable PM_VEBOX_CS_ERROR_INTERRUPT drm/i915: unify ring irq refcounts (again) drm/i915: kill dev_priv->rps.lock drm/i915: queue work outside spinlock in hsw_pm_irq_handler drm/i915: streamline hsw_pm_irq_handler drm/i915: irq handlers don't need interrupt-safe spinlocks drm/i915: kill lpt pch transcoder->crtc mapping code for fifo underruns drm/i915: improve GEN7_ERR_INT clearing for fifo underrun reporting drm/i915: improve SERR_INT clearing for fifo underrun reporting drm/i915: extract ibx_display_interrupt_update drm/i915: remove unused members from drm_i915_private drm/i915: don't frob mm.suspended when not using ums drm/i915: Fix VLV DP RBR/HDMI/DAC PLL LPF coefficients drm/i915: WARN if the bios reserved range is bigger than stolen size ... Conflicts: drivers/gpu/drm/i915/i915_gem.c
| * drm/i915: clear DPLL reg when disabling i9xx dpllsDaniel Vetter2013-07-121-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Toghether with the hw state readout this should catch cases where we don't properly updated the pll state (either in sw or hw). At least for the shared dpll code the equivalent tricke helped a lot in catching bugs. Also rename the function prefix, it's not a generic piece of infrastructure. Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Fix up cpt pixel multiplier enable sequenceDaniel Vetter2013-07-121-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Bspec for the "DPLL HDMI multiplier" field says: "Restriction : The DPLL must be enabled and stable before setting these bits. These bits must be programmed after DPLL_SEL is programmed." There is apparently no restriction on programming the DPLL_SEL register wrt the DPLL. So let's just move that up before we enable the pch dpll. Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: clean up vlv ->pre_pll_enable and pll enable sequenceDaniel Vetter2013-07-121-27/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No need to call the ->pre_pll_enable hook twice if we don't enable the dpll too early. This should make Jani a bit less grumpy. v2: Rebase on top of the newly-colored BUG_ONs. v3: Reinstate the lost write of the DPLL_MD register, spotted by Imre. Cc: Imre Deak <imre.deak@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: move error state to own compilation unitMika Kuoppala2013-07-127-965/+983
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move error state generation and stringification to it's own compilation unit. Sysfs also uses this so it can't be under CONFIG_DEBUG_FS This fixes a regression introduced in commit ef86ddced720fddc3835558447a7f594d3609c73 Author: Mika Kuoppala <mika.kuoppala@linux.intel.com> Date: Thu Jun 6 17:38:54 2013 +0300 drm/i915: add error_state sysfs entry Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66814 Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Don't attempt to read an unitialized stack valueDamien Lespiau2013-07-121-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If intel_sdvo_get_value() fails here, val is unitialized and the cross check will compare the pipe config multiplier with a bogus value. Instead, only set encoder_pixel_multiplier when the sdvo command has been successful. The cross check will compare the pipe config value with 0 otherwise. v2: Do the cross check with the initial value of encoder_pixel_multiplier (0) if the sdvo command fails (and thus keep the warning) (Daniel Vetter) Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Use for_each_pipe() when possibleDamien Lespiau2013-07-111-2/+2
| | | | | | | | | | | | | | | | Came accross two open coding of for_each_pipe(), might as well use the macro. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: don't enable PM_VEBOX_CS_ERROR_INTERRUPTDaniel Vetter2013-07-112-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code to handle it is broken - there's simply no code to clear CS parser errors on gen5+. And behold, for all the other rings we also don't enable it! Leave the handling code itself in place just to be consistent with the existing mess though. And in case someone feels like fixing it all up. This has been errornously enabled in commit 12638c57f31952127c734c26315e1348fa1334c2 Author: Ben Widawsky <ben@bwidawsk.net> Date: Tue May 28 19:22:31 2013 -0700 drm/i915: Enable vebox interrupts Cc: Damien Lespiau <damien.lespiau@intel.com> Cc: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: unify ring irq refcounts (again)Daniel Vetter2013-07-112-14/+11
| | | | | | | | | | | | | | | | | | | | | | With the simplified locking there's no reason any more to keep the refcounts seperate. v2: Readd the lost comment that ring->irq_refcount is protected by dev_priv->irq_lock. Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: kill dev_priv->rps.lockDaniel Vetter2013-07-116-24/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the rps interrupt locking isn't clearly separated (at elast conceptually) from all the other interrupt locking having a different lock stopped making sense: It protects much more than just the rps workqueue it started out with. But with the addition of VECS the separation started to blurr and resulted in some more complex locking for the ring interrupt refcount. With this we can (again) unifiy the ringbuffer irq refcounts without causing a massive confusion, but that's for the next patch. v2: Explain better why the rps.lock once made sense and why no longer, requested by Ben. Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: queue work outside spinlock in hsw_pm_irq_handlerDaniel Vetter2013-07-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | And kill the comment about it. Queueing work is a barrier type event, no amount of locking will help in ordering things (as long as we queue the work after having updated all relevant data structures). Also, the queue_work works itself as a sufficient memory barrier. Again on the surface this is just a tiny micro-optimization to reduce the hold-time of dev_priv->irq_lock. But the better reason is that it reduces superficial locking and so makes it clearer what we actually need for correctness. Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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