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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2024-03-15158-1666/+8589
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| *-------. Merge branches 'clk-samsung', 'clk-imx', 'clk-rockchip', 'clk-clkdev' and 'cl...Stephen Boyd2024-03-1327-297/+1771
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| | | | | | * clk: Add a devm variant of clk_rate_exclusive_get()Uwe Kleine-König2024-02-282-0/+31
| | | | | * | clkdev: Update clkdev id usage to allow for longer namesMichael J. Ruhl2024-02-281-1/+1
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| | | | * | Merge tag 'v6.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2024-02-286-32/+52
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| | | | | * clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parentOndrej Jirman2024-02-271-3/+3
| | | | | * clk: rockchip: rk3588: use linked clock ID for GATE_LINKSebastian Reichel2024-02-271-23/+23
| | | | | * clk: rockchip: rk3588: fix indentSebastian Reichel2024-02-271-1/+1
| | | | | * clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grfSebastian Reichel2024-02-271-6/+4
| | | | | * Merge branch 'v6.9-shared/clkids' into v6.9-clk/nextHeiko Stuebner2024-02-274-3/+24
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| | | | | * | clk: rockchip: rk3568: Add PLL rate for 128MHzChris Morgan2024-01-251-0/+1
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| | | * | | Merge tag 'clk-imx-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/abel...Stephen Boyd2024-02-273-22/+27
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| | | | * | clk: imx: imx8mp: Fix SAI_MCLK_SEL definitionShengjiu Wang2024-02-261-3/+8
| | | | * | clk: imx: scu: Use common error handling code in imx_clk_scu_alloc_dev()Markus Elfring2024-02-261-12/+10
| | | | * | clk: imx: composite-8m: Delete two unnecessary initialisations in __imx8m_clk...Markus Elfring2024-02-261-2/+2
| | | | * | clk: imx: composite-8m: Less function calls in __imx8m_clk_hw_composite() aft...Markus Elfring2024-02-261-5/+7
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| | * | | Merge tag 'samsung-clk-6.9' of https://git.kernel.org/pub/scm/linux/kernel/gi...Stephen Boyd2024-02-2715-242/+1660
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| | | * | clk: samsung: Add CPU clock support for Exynos850Sam Protsenko2024-02-252-0/+181
| | | * | clk: samsung: Pass mask to wait_until_mux_stable()Sam Protsenko2024-02-251-7/+7
| | | * | clk: samsung: Keep register offsets in chip specific structureSam Protsenko2024-02-251-70/+86
| | | * | clk: samsung: Keep CPU clock chip specific data in a dedicated structSam Protsenko2024-02-251-14/+26
| | | * | clk: samsung: Pass register layout type explicitly to CLK_CPU()Sam Protsenko2024-02-258-17/+29
| | | * | clk: samsung: Pass actual CPU clock registers base to CPU_CLK()Sam Protsenko2024-02-256-39/+40
| | | * | clk: samsung: Group CPU clock functions by chipSam Protsenko2024-02-251-53/+61
| | | * | clk: samsung: Use single CPU clock notifier callback for all chipsSam Protsenko2024-02-251-35/+28
| | | * | clk: samsung: Reduce params count in exynos_register_cpu_clock()Sam Protsenko2024-02-251-23/+23
| | | * | clk: samsung: Pull struct exynos_cpuclk into clk-cpu.cSam Protsenko2024-02-252-35/+35
| | | * | clk: samsung: Improve clk-cpu.c styleSam Protsenko2024-02-251-32/+33
| | | * | dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1Sam Protsenko2024-02-252-0/+96
| | | * | clk: samsung: gs101: add support for cmu_peric1André Draszik2024-02-071-0/+346
| | | * | Merge tag 'samsung-dt-bindings-clk-6.9-3' into next/clkKrzysztof Kozlowski2024-02-072-3/+54
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| | | * | | clk: samsung: gs101: drop extra empty lineAndré Draszik2024-02-071-1/+0
| | | * | | clk: samsung: exynos850: Propagate SPI IPCLK rate changeSam Protsenko2024-02-011-16/+17
| | | * | | clk: samsung: gs101: gpio_peric0_pclk needs to be kept onAndré Draszik2024-02-011-1/+1
| | | * | | clk: samsung: exynos850: Add PDMA clocksSam Protsenko2024-01-231-1/+9
| | | * | | dt-bindings: clock: tesla,fsd: Fix spelling mistakeVarada Pavani2024-01-231-1/+1
| | | * | | clk: samsung: gs101: add support for cmu_peric0Tudor Ambarus2024-01-231-0/+583
| | | * | | Merge tag 'samsung-dt-bindings-clk-6.9-2' into next/clkKrzysztof Kozlowski2024-01-233-2/+106
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| | | * | | | clk: samsung: gs101: register cmu_misc clocks earlyPeter Griffin2024-01-221-3/+9
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| *-------. \ \ \ \ \ Merge branches 'clk-remove', 'clk-amlogic', 'clk-qcom', 'clk-parent' and 'clk...Stephen Boyd2024-03-13100-1279/+6283
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| | | | | | * \ \ \ \ \ Merge tag 'clk-microchip-6.9' of https://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd2024-03-083-69/+96
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| | | | | | | * | | | | clk: microchip: mpfs: convert MSSPLL outputs to clk_dividerConor Dooley2024-02-061-67/+14
| | | | | | | * | | | | clk: microchip: mpfs: add missing MSSPLL outputsConor Dooley2024-02-061-0/+7
| | | | | | | * | | | | clk: microchip: mpfs: setup for using other mss pll outputsConor Dooley2024-02-061-11/+19
| | | | | | | * | | | | clk: microchip: mpfs: split MSSPLL in twoConor Dooley2024-02-061-58/+116
| | | | | | | * | | | | dt-bindings: can: mpfs: add missing required clockConor Dooley2024-02-061-2/+4
| | | | | | | * | | | | dt-bindings: clock: mpfs: add more MSSPLL output definitionsConor Dooley2024-02-061-0/+5
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| | | | | * / / / / / clk: Fix clk_core_get NULL dereferenceBryan O'Donoghue2024-03-081-0/+3
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| | | | * | | | | | Merge tag 'qcom-clk-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2024-03-0892-1198/+6176
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| | | | | * | | | | clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES resetGabor Juhos2024-03-031-1/+1
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-24 13:08:02 +0000