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* drm/i915/dmc: mass rename dev_priv to i915Jani Nikula2023-03-061-85/+81
* drm/i915/dmc: allocate dmc structure dynamicallyJani Nikula2023-03-064-40/+53
* drm/i915/dmc: add i915_to_dmc() and dmc->i915 and use themJani Nikula2023-03-062-39/+56
* drm/i915/dmc: use has_dmc_id_fw() instead of poking dmc->dmc_info directlyJani Nikula2023-03-061-2/+2
* drm/i915/power: move dc state members to struct i915_power_domainsJani Nikula2023-03-066-30/+39
* drm/i915: remove unnecessary intel_pm.h includesJani Nikula2023-03-0613-13/+0
* drm/i915/pm: drop intel_suspend_hw()Jani Nikula2023-03-063-19/+0
* drm/i915/pm: drop intel_pm_setup()Jani Nikula2023-03-064-8/+2
* drm/i915/wm: remove display/ prefix from includeJani Nikula2023-03-061-1/+1
* drm/i915/display: split out DSC and DSS registersJani Nikula2023-03-066-450/+465
* drm/i915/dsi: fix DSS CTL register offsets for TGL+Jani Nikula2023-03-061-3/+15
* drm/i915/hwmon: Accept writes of value 0 to power1_max_intervalAshutosh Dixit2023-03-011-5/+9
* drm/i915/psr: Fix the delayed vblank w/aVille Syrjälä2023-03-011-7/+2
* drm/i915/vrr: Fix "window2" handlingVille Syrjälä2023-03-011-8/+2
* drm/i915: Get HDR DPCD refresh timeout from VBTVille Syrjälä2023-03-013-2/+14
* drm/i915/gen12: Update combo PHY init sequenceMatt Roper2023-02-272-5/+4
* drm/i915: Move MCR_REG define to i915_reg_defs.hLucas De Marchi2023-02-252-2/+2
* drm/i915: Remove unused tmp assignment.Rodrigo Vivi2023-02-241-7/+4
* drm/i915/dg2: Add HDMI pixel clock frequencies 267.30 and 319.89 MHzAnkit Nautiyal2023-02-241-0/+62
* drm/i915/psr: Use calculated io and fast wake linesJouni Högander2023-02-242-17/+63
* drm/i915: Drop useless intel_dp_has_audio() argumentVille Syrjälä2023-02-231-3/+2
* drm/i915: Fix audio ELD handling for DP MSTVille Syrjälä2023-02-231-9/+16
* drm/i915: Mask page table errors on gen2/3 with FBCVille Syrjälä2023-02-231-2/+20
* drm/i915: Extract {i9xx,i965)_error_mask()Ville Syrjälä2023-02-231-21/+25
* drm/i915: Dump PGTBL_ER on gen2/3/4 error interruptVille Syrjälä2023-02-231-0/+6
* drm/i915: Undo rmw damage to gen3 error interrupt handlerVille Syrjälä2023-02-231-5/+5
* drm/i915: Mark FIFO underrun disabled earlierVille Syrjälä2023-02-234-18/+32
* drm/i915/audio: Track audio state per-transcoderVille Syrjälä2023-02-234-50/+48
* drm/i915/display/power: use intel_de_rmw if possibleAndrzej Hajda2023-02-212-92/+39
* drm/i915: Remove pointless register readVille Syrjälä2023-02-201-2/+2
* drm/i915: Sprinkle some FIXMEs about TGL+ DSI transcoder timing messVille Syrjälä2023-02-202-1/+7
* drm/i915: Configure TRANS_SET_CONTEXT_LATENCY correctly on ADL+Ville Syrjälä2023-02-201-3/+25
* drm/i915/dsb: Skip DSB command buffer setup if we have no LUTsVille Syrjälä2023-02-201-0/+3
* drm/i915/dsb: Nuke the DSB debugVille Syrjälä2023-02-201-5/+0
* drm/i915/dsb: Allow vblank synchronized DSB executionVille Syrjälä2023-02-203-3/+6
* drm/i915/dsb: Define more DSB registersVille Syrjälä2023-02-201-2/+48
* drm/i915/psr: Stop clobbering TRANS_SET_CONTEXT_LATENCYVille Syrjälä2023-02-201-13/+0
* drm/i915: Define transcoder timing register bitmasksVille Syrjälä2023-02-174-36/+75
* drm/i915: Add local adjusted_mode variableVille Syrjälä2023-02-171-19/+16
* drm/i915: Define the "unmodified vblank" interrupt bitVille Syrjälä2023-02-171-0/+1
* drm/i915: Dump blanking start/endVille Syrjälä2023-02-171-7/+9
* drm/i915: s/PIPECONF/TRANSCONF/Ville Syrjälä2023-02-1717-198/+199
* drm/i915: Give CPU transcoder timing registers TRANS_ prefixVille Syrjälä2023-02-178-127/+129
* drm/i915: Flatten intel_ddi_{enable,disable}_transcoder_clock()Ville Syrjälä2023-02-171-19/+20
* drm/i915: Rename intel_ddi_{enable,disable}_pipe_clock()Ville Syrjälä2023-02-174-17/+17
* drm/i915: Fix platform default aux ch for sklVille Syrjälä2023-02-171-2/+12
* drm/i915: Pimp encoder ddc_pin/aux_ch debug messagesVille Syrjälä2023-02-172-8/+12
* drm/i915: Restructure intel_bios_port_aux_ch()Ville Syrjälä2023-02-178-23/+47
* drm/i915/hwmon: Enable PL1 limit when writing limit value to HWAshutosh Dixit2023-02-161-2/+3
* drm/i915/hwmon: Replace hwm_field_scale_and_write with hwm_power_max_writeAshutosh Dixit2023-02-161-20/+16