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* net/mlx5e: ethtool, Fix a typo in WOL function namesErez Alfasi2019-08-281-4/+4
| | | | | | | | | | Fix a typo in 'mlx5e_refomrat_wol_mode_mlx5_to_linux' and 'mlx5e_refomrat_wol_mode_linux_to_mlx5' function names: "refomrat" -> "reformat". Fixes: 928cfe8745a6 ("net/mlx5e: Wake On LAN support") Signed-off-by: Erez Alfasi <ereza@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
* Merge branch 'mlx5-next' of ↵Saeed Mahameed2019-08-2816-69/+142
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux mlx5 HW spec and bits updates: 1) Aya exposes IP-in-IP capability in mlx5_core. 2) Maxim exposes lag tx port affinity capabilities. 3) Moshe adds VNIC_ENV internal rq counter bits. 4) ODP capabilities for DC transport Misc updates: 5) Saeed, two compiler warnings cleanups 6) Add XRQ legacy commands opcodes 7) Use refcount_t for refcount 8) fix a -Wstringop-truncation warning
| * net/mlx5: Set ODP capabilities for DC transport to maxMichael Guralnik2019-08-282-1/+9
| | | | | | | | | | | | | | | | In mlx5_core initialization, query max ODP capabilities for DC transport from FW and set as current capabilities. Signed-off-by: Michael Guralnik <michaelgur@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
| * net/mlx5: fix a -Wstringop-truncation warningQian Cai2019-08-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In file included from ./arch/powerpc/include/asm/paca.h:15, from ./arch/powerpc/include/asm/current.h:13, from ./include/linux/thread_info.h:21, from ./include/asm-generic/preempt.h:5, from ./arch/powerpc/include/generated/asm/preempt.h:1, from ./include/linux/preempt.h:78, from ./include/linux/spinlock.h:51, from ./include/linux/wait.h:9, from ./include/linux/completion.h:12, from ./include/linux/mlx5/driver.h:37, from drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h:6, from drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c:33: In function 'strncpy', inlined from 'mlx5_fw_tracer_save_trace' at drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c:549:2, inlined from 'mlx5_tracer_print_trace' at drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c:574:2: ./include/linux/string.h:305:9: warning: '__builtin_strncpy' output may be truncated copying 256 bytes from a string of length 511 [-Wstringop-truncation] return __builtin_strncpy(p, q, size); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Fix it by using the new strscpy_pad() since the commit 458a3bf82df4 ("lib/string: Add strscpy_pad() function") which will always NUL-terminate the string, and avoid possibly leak data through the ring buffer where non-admin account might enable these events through perf. Fixes: fd1483fe1f9f ("net/mlx5: Add support for FW reporter dump") Signed-off-by: Qian Cai <cai@lca.pw> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
| * net/mlx5: Create bypass and loopback flow steering namespaces for RDMA RXMark Zhang2019-08-213-11/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use different namespaces for bypass and switchdev loopback because they have different priorities and default table miss action requirement: 1. bypass: with multiple priorities support, and MLX5_FLOW_TABLE_MISS_ACTION_DEF as the default table miss action; 2. switchdev loopback: with single priority support, and MLX5_FLOW_TABLE_MISS_ACTION_SWITCH_DOMAIN as the default table miss action. Signed-off-by: Mark Zhang <markz@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
| * net/mlx5: Add per-namespace flow table default miss action supportMark Zhang2019-08-213-33/+47
| | | | | | | | | | | | | | | | | | | | | | Currently all the namespaces under the same steering domain share the same default table miss action, however in some situations (e.g., RDMA RX) different actions are required. This patch adds a per-namespace default table miss action instead of using the miss action of the steering domain. Signed-off-by: Mark Zhang <markz@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
| * net/mlx5: Add lag_tx_port_affinity capability bitMaxim Mikityanskiy2019-08-201-1/+3
| | | | | | | | | | | | | | | | | | Add the lag_tx_port_affinity HCA capability bit that indicates that setting port affinity of TISes is supported. Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
| * net/mlx5: Expose IP-in-IP capability bitAya Levin2019-08-201-1/+3
| | | | | | | | | | | | | | | | | | | | Expose Fw indication that it supports Stateless Offloads for IP over IP tunneled packets. The following offloads are supported for the inner packets: RSS, RX & TX Checksum Offloads, LSO and Flow Steering. Signed-off-by: Aya Levin <ayal@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
| * net/mlx5: Add support for VNIC_ENV internal rq counterMoshe Shemesh2019-08-201-2/+8
| | | | | | | | | | | | | | | | | | Add mlx5 interface support for reading internal rq out of buffer counter as part of QUERY_VNIC_ENV command. The command is used by the driver to query vnic diagnostic statistics from FW. Signed-off-by: Moshe Shemesh <moshe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
| * net/mlx5: Improve functions documentationSaeed Mahameed2019-08-201-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix documentation of mlx5_eq_enable/disable to cleanup compiler warnings. drivers/net/ethernet/mellanox/mlx5/core//eq.c:334: warning: Function parameter or member 'dev' not described in 'mlx5_eq_enable' warning: Function parameter or member 'eq' not described in 'mlx5_eq_enable' warning: Function parameter or member 'nb' not described in 'mlx5_eq_enable' drivers/net/ethernet/mellanox/mlx5/core//eq.c:355: warning: Function parameter or member 'dev' not described in 'mlx5_eq_disable' warning: Function parameter or member 'eq' not described in 'mlx5_eq_disable' warning: Function parameter or member 'nb' not described in 'mlx5_eq_disable' Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
| * net/mlx5: Add missing include file to lib/crypto.cSaeed Mahameed2019-08-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing include file to avoid compiler warnings: drivers/net/ethernet/mellanox/mlx5/core//lib/crypto.c:6:5: warning: no previous prototype for ‘mlx5_create_encryption_key’ 6 | int mlx5_create_encryption_key(struct mlx5_core_dev *mdev, | ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/net/ethernet/mellanox/mlx5/core//lib/crypto.c:60:6: warning: no previous prototype for ‘mlx5_destroy_encryption_key’ 60 | void mlx5_destroy_encryption_key(struct mlx5_core_dev *mdev, ... Fixes: 45d3b55dc665 ("net/mlx5: Add crypto library to support create/destroy encryption key") Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
| * net/mlx5: Add XRQ legacy commands opcodesYishai Hadas2019-08-132-0/+6
| | | | | | | | | | | | | | | | Add XRQ legacy commands opcodes, will be used via the DEVX interface. Signed-off-by: Yishai Hadas <yishaih@mellanox.com> Reviewed-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
| * net/mlx5: Use debug message instead of warnYishai Hadas2019-08-131-1/+1
| | | | | | | | | | | | | | | | | | As QP may be created by DEVX, it may be valid to not find the rsn in mlx5 core tree, change the level to be debug. Signed-off-by: Yishai Hadas <yishaih@mellanox.com> Reviewed-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
| * mlx5: Use refcount_t for refcountChuhong Yuan2019-08-073-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | Reference counters are preferred to use refcount_t instead of atomic_t. This is because the implementation of refcount_t can prevent overflows and detect possible use-after-free. So convert atomic_t ref counters to refcount_t. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Acked-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
| * net/mlx5: remove self-assignment on esw->devColin Ian King2019-08-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | There is a self assignment of esw->dev to itself, clean this up by removing it. Also make dev a const pointer. Addresses-Coverity: ("Self assignment") Fixes: 6cedde451399 ("net/mlx5: E-Switch, Verify support QoS element type") Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Parav Pandit <parav@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
| * IB/mlx5: Support MLX5_CMD_OP_QUERY_LAG as a DEVX general commandMark Zhang2019-08-041-0/+1
| | | | | | | | | | | | | | | | | | The "MLX5_CMD_OP_QUERY_LAG" is one of the DEVX general commands, add it. Fixes: 8aa8c95ce4cc ("IB/mlx5: Add support for DEVX general command") Signed-off-by: Mark Zhang <markz@mellanox.com> Reviewed-by: Yishai Hadas <yishaih@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
| * net/mlx5: Fix mlx5_ifc_query_lag_out_bitsMark Zhang2019-08-041-2/+0
| | | | | | | | | | | | | | | | | | Remove the "reserved_at_40" field to match the device specification. Fixes: 84df61ebc69b ("net/mlx5: Add HW interfaces used by LAG") Signed-off-by: Mark Zhang <markz@mellanox.com> Reviewed-by: Yishai Hadas <yishaih@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
* | Merge branch 'stmmac-Add-EHL-and-TGL-PCI-info-and-PCI-ID'David S. Miller2019-08-273-0/+176
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Voon Weifeng says: ==================== stmmac: Add EHL and TGL PCI info and PCI ID In order to keep PCI info simple and neat, this patch series have introduced a 3 hierarchy of struct. First layer will be the intel_mgbe_common_data struct which keeps all Intel common configuration. Second layer will be xxx_common_data which keeps all the different Intel microarchitecture, e.g tgl, ehl. The third layer will be configuration that tied to the PCI ID only based on speed and RGMII/SGMII interface. EHL and TGL will also having a higher system clock which is 200Mhz. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: stmmac: setup higher frequency clk support for EHL & TGLVoon Weifeng2019-08-273-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk, ptp clock and ptp_max_adj to 200MHz. Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: stmmac: add EHL RGMII 1Gbps PCI info and PCI IDVoon Weifeng2019-08-271-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added EHL RGMII 1Gbps PCI ID. Different MII and speed will have different PCI ID. Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: stmmac: add TGL SGMII 1Gbps PCI info and PCI IDVoon Weifeng2019-08-271-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added TGL SGMII 1Gbps PCI ID. Different MII and speed will have different PCI ID. Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: stmmac: add EHL SGMII 1Gbps PCI info and PCI IDVoon Weifeng2019-08-271-0/+107
|/ / | | | | | | | | | | | | | | | | Added EHL SGMII 1Gbps PCI ID. Different MII and speed will have different PCI ID. Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge branch 'net-dsa-mv88e6xxx-Peridot-Topaz-SERDES-changes'David S. Miller2019-08-278-264/+379
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Marek Behún says: ==================== net: dsa: mv88e6xxx: Peridot/Topaz SERDES changes this is the fifth version of changes for the Topaz/Peridot family of switches. The patches apply on net-next. Changes since v4: - added Reviewed-by and Tested-by tags on first 2 patches, the others are changed are affected by changes in patch 3/6, so I did not add the tags, except for 5/6, which is just macro renaming - patch 3 was changed: the serdes_get_lane returns 0 on success (lane was discovered), -ENODEV if not lane is present on the port, and other error if other error occured. Lane is put into a pointer of type u8 - patches 4 and 6 were affected by this (error detecting from serdes_get_lane) - Andrew's complaint about the two additional parameters (allow_over_2500 and make_cmode_writable) was addressed, by Vivien's advice: I put a new method into chip operations structure, named port_set_cmode_writable. This is called from mv88e6xxx_port_setup_mac just before port_set_cmode. The method is implemented for Topaz. The check if cmodes over 2500 should be allowed on given port is now done in the specific port_set_cmode() that requires it, thus the allow_over_2500 argument is not needed Again, tested on Turris Mox with Peridot, Topaz, and Peridot + Topaz. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: mv88e6xxx: fully support SERDES on Topaz familyMarek Behún2019-08-274-6/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we support SERDES on the Topaz family in a limited way: no IRQs and the cmode is not writable, thus the mode is determined by strapping pins. Marvell's examples though show how to make cmode writable on port 5 and support SGMII autonegotiation. It is done by writing hidden registers, for which we already have code. This patch adds support for making the cmode for the SERDES port writable on the Topaz family, via a new chip operation, .port_set_cmode_writable, which is called from mv88e6xxx_port_setup_mac just before .port_set_cmode. SERDES IRQs are also enabled for Topaz. Tested on Turris Mox. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: mv88e6xxx: rename port cmode macroMarek Behún2019-08-273-28/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a cosmetic update. We are removing the last underscore from macros MV88E6XXX_PORT_STS_CMODE_100BASE_X and MV88E6XXX_PORT_STS_CMODE_1000BASE_X. The 2500base-x version does not have that underscore. Also PHY_INTERFACE_MODE_ macros do not have it there. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: mv88e6xxx: simplify SERDES code for Topaz and PeridotMarek Behún2019-08-274-92/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By adding an additional serdes_get_lane implementation (for Topaz), we can merge the implementations of other SERDES functions (powering and IRQs). We can skip checking port numbers, since the serdes_get_lane() methods inform if there is no lane on a port or if the lane cannot be used for given cmode. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: mv88e6xxx: create serdes_get_lane chip operationMarek Behún2019-08-275-96/+146
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create a serdes_get_lane() method in the mv88e6xxx operations structure. Use it instead of calling the different implementations. Also change the methods so that their return value is used only for error. The lane number is put into a place referred to by a pointer given as argument. If the port does not have a lane, return -ENODEV. Lanes are phy addresses, so use u8 as their type. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: mv88e6xxx: update code operating on hidden registersMarek Behún2019-08-274-64/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves the functions operating on the hidden debug registers into it's own file, port_hidden.c. The functions prefix is renamed from mv88e6390_hidden_ to mv88e6xxx_port_hidden_, to be consistent with the rest of this driver. The macros are prefixed with MV88E6XXX_ prefix, and are changed not to use the BIT() macro nor bit shifts, since the rest of the port.h file does not use it. We also add the support for setting the Block Address field when operating hidden registers. Marvell's mdio examples for SERDES settings on Topaz use Block Address 0x7 when reading/writing hidden registers, and although the specification says that block must be set to 0xf, those settings are reachable only with Block Address 0x7. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: mv88e6xxx: support 2500base-x in SGMII IRQ handlerMarek Behún2019-08-271-2/+21
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mv88e6390_serdes_irq_link_sgmii IRQ handler reads the SERDES PHY status register to determine speed, among other things. If cmode of the port is set to 2500base-x, though, the PHY still reports 1000 Mbps (the PHY register itself does not differentiate between 1000 Mbps and 2500 Mbps - it thinks it is running at 1000 Mbps, although clock is 2.5x faster). Look at the cmode and set SPEED_2500 if cmode is set to 2500base-x. Also tell mv88e6xxx_port_setup_mac the PHY interface mode corresponding to current cmode in terms of phy_interface_t. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge branch 'sctp-add-SCTP_ECN_SUPPORTED-sockopt'David S. Miller2019-08-278-5/+102
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xin Long says: ==================== sctp: add SCTP_ECN_SUPPORTED sockopt This patchset is to make ecn flag per netns and endpoint and then add SCTP_ECN_SUPPORTED sockopt, as does for other feature flags. ==================== Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sctp: allow users to set ep ecn flag by sockoptXin Long2019-08-272-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | SCTP_ECN_SUPPORTED sockopt will be added to allow users to change ep ecn flag, and it's similar with other feature flags. Signed-off-by: Xin Long <lucien.xin@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sctp: allow users to set netns ecn flag with sysctlXin Long2019-08-271-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sysctl net.sctp.ecn_enable is added in this patch. It will allow users to change the default sctp ecn flag, net.sctp.ecn_enable. This feature was also required on this thread: http://lkml.iu.edu/hypermail/linux/kernel/0812.1/01858.html Signed-off-by: Xin Long <lucien.xin@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sctp: make ecn flag per netns and endpointXin Long2019-08-275-5/+21
|/ / | | | | | | | | | | | | | | | | | | | | | | This patch is to add ecn flag for both netns_sctp and sctp_endpoint, net->sctp.ecn_enable is set 1 by default, and ep->ecn_enable will be initialized with net->sctp.ecn_enable. asoc->peer.ecn_capable will be set during negotiation only when ep->ecn_enable is set on both sides. Signed-off-by: Xin Long <lucien.xin@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: mediatek: remove set but not used variable 'status'Mao Wenan2019-08-271-2/+0
| | | | | | | | | | | | | | | | | | | | | | Fixes gcc '-Wunused-but-set-variable' warning: drivers/net/ethernet/mediatek/mtk_eth_soc.c: In function mtk_handle_irq: drivers/net/ethernet/mediatek/mtk_eth_soc.c:1951:6: warning: variable status set but not used [-Wunused-but-set-variable] Fixes: 296c9120752b ("net: ethernet: mediatek: Add MT7628/88 SoC support") Signed-off-by: Mao Wenan <maowenan@huawei.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge branch 'Simplify-DSA-handling-of-VLAN-subinterface-offload'David S. Miller2019-08-272-9/+22
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vladimir Oltean says: ==================== Simplify DSA handling of VLAN subinterface offload Depends on Vivien Didelot's patchset: https://patchwork.ozlabs.org/project/netdev/list/?series=127197&state=* This patchset removes a few strange-looking guards for -EOPNOTSUPP in dsa_slave_vlan_rx_add_vid and dsa_slave_vlan_rx_kill_vid, making that code path no longer possible. It also disables the code path for the sja1105 driver, which does support editing the VLAN table, but not hardware-accelerated VLAN sub-interfaces, therefore the check in the DSA core would be wrong. There was no better DSA callback to do this than .port_enable, i.e. at ndo_open time. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: sja1105: Clear VLAN filtering offload netdev featureVladimir Oltean2019-08-271-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The switch barely supports traffic I/O, and it does that by repurposing VLANs when there is no bridge that is taking control of them. Letting DSA declare this netdev feature as supported (see dsa_slave_create) would mean that VLAN sub-interfaces created on sja1105 switch ports will be hardware offloaded. That means that net/8021q/vlan_core.c would install the VLAN into the filter tables of the switch, potentially interfering with the tag_8021q VLANs. We need to prevent that from happening and not let the 8021q core offload VLANs to the switch hardware tables. In vlan_filtering=0 modes of operation, the switch ports can pass through VLAN-tagged frames with no problem. Suggested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: Advertise the VLAN offload netdev ability only if switch supports itVladimir Oltean2019-08-271-9/+6
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When adding a VLAN sub-interface on a DSA slave port, the 8021q core checks NETIF_F_HW_VLAN_CTAG_FILTER and, if the netdev is capable of filtering, calls .ndo_vlan_rx_add_vid or .ndo_vlan_rx_kill_vid to configure the VLAN offloading. DSA sets this up counter-intuitively: it always advertises this netdev feature, but the underlying driver may not actually support VLAN table manipulation. In that case, the DSA core is forced to ignore the error, because not being able to offload the VLAN is still fine - and should result in the creation of a non-accelerated VLAN sub-interface. Change this so that the netdev feature is only advertised for switch drivers that support VLAN manipulation, instead of checking for -EOPNOTSUPP at runtime. Suggested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge branch 'net-ethernet-mediatek-convert-to-PHYLINK'David S. Miller2019-08-278-292/+470
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | René van Dorst says: ==================== net: ethernet: mediatek: convert to PHYLINK These patches converts mediatek driver to PHYLINK API. v3->v4: * Phylink improvements and clean-ups after review v2->v3: * Phylink improvements and clean-ups after review v1->v2: * Rebase for mt76x8 changes * Phylink improvements and clean-ups after review * SGMII port doesn't support 2.5Gbit in SGMII mode only in BASE-X mode. Refactor the code. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
| * | dt-bindings: net: ethernet: Update mt7622 docs and dts to reflect the new ↵René van Dorst2019-08-273-12/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | phylink API This patch the removes the recently added mediatek,physpeed property. Use the fixed-link property speed = <2500> to set the phy in 2.5Gbit. See mt7622-bananapi-bpi-r64.dts for a working example. Signed-off-by: René van Dorst <opensource@vdorst.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: ethernet: mediatek: Re-add support SGMIIRené van Dorst2019-08-274-115/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Re-add SGMII support but now with PHYLINK API support So the SGMII changes are more clear * Move SGMII block setup from mtk_gmac_sgmii_path_setup() to mtk_mac_config() * Merge mtk_setup_hw_path() into mtk_mac_config() * Remove mediatek,physpeed property, fixed-link supports now any speed so speed = <2500>; is now valid with PHYLINK * Demagic SGMII register values * Use phylink state to setup fixed-link mode Signed-off-by: René van Dorst <opensource@vdorst.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: ethernet: mediatek: Add basic PHYLINK supportRené van Dorst2019-08-273-192/+265
|/ / | | | | | | | | | | | | | | This convert the basics to PHYLINK API. SGMII support is not in this patch. Signed-off-by: René van Dorst <opensource@vdorst.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge branch 'net-dsa-explicit-programmation-of-VLAN-on-CPU-ports'David S. Miller2019-08-275-109/+136
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vivien Didelot says: ==================== net: dsa: explicit programmation of VLAN on CPU ports When a VLAN is programmed on a user port, every switch of the fabric also program the CPU ports and the DSA links as part of the VLAN. To do that, DSA makes use of bitmaps to prepare all members of a VLAN. While this is expected for DSA links which are used as conduit between interconnected switches, only the dedicated CPU port of the slave must be programmed, not all CPU ports of the fabric. This may also cause problems in other corners of DSA such as the tag_8021q.c driver, which needs to program its ports manually, CPU port included. We need the dsa_port_vlan_{add,del} functions and its dsa_port_vid_{add,del} variants to simply trigger the VLAN programmation without any logic in them, but they may currently skip the operation based on the bridge device state. This patchset gets rid of the bitmap operations, and moves the bridge device check as well as the explicit programmation of CPU ports where they belong, in the slave code. While at it, clear the VLAN flags before programming a CPU port, as it doesn't make sense to forward the PVID flag for example for such ports. Changes in v2: only clear the PVID flag. ==================== Tested-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: clear VLAN PVID flag for CPU portVivien Didelot2019-08-271-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the bridge offloads a VLAN on a slave port, we also need to program its dedicated CPU port as a member of the VLAN. Drivers may handle the CPU port's membership as they want. For example, Marvell as a special "Unmodified" mode to pass frames as is through such ports. Even though DSA expects the drivers to handle the CPU port membership, it does not make sense to program user VLANs as PVID on the CPU port. This patch clears this flag before programming the CPU port. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Suggested-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: program VLAN on CPU port from slaveVivien Didelot2019-08-272-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSA currently programs a VLAN on the CPU port implicitly after the related notifier is received by a switch. While we still need to do this transparent programmation of the DSA links in the fabric, programming the CPU port this way may cause problems in some corners such as the tag_8021q driver. Because the dedicated CPU port is specific to a slave, make their programmation explicit a few layers up, in the slave code. Note that technically, DSA links have a dedicated CPU port as well, but since they are only used as conduit between interconnected switches of a fabric, programming them transparently this way is what we want. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: check bridge VLAN in slave operationsVivien Didelot2019-08-272-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bridge VLANs are not offloaded by dsa_port_vlan_* if the port is not bridged or if its bridge is not VLAN aware. This is a good thing but other corners of DSA, such as the tag_8021q driver, may need to program VLANs regardless the bridge state. And also because bridge_dev is specific to user ports anyway, move these checks were it belongs, one layer up in the slave code. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Suggested-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: add slave VLAN helpersVivien Didelot2019-08-271-7/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add dsa_slave_vlan_add and dsa_slave_vlan_del helpers to handle SWITCHDEV_OBJ_ID_PORT_VLAN switchdev objects. Also copy the switchdev_obj_port_vlan structure on add since we will modify it in future patches. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: do not skip -EOPNOTSUPP in dsa_port_vid_addVivien Didelot2019-08-272-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently dsa_port_vid_add returns 0 if the switch returns -EOPNOTSUPP. This function is used in the tag_8021q.c code to offload the PVID of ports, which would simply not work if .port_vlan_add is not supported by the underlying switch. Do not skip -EOPNOTSUPP in dsa_port_vid_add but only when necessary, that is to say in dsa_slave_vlan_rx_add_vid. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: dsa: remove bitmap operationsVivien Didelot2019-08-273-90/+59
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bitmap operations were introduced to simplify the switch drivers in the future, since most of them could implement the common VLAN and MDB operations (add, del, dump) with simple functions taking all target ports at once, and thus limiting the number of hardware accesses. Programming an MDB or VLAN this way in a single operation would clearly simplify the drivers a lot but would require a new get-set interface in DSA. The usage of such bitmap from the stack also raised concerned in the past, leading to the dynamic allocation of a new ds->_bitmap member in the dsa_switch structure. So let's get rid of them for now. This commit nicely wraps the ds->ops->port_{mdb,vlan}_{prepare,add} switch operations into new dsa_switch_{mdb,vlan}_{prepare,add} variants not using any bitmap argument anymore. New dsa_switch_{mdb,vlan}_match helpers have been introduced to make clear which local port of a switch must be programmed with the target object. While the targeted user port is an obvious candidate, the DSA links must also be programmed, as well as the CPU port for VLANs. While at it, also remove local variables that are only used once. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller2019-08-27279-1287/+2599
|\ \ | | | | | | | | | | | | | | | | | | Minor conflict in r8169, bug fix had two versions in net and net-next, take the net-next hunks. Signed-off-by: David S. Miller <davem@davemloft.net>
| * \ Merge tag 'nfs-for-5.3-3' of git://git.linux-nfs.org/projects/trondmy/linux-nfsLinus Torvalds2019-08-2714-118/+163
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull NFS client bugfixes from Trond Myklebust: "Highlights include: Stable fixes: - Fix a page lock leak in nfs_pageio_resend() - Ensure O_DIRECT reports an error if the bytes read/written is 0 - Don't handle errors if the bind/connect succeeded - Revert "NFSv4/flexfiles: Abort I/O early if the layout segment was invalidat ed" Bugfixes: - Don't refresh attributes with mounted-on-file information - Fix return values for nfs4_file_open() and nfs_finish_open() - Fix pnfs layoutstats reporting of I/O errors - Don't use soft RPC calls for pNFS/flexfiles I/O, and don't abort for soft I/O errors when the user specifies a hard mount. - Various fixes to the error handling in sunrpc - Don't report writepage()/writepages() errors twice" * tag 'nfs-for-5.3-3' of git://git.linux-nfs.org/projects/trondmy/linux-nfs: NFS: remove set but not used variable 'mapping' NFSv2: Fix write regression NFSv2: Fix eof handling NFS: Fix writepage(s) error handling to not report errors twice NFS: Fix spurious EIO read errors pNFS/flexfiles: Don't time out requests on hard mounts SUNRPC: Handle connection breakages correctly in call_status() Revert "NFSv4/flexfiles: Abort I/O early if the layout segment was invalidated" SUNRPC: Handle EADDRINUSE and ENOBUFS correctly pNFS/flexfiles: Turn off soft RPC calls SUNRPC: Don't handle errors if the bind/connect succeeded NFS: On fatal writeback errors, we need to call nfs_inode_remove_request() NFS: Fix initialisation of I/O result struct in nfs_pgio_rpcsetup NFS: Ensure O_DIRECT reports an error if the bytes read/written is 0 NFSv4/pnfs: Fix a page lock leak in nfs_pageio_resend() NFSv4: Fix return value in nfs_finish_open() NFSv4: Fix return values for nfs4_file_open() NFS: Don't refresh attributes with mounted-on-file information
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