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Backmerge drm-next and fix up conflicts due to drmP.h removal.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Replace the duplicated versions of the while loop with the new macro.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190619183033.6922-1-andresx7@gmail.com
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DisplayID blocks allow embedding of CEA blocks. The payloads are
identical to traditional top level CEA extension blocks, but the header
is slightly different.
This change allows the CEA parser to find a CEA block inside a DisplayID
block. Additionally, it adds support for parsing the embedded CTA
header. No further changes are necessary due to payload parity.
This change fixes audio support for the Valve Index HMD.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: <stable@vger.kernel.org> # v4.15
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190619180901.17901-1-andresx7@gmail.com
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git://anongit.freedesktop.org/tegra/linux into drm-next
drm/tegra: Changes for v5.3-rc1
This contains a couple of small improvements and cleanups for the Tegra
DRM driver.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thierry Reding <thierry.reding@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190621150753.19550-1-thierry.reding@gmail.com
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So there is no need to check for a value that can never happen. No need
to check the return value all anyway, as any debugfs call can take the
result of this function as an option just fine.
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The VDD supply is only needed to supply power to eDP panels connected to
DPAUX. Technically that supply should be dealt with in the panel driver,
but for backwards-compatibility we need to keep this around anyway.
Also as a bit of background: the reason for why this supply is attached
to DPAUX is to make sure the panel is properly powered early on so that
it can generate a hotplug pulse at the appropriate time. This may no
longer be required given the support for deferred fbdev setup that was
"recently" introduced in DRM/KMS.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The legacy GPIO API has long been deprecated. Move the driver over to
the descriptor-based API, which allows us to get rid of some boilerplate
while at it.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Logical devices created by the host1x bus infrastructure don't need to
be associated with a device tree node. Doing so will cause the driver
core to attempt to hook up IOMMU operations and fail because it is not
a real device.
However, for backwards-compatibility, we need to provide various OF_*
uevent variables that were previously provided by of_device_uevent() and
which are parsed by libdrm in userspace when querying the available
devices. Do this by implementing a uevent callback for the host1x bus.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Recent versions of the DMA API debug code have started to warn about
violations of the maximum DMA segment size. This is because the segment
size defaults to 64 KiB, which can easily be exceeded in large buffer
allocations such as used in DRM/KMS for framebuffers.
Technically the Tegra SMMU and ARM SMMU don't have a maximum segment
size (they map individual pages irrespective of whether they are
contiguous or not), so the choice of 4 MiB is a bit arbitrary here. The
maximum segment size is a 32-bit unsigned integer, though, so we can't
set it to the correct maximum size, which would be the size of the
aperture.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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When deferring probe, avoid logging a confusing error message. While at
it, make the error message more informational.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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into drm-next
Picking up pace on the upstreaming of Komeda driver, with quite a lot
of new features added this time. On top of that we have the small
cleanups and improved usage of the debugfs functions. Please pull!
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Liviu Dudau <Liviu.Dudau@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190621095349.GI17204@e110455-lin.cambridge.arm.com
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Komeda interrupts may be shared with other hardware blocks.
One needs to use devm_request_irq() with IRQF_SHARED to create a shared
interrupt handler.
As a result of not using drm_irq_install() api, one needs to set
"(struct drm_device *)->irq_enabled = true/false" to enable/disable
vblank interrupts.
Changes from v1:-
1. Squashed the following two patches into one (as the second patch is a
consequence of the first one):-
drm/komeda: Avoid using DRIVER_IRQ_SHARED
drm/komeda: Enable/Disable vblank interrupts
2. Fixed the commit message (as pointed by Daniel Vetter)
3. Removed calls to 'drm_irq_uninstall()' as we are no longer using
drm_irq_install()
4. Removed the struct member 'komeda_kms_driver.irq_handler' as it is not
used anywhere.
Signed-off-by: Ayan Halder <ayan.halder@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
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clang points out a bug in the clock calculation on 32-bit, that leads
to the clock_ratio always being zero:
drivers/gpu/drm/arm/display/komeda/komeda_crtc.c:31:36: error: shift count >= width of type [-Werror,-Wshift-count-overflow]
aclk = komeda_calc_aclk(kcrtc_st) << 32;
Move the shift into the division to make it apply on a 64-bit
variable. Also use the more expensive div64_u64() instead of div_u64()
to account for pxlclk being a 64-bit integer.
Fixes: 1f7f9ab7900e ("drm/komeda: Add engine clock requirement check for the downscaling")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
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Warnings popup when "make ARCH=i386"
In file included from include/drm/drm_mm.h:49,
from include/drm/drm_vma_manager.h:26,
from include/drm/drm_gem.h:40,
from drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c:9:
drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c: In function 'komeda_fb_afbc_size_check':
drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c:96:17: error: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'size_t' {aka 'unsigned int'} [-Werror=format=]
DRM_DEBUG_KMS("afbc size check failed, obj_size: 0x%lx. min_size 0x%x.\n",
That leads by misuse "%lx" as format speicifier for size_t, correct it
to "%zx"
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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When calling debugfs functions, there is no need to ever check the
return value. The function can work or not, but the code logic should
never do something different based on this.
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Brian Starkey <brian.starkey@arm.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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When calling debugfs functions, there is no need to ever check the
return value. The function can work or not, but the code logic should
never do something different based on this.
Cc: "James (Qian) Wang" <james.qian.wang@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Brian Starkey <brian.starkey@arm.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Writeback split is also for workaround the size limitation of d71 scaler.
Like layer_split, writeback downscaling also can use two scalers to handle
the scaling half-by-half. The only differnence is writback needs a
standalone component (splitter)'s help to split the composition result.
The data pipeline of writeback split as below:
/-> scaler-0 ->\
compiz -> splitter merger -> wb_layer -> memory
\-> scaler-1 ->/
v2: Rebase
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
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Similar to Layer Split, but Splitter is used for writeback, which splits
the compiz result to two half parts and then feed them to two scalers.
v2: Rebase
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
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User may send null writeback configurations for writeback connector like:
- Only bind the writeback connector to crtc.
- set a fb_id(0) to writeback_fb_id_property
All above configurations are meaningless for writeback, but since they are
still valid configurations, accept them.
Depends on:
- https://patchwork.freedesktop.org/series/60856/
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
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Since the component_state->input[i] is only valid when it is active, the
content of input[i] is undefined if it is inactive. The user must check the
state->active_inputs with input index firstly before using state->input[i].
Refine the function to_d71_input_id and directly move such check into it.
Simplify the using and avoid problem that caller forget the valid check.
Depends on:
- https://patchwork.freedesktop.org/series/60856/
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
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One crtc can use two komeda_pipeline, and one works as master and as
slave. the slave pipeline doesn't have its own output and timing
ctrlr, but pre-composite the input layer data flow and then feed the
result to master. the pipeline configuration like:
slave-layer-0 \
... slave->CU
slave-layer-4 / \
\
master-layer-0 --------> master->CU -> ...
... /
master-layer-4 ------>
Since komeda Compiz doesn't output alpha, so the slave->CU result
only can be used as bottom input when blend it with master input data
flows.
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Komeda supports two types of layer split:
- none-scaling split
- scaling split
Since D71 merger only support scaler as input, so for none-scaling split,
the two layer dflow will be output to compiz directly. for scaling_split,
the data flow will be merged by merger firstly, then output the merged
data flow to compiz.
Komeda handles the split in kernel completely to hide the detailed and
complicated split calcualtion to user mode, for user only need to set the
layer_split property to enable/disable it.
v2: Rebase
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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To achieve same caling effect compare with none split, the texel
calculation need to use the same scaling ratio before split, so add
"total_xxx" to pipeline to describe the hsize/vsize before split.
Update pipeline and d71_scaler_update accordingly.
v2: Rebase and addressed Liviu's comments
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Introduce a new component komeda_merger, because D71 HW supports to split
a whole image to two half parts and does the scaling independently. Merger
merges two separate results to one, and output it to compositor or wb_layer
For this patch:
- Add the definition of komeda_merger/merger_state
- Report and initialize komeda_merger according to the D71 HW.
v2: Rebase
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Current komeda driver uses three dedicated clks for a specific purpose:
- mclk: main engine clock
- pclk: APB clock
- pipeline->aclk: AXI clock.
But per spec the komeda HW only has three input clks:
- ACLK: used for AXI masters, APB slave and most pipeline processing
- PXCLK for pipeline 0: output pixel clock for pipeline 0
- PXCLK for pipeline 1: output pixel clock for pipeline 1
So one ACLK is enough, no need to split it to three mclk/pclk/axiclk.
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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To avoid confusion, unify the driver main engine clk name "mclk" to
the spec name "aclk".
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Current komeda driver uses three dedicated clks for a specific purpose:
- mclk: main engine clock
- pclk: APB clock
- pipeline->aclk: AXI clock.
But per spec the komeda HW only has three input clks:
- ACLK: used for AXI masters, APB slave and most pipeline processing
- PXCLK for pipeline 0: output pixel clock for pipeline 0
- PXCLK for pipeline 1: output pixel clock for pipeline 1
So one ACLK is enough, no need to split it to three mclk/pclk/axiclk.
drop pclk/pipeline->axiclk. but only keep one mclk in komeda driver.
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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- Creates the zpos property.
- Implement komeda_crtc_normalize_zpos to replace
drm_atomic_normalize_zpos, reasons as the following:
1. The drm_atomic_normalize_zpos allows to configure same zpos for
different planes, but komeda doesn't support such configuration.
2. For further slave pipline case, Komeda need to calculate the
max_slave_zorder, we will merge such calculation into
komed_crtc_normalize_zpos to save a separated plane_state loop.
3. For feature none-scaling layer_split, which a plane_state will be
assigned to two individual layers(left/right), which requires two
normalize_zpos for this plane, plane_st->normalize_zpos will be used
by left layer, normalize_zpos + 1 for right_layer.
This patch series depends on:
- https://patchwork.freedesktop.org/series/58710/
- https://patchwork.freedesktop.org/series/59000/
- https://patchwork.freedesktop.org/series/59002/
- https://patchwork.freedesktop.org/series/59747/
- https://patchwork.freedesktop.org/series/59915/
- https://patchwork.freedesktop.org/series/60083/
- https://patchwork.freedesktop.org/series/60698/
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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- Y0L2 and P010 are block (tiled) format, Update the kemeda logic to
compatible with such block format.
- Since DRM introduced a general block information to drm_format_info,
the format_caps->tiled_size no long needed, delete it.
- Build some fb utils functions for code sharing.
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Add komeda_fb_check_src_coords and check if the layer configured src
rect can meet the requirement of fb and fb format.
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Updates the device-tree doc about how to enable SMMU by devicetree.
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Adds iommu_connect and disconnect for SMMU support, and configures
TBU translation once SMMU has been attached to the display device.
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
[fixed checking of error code returned by dp_wait_cond() and removed
extraneous DRM_ERROR() calls]
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Adds color-encoding properties if layer can support YUV format.
Updates HW YUV-RGB matrix state according to the color-encoding
properties.
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Updates HW up-sampling method according to the format type.
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Komeda series hardware doesn't support Rot90 for AFBC wide block. So
add limitation check to reject it if such configuration has been posted.
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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- Adds rotation property to plane.
- Komeda display rotation support diverges from the specific formats,
so need to check the user required rotation type with the format caps
and reject the commit if it can not be supported.
- In the layer validate flow, sets the rotation value to the layer
state. If r90 or r270, swap the width and height of the data flow
for next stage.
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Besides clearing the input ID to zero, D71 compiz also has input
enable bit in CU_INPUTx_CONTROL which need to be cleared.
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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dp_wait_cond() currently returns the number of retries left over which
is hardly an useful information. Convert to returning -ETIMEDOUT when
the wait times out, or 0 (zero) when condition is met before deadline.
Also convert the users of the function to return the error value.
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
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Creates plane alpha and blend mode properties attached to plane.
This patch depends on:
- https://patchwork.freedesktop.org/series/59915/
- https://patchwork.freedesktop.org/series/58665/
- https://patchwork.freedesktop.org/series/59000/
- https://patchwork.freedesktop.org/series/59002/
- https://patchwork.freedesktop.org/series/59471/
Changes since v1:
- Adds patch denpendency in the comment
Changes since v2:
- Remove [RFC] from the subject
Changes since v3:
- Rebase the code
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Besides scaling, Arm display scaler also can support image enhancement.
For support it, Add a new property "img_enhancement" to plane, then user
can turn on/off it by this property, and kernel follow user's requirement
to maitain the state and enable/disable the real HW image enhancement.
v2: Rebase and rename "needs_img_enhancement" to "en_img_enhancement"
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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For downscaling there is a restriction, the downscaling needed engine
clock can not acceed the real engine clock, and the clock requirement
mostly depend on the specific HW, to solve this problem:
1. Add a pipeline func - downscaling_clk_check for CORE to query the real
HW if downscaling can be supported.
2. Add new property clock ratio which is the ratio of:
(mclk << 32) / pxlclk
then User driver can use this ratio to do the clock check to avoid post
an invalid downscaling to kernel.
v2: Rebase and Delete debug print
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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1. Add scaler to writeback pipeline to enable the writeback scaling support
2. Display HW can not do upscaling for writeback, check it when validate.
v2: Rebase
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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1. Add scaler component and initialize it according to D71 HW.
2. Implement d71_scaler_update/disable/dump
v2:
- Correct a typo
- Constify component_funcs: d71_scaler_funcs
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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This patch add the initial and necessary logic for CORE to support scaler:
- Complete the struct komeda_scaler and komeda_scaler_state for adding
the scaler specific features and capablities.
- Implement komeda_scaler_validate to check the scaler with the data flow
configurations.
- Enable scaling support for plane input path (layer input data flow).
v2: Fix a typo, and rename "needs_scaling" to "en_scaling"
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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According to the komeda pipeline configuration, attach scaler to drm as
private object.
v2: Rebase
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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For supporting AFBC:
1. Check if the user requested modifier can be supported by display HW.
2. Check the obj->size with AFBC's requirement.
3. Configure HW according to the modifier (afbc features)
This patch depends on:
- https://patchwork.freedesktop.org/series/59915/
- https://patchwork.freedesktop.org/series/59000/
v2: Rebase and addressed Ayan's comments
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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Komeda driver uses a individual component to describe the HW's writeback
caps, but drivers doesn't define a new structure and still uses the
existing "struct komeda_layer" to describe this new component.
The detailed changes as follow:
1. Initialize wb_layer according to HW and report it to CORE.
2. CORE exposes wb_layer as a resource to KMS by private_obj.
3. Report writeback supporting by add a wb_connector to KMS, and then
wb_connector will take act as a component resources user,
so the func komeda_wb_encoder_atomic_check claims komeda resources
(scaler and wb_layer) accroding to its state configuration to the
wb_connector. and the wb_state configuration will be validated on the
specific component resources to see if the caps of component can
meet the requirement of wb_connector. if not check failed.
4. Update irq_handler to notify the completion of writeback.
NOTE:
This change doesn't add scaling writeback support, that support will
be added in the future after the scaler support.
v2: Rebase
v3: Rebase and constify the d71_wb_layer_funcs
v4: Addressed Ayan's comments
Depends on:
- https://patchwork.freedesktop.org/series/59915/
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Acked-by: Ayan Kumar Halder <ayan.halder@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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git://anongit.freedesktop.org/drm/drm-intel into drm-next
Features:
- HDR support (Uma, Ville)
- Add I2C symlink under HDMI connector similar to DP (Oleg)
- Add ICL multi-segmented gamma support (Shashank, Uma)
- Update register whitelist support for new hardware (Robert, John)
- GuC firmware update with updated ABI interface (Michal, Oscar)
- Add support for new DMC header versions (Lucas)
- In-kernel blitter client for selftest use (Matthew)
- Add Mule Creec Canyon (MCC) PCH support to go with EHL (Matt)
- EHL platform feature updates (Matt)
- Use Command Transport Buffers with GuC on all gens (Daniele)
- New i915.force_probe module parameter to replace i915.alpha_support (Jani)
Refactoring:
- Better runtime PM code abstraction/encapsulation (Daniele)
- VBT parsing cleanup and improvements (Jani)
- Move display code to its own subdirectory (Jani)
- Header cleanup (Jani, Daniele)
- Prep work for subsclice mask expansion (Stuart)
- Use uncore mmio register accessors more, remove unused macro wrappers (Tvrtko)
- Remove unused atomic property get/set stubs (Maarten)
- GTT cleanups and improvements (Mika)
- Pass intel_ types instead of drm_ types in plenty of display code (Ville)
- Engine reset, hangcheck, fault code cleanups and improvements (Tvrtko)
- Consider AML variants simply as either KBL or CFL ULX (Ville)
- State checker cleanups and improvements (Ville)
- GEM code reorganization to more files under gem subdirectory (Chris)
- Reducing dependency on a coarse struct_mutex (Chris)
Fixes:
- Fix use of uninitialized/incorrect error pointers (Colin, Dan)
- Fix DSI fastboot on some VLV/CHV platforms (Hans)
- Fix DSI error path (Hans)
- Add ICL port A combo PHY HW state check (Imre)
- Fix ICL AUX-B HW not done issue (Imre)
- Fix perf whitelist on gen10+ (Lionel)
- Fix PSR exit by forcing manual exit on older gens (José)
- Match voltage ranges instead of exact values (Lucas)
- Fix SDVO HDMI audio, with cleanups (Ville)
- Fix plane state dumps (Ville)
- Fix driver cleanup code to support driver hot unbind (Janusz)
- Add checks for ICL memory bandwidth requirements (Ville)
- Fix toggling between no C8 planes vs. at least one C8 plane (Ville)
- Improved checks on PLL usage conditions, refactoring (Ville)
- Avoid clobbering M/N values in fastset fuzzy checks (Ville)
- Take a runtime pm wakeref for atomic commits (Chris)
- Do not allow runtime pm autosuspend to remove userspace GGTT mmaps too quickly (Chris)
- Avoid refcount_inc on known zero count to avoid debug flagging (Chris)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87v9x1lpdh.fsf@intel.com
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Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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Since commit eb8d0f5af4ec ("drm/i915: Remove GPU reset dependence on
struct_mutex"), the I915_WAIT_LOCKED flags passed to i915_request_wait()
has been defunct. Now go ahead and remove it from all callers.
References: eb8d0f5af4ec ("drm/i915: Remove GPU reset dependence on struct_mutex")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190618074153.16055-3-chris@chris-wilson.co.uk
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