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* pinctrl: at91-pio4: Get rid of legacy callLinus Walleij2018-09-141-11/+10
| | | | | | | | | | By just moving the atmel_gpio_to_irq() and calling the internal function we can get rid of the driver calling back out into the deprecated external consumer API. Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: at91: don't use the same irqchip with multiple gpiochipsLudovic Desroches2018-09-141-14/+14
| | | | | | | | | | Sharing the same irqchip with multiple gpiochips is not a good practice. For instance, when installing hooks, we change the state of the irqchip. The initial state of the irqchip for the second gpiochip to register is then disrupted. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: at91-pio4: fix has_config check in atmel_pctl_dt_subnode_to_map()Dan Carpenter2018-09-131-6/+2
| | | | | | | | | | | | | | | | Smatch complains about this condition: if (has_config && num_pins >= 1) The "has_config" variable is either uninitialized or true. The "num_pins" variable is unsigned and we verified that it is non-zero on the lines before so we know "num_pines >= 1" is true. Really, we could just check "num_configs" directly and remove the "has_config" variable. Fixes: 776180848b57 ("pinctrl: introduce driver for Atmel PIO4 controller") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: spmi-mpp: Fix drive strength settingStephen Boyd2018-09-101-1/+5
| | | | | | | | | | | | | It looks like we parse the drive strength setting here, but never actually write it into the hardware to update it. Parse the setting and then write it at the end of the pinconf setting function so that it actually sticks in the hardware. Fixes: 0e948042c420 ("pinctrl: qcom: spmi-mpp: Implement support for sink mode") Cc: Doug Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sirf: atlas7: remove set but not used variables 'conf, bank'YueHaibing2018-09-051-4/+0
| | | | | | | | | | | | | | | | Fixes gcc '-Wunused-but-set-variable' warning: drivers/pinctrl/sirf/pinctrl-atlas7.c: In function 'atlas7_pinmux_resume_noirq': drivers/pinctrl/sirf/pinctrl-atlas7.c:5545:6: warning: variable 'bank' set but not used [-Wunused-but-set-variable] u32 bank; drivers/pinctrl/sirf/pinctrl-atlas7.c:5543:28: warning: variable 'conf' set but not used [-Wunused-but-set-variable] struct atlas7_pad_config *conf; Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: spmi-mpp: Fix pmic_mpp_config_get() to be compliantDouglas Anderson2018-09-051-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | If you look at "pinconf-groups" in debugfs for ssbi-mpp you'll notice it looks like nonsense. The problem is fairly well described in commit 1cf86bc21257 ("pinctrl: qcom: spmi-gpio: Fix pmic_gpio_config_get() to be compliant") and commit 05e0c828955c ("pinctrl: msm: Fix msm_config_group_get() to be compliant"), but it was pointed out that ssbi-mpp has the same problem. Let's fix it there too. NOTE: in case it's helpful to someone reading this, the way to tell whether to do the -EINVAL or not is to look at the PCONFDUMP for a given attribute. If the last element (has_arg) is false then you need to do the -EINVAL trick. ALSO NOTE: it seems unlikely that the values returned when we try to get PIN_CONFIG_BIAS_PULL_UP will actually be printed since "has_arg" is false for that one, but I guess it's still fine to return different values so I kept doing that. It seems like another driver (ssbi-gpio) uses a custom attribute (PM8XXX_QCOM_PULL_UP_STRENGTH) for something similar so maybe a future change should do that here too. Fixes: cfb24f6ebd38 ("pinctrl: Qualcomm SPMI PMIC MPP pin controller driver") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: ssbi-gpio: Fix pm8xxx_pin_config_get() to be compliantDouglas Anderson2018-09-051-7/+21
| | | | | | | | | | | | | | | | | If you look at "pinconf-groups" in debugfs for ssbi-gpio you'll notice it looks like nonsense. The problem is fairly well described in commit 1cf86bc21257 ("pinctrl: qcom: spmi-gpio: Fix pmic_gpio_config_get() to be compliant") and commit 05e0c828955c ("pinctrl: msm: Fix msm_config_group_get() to be compliant"), but it was pointed out that ssbi-gpio has the same problem. Let's fix it there too. Fixes: b4c45fe974bc ("pinctrl: qcom: ssbi: Family A gpio & mpp drivers") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'sh-pfc-for-v4.20-tag1' of ↵Linus Walleij2018-08-319-397/+1327
|\ | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.20 - Add SATA and audio pin groups on R-Car M3-N, - Add EtherAVB pin groups on RZ/G1C, - Add PWM and display (DU) pin groups on R-Car E3, - Add support for the new RZ/G2M (r8a774a1) SoC.
| * pinctrl: sh-pfc: r8a77990: Add DU pins, groups and functionLaurent Pinchart2018-08-301-0/+110
| | | | | | | | | | | | | | This patch adds DU pins, groups and function for the R8A77990 (E3) SoC. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * pinctrl: sh-pfc: r8a77965: Add Audio SSI pin supportHoan Nguyen An2018-08-281-0/+232
| | | | | | | | | | | | | | Add Audio SSI pin support for r8a77965. Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * pinctrl: sh-pfc: r8a77965: Add Audio clock pin supportHoan Nguyen An2018-08-281-0/+160
| | | | | | | | | | | | | | Add Audio clock pin support for r8a77965. Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * pinctrl: sh-pfc: r8a7796: Add R8A774A1 PFC supportBiju Das2018-08-285-397/+453
| | | | | | | | | | | | | | | | | | | | | | Renesas RZ/G2M (r8a774a1) is pin compatible with R-Car M3-W (r8a7796), however it doesn't have several automotive specific peripherals. Add an r8a7796 specific pin groups/functions along with common pin groups/functions for supporting both r8a7796 and r8a774a1 SoCs. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * dt-bindings: pinctrl: sh-pfc: Document r8a774a1 PFC supportBiju Das2018-08-281-0/+1
| | | | | | | | | | | | | | | | | | | | Document PFC support for the R8A774A1 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * pinctrl: sh-pfc: r8a77990: Add PWM pins, groups and functionsTakeshi Kihara2018-08-281-0/+211
| | | | | | | | | | | | | | | | | | | | This patch adds PWM{0,1,2,3,4,5,6} pins, groups and functions to the R8A77990 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * pinctrl: sh-pfc: r8a77470: Add EtherAVB pin groupsBiju Das2018-08-281-0/+133
| | | | | | | | | | | | | | | | | | Add EtherAVB groups and functions definitions for R8A77470 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * pinctrl: sh-pfc: r8a77965: Add SATA pins, groups and functionsTakeshi Kihara2018-08-271-0/+27
| | | | | | | | | | | | | | | | | | | | This patch adds SATA0 pin, group and function to the R8A77965 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [wsa: rebased to upstream base] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | pinctrl: remove unnecessary unlikely()Igor Stoppa2018-08-311-1/+1
| | | | | | | | | | | | | | | | | | | | WARN_ON() already contains an unlikely(), so it's not necessary to wrap it into another. Signed-off-by: Igor Stoppa <igor.stoppa@huawei.com> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: lewisburg: Define PM ops via INTEL_PINCTRL_PM_OPS()Andy Shevchenko2018-08-311-4/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sunrisepoint: Define PM ops via INTEL_PINCTRL_PM_OPS()Andy Shevchenko2018-08-311-4/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: icelake: Define PM ops via INTEL_PINCTRL_PM_OPS()Andy Shevchenko2018-08-311-4/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: geminilake: Define PM ops via INTEL_PINCTRL_PM_OPS()Andy Shevchenko2018-08-311-4/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: denverton: Define PM ops via INTEL_PINCTRL_PM_OPS()Andy Shevchenko2018-08-311-4/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: cedarfork: Define PM ops via INTEL_PINCTRL_PM_OPS()Andy Shevchenko2018-08-311-4/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: cannonlake: Define PM ops via INTEL_PINCTRL_PM_OPS()Andy Shevchenko2018-08-311-4/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: broxton: Define PM ops via INTEL_PINCTRL_PM_OPS()Andy Shevchenko2018-08-311-4/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: intel: Introduce common macro for PM operationsAndy Shevchenko2018-08-311-0/+5
| | | | | | | | | | | | | | | | | | | | This common macro will simplify the code of pin control drivers for Intel SoCs. Suggested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sunrisepoint: Convert to use intel_pinctrl_probe_by_hid()Andy Shevchenko2018-08-311-10/+3
| | | | | | | | | | | | | | | | | | | | Get rid of code duplication by converting to use intel_pinctrl_probe_by_hid(). No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: cannonlake: Convert to use intel_pinctrl_probe_by_hid()Andy Shevchenko2018-08-311-10/+3
| | | | | | | | | | | | | | | | | | | | Get rid of code duplication by converting to use intel_pinctrl_probe_by_hid(). No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: intel: Introduce intel_pinctrl_probe_by_hid() internal APIAndy Shevchenko2018-08-312-0/+10
| | | | | | | | | | | | | | | | | | | | Introduce intel_pinctrl_probe_by_hid() internal API to simplify drivers, which are using ACPI _HID to distinguish which SoC data needs to be used when being probed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: baytrail: Convert to use device_get_match_data()Andy Shevchenko2018-08-311-6/+3
| | | | | | | | | | | | | | | | | | | | Get rid of code duplication by converting to use device_get_match_data(). No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: geminilake: Convert to use intel_pinctrl_probe_by_uid()Andy Shevchenko2018-08-311-22/+3
| | | | | | | | | | | | | | | | | | | | Get rid of code duplication by converting to use intel_pinctrl_probe_by_uid(). No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: broxton: Convert to use intel_pinctrl_probe_by_uid()Andy Shevchenko2018-08-311-39/+2
| | | | | | | | | | | | | | | | | | | | Get rid of code duplication by converting to use intel_pinctrl_probe_by_uid(). No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: intel: Introduce intel_pinctrl_probe_by_uid() internal APIAndy Shevchenko2018-08-312-0/+40
| | | | | | | | | | | | | | | | | | | | Introduce intel_pinctrl_probe_by_uid() internal API to simplify drivers, which are using ACPI _UID to distinguish which SoC data needs to be used when being probed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge branch 'ib-ingenic' into develLinus Walleij2018-08-297-470/+487
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| * | pinctrl: ingenic: Include the right headerLinus Walleij2018-08-291-1/+1
| | | | | | | | | | | | | | | | | | | | | This is a GPIO driver so only include <linux/gpio/driver.h> Cc: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: ingenic: Remove driverPaul Cercueil2018-08-293-404/+0
| | | | | | | | | | | | | | | | | | | | | The pinctrl-ingenic driver is now handling the GPIO chips directly. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: ingenic: Drop dependency on MACH_INGENICPaul Cercueil2018-08-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Depending on MACH_INGENIC prevent us from creating a generic kernel that works on more than one MIPS board. Instead, we just depend on MIPS being set. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: ingenic: Add support for the JZ4725BPaul Cercueil2018-08-291-0/+98
| | | | | | | | | | | | | | | | | | | | | Add support for the JZ4725B and compatible SoCs from Ingenic. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: ingenic: Implement .get_direction for GPIO chipsPaul Cercueil2018-08-291-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | This allows to read from debugfs whether the GPIOs requested are set as input or output. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: ingenic: Merge GPIO functionalityPaul Cercueil2018-08-292-8/+331
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge the code of the gpio-ingenic driver into the pinctrl-ingenic driver. The reason behind this, is that the same hardware block handles both pin config / muxing and GPIO. ingenic_gpio_probe() have been marked as __init, but for the most part, the code is the exact same as what it was in the gpio-ingenic driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: ingenic: Mark probe function as __initPaul Cercueil2018-08-291-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | By using platform_driver_probe() instead of platform_driver_register(), we can mark the ingenic_pinctrl_probe() function as __init. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: ingenic: Probe driver at subsys_initcallPaul Cercueil2018-08-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Using postcore_initcall() makes the driver try to initialize way too early. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | dt-bindings: pinctrl: Update pinctrl-ingenic for JZ4725B and GPIO mergePaul Cercueil2018-08-292-50/+35
| |/ | | | | | | | | | | | | | | | | | | | | The pinctrl-ingenic driver now supports the JZ4725B SoC. Furthermore, the gpio-ingenic driver was dropped and the pinctrl-ingenic driver is now responsible for providing the GPIO functionality. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: Convert to using %pOFn instead of device_node.nameRob Herring2018-08-2917-69/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation to remove the node name pointer from struct device_node, convert printf users to use the %pOFn format specifier. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Dong Aisheng <aisheng.dong@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Stefan Agner <stefan@agner.ch> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Sean Wang <sean.wang@mediatek.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@bootlin.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Tony Lindgren <tony@atomide.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Barry Song <baohua@kernel.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Cc: linux-omap@vger.kernel.org Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Sean Wang <sean.wang@mediatek.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: intel: Fix a spelling typo in kernel documentationAndy Shevchenko2018-08-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The parameter 'community' had been spelled incorrectly. Fix it here. As a side effect it satisfies static checkers that issue the following warnings: drivers/pinctrl/intel/pinctrl-intel.c:845: warning: Function parameter or member 'community' not described in 'intel_gpio_to_pin' drivers/pinctrl/intel/pinctrl-intel.c:845: warning: Excess function parameter 'commmunity' description in 'intel_gpio_to_pin' Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: lpc18xx: mark expected switch fall-throughsGustavo A. R. Silva2018-08-291-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 1292308 ("Missing break in switch") Addresses-Coverity-ID: 1292309 ("Missing break in switch") Addresses-Coverity-ID: 1309546 ("Missing break in switch") Addresses-Coverity-ID: 1357369 ("Missing break in switch") Addresses-Coverity-ID: 1357389 ("Missing break in switch") Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: uniphier: drop meaningless pin from SD1 pin-mux of Pro4Masahiro Yamada2018-08-291-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The pin 327 was supposed to be used as a voltage control line for the SD card regulator, but the SD card port1 does not support UHS-I. It only supports 3.3V signaling, hence this pin is pointless. Just a note about the background. At first, hardware engineers tried to implement the UHS for this port. Then, they needed to shrink the silicon die size, and gave up the UHS, but forgot to remove the pin assignment. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: madera: Fix missing space in debugfs outputRichard Fitzgerald2018-08-291-1/+1
| | | | | | | | | | | | | | The SCHMITT tag was being dumped without a separating space. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: madera: Return ENOTSUPP for unsupported pin attributesRichard Fitzgerald2018-08-291-2/+2
| | | | | | | | | | | | | | | | The pin_config_[get|set] functions should return ENOTSUPP if the requested attribute isn't supported. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: madera: Set is_genericRichard Fitzgerald2018-08-291-1/+1
| | | | | | | | | | | | | | | | We are using the generic pin configuration interface so we can set is_generic. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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