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* | | | | Merge tag 'actions-arm64-dt-for-v5.10' of ↵Olof Johansson2020-10-031-1/+16
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi ARM64 DT for v5.10: - Fix the memory region used by pinctrl and sps drivers on the S700 SoC. The issue is fixed by limiting the address space used by pinctrl driver. In hardware these two are separate subsystems but the hw engineers somehow merged the registers space into one. So we now limit the address space with appropriate offsets for the two drivers. - Add DMA controller support for S700 SoC. The relevant driver changes are picked up by DMA Engine mainatainer. The DMA on this SoC can be used for mem-to-mem and mem-to-peripheral transfers. * tag 'actions-arm64-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: arm64: dts: actions: Add DMA Controller for S700 arm64: dts: actions: limit address range for pinctrl node Link: https://lore.kernel.org/r/20200922114030.GC11251@Mani-XPS-13-9360 Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | arm64: dts: actions: Add DMA Controller for S700Amit Singh Tomar2020-09-221-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds DMA controller present on Actions S700, it differs from S900 in terms of number of dma channels and requests. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * | | | | arm64: dts: actions: limit address range for pinctrl nodeAmit Singh Tomar2020-09-221-1/+1
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for Actions Semi S700") following error has been observed while booting Linux on Cubieboard7-lite(based on S700 SoC). [ 0.257415] pinctrl-s700 e01b0000.pinctrl: can't request region for resource [mem 0xe01b0000-0xe01b0fff] [ 0.266902] pinctrl-s700: probe of e01b0000.pinctrl failed with error -16 This is due to the fact that memory range for "sps" power domain controller clashes with pinctrl. One way to fix it, is to limit pinctrl address range which is safe to do as current pinctrl driver uses address range only up to 0x100. This commit limits the pinctrl address range to 0x100 so that it doesn't conflict with sps range. Fixes: 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for Actions Semi S700") Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Suggested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* | | | | Merge tag 'actions-arm-dt-for-v5.10' of ↵Olof Johansson2020-10-035-3/+109
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi ARM DT for v5.10: - Add devicetree support for Caninos Loucos Labrador SBC manufactured by Laboratory of Integrated Technological Systems (LSI-TEC), Brazil. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: https://caninosloucos.org/en/ - Fix PPI interrupt specifiers for peripherals attached to Cortex-A9 CPU - Add devicetree support for RoseapplePi SBC manufactured by Roseapple Pi team in Taiwan. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: http://roseapplepi.org/ * tag 'actions-arm-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: ARM: dts: owl-s500: Add RoseapplePi ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiers ARM: dts: Add Caninos Loucos Labrador v2 Link: https://lore.kernel.org/r/20200922113712.GB11251@Mani-XPS-13-9360 Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | ARM: dts: owl-s500: Add RoseapplePiCristian Ciocaltea2020-09-222-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a Device Tree for the RoseapplePi SBC. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Reviewed-by: Peter Korsgaard <peter@korsgaard.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * | | | | ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiersCristian Ciocaltea2020-09-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PPI interrupts for cortex-a9 were incorrectly specified, fix them. Fixes: fdfe7f4f9d85 ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar") Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Reviewed-by: Peter Korsgaard <peter@korsgaard.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * | | | | ARM: dts: Add Caninos Loucos Labrador v2Matheus Castello2020-09-223-0/+58
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Device Trees for Caninos Loucos Labrador CoM Core v2 and base board M v1. Based on the work of Andreas Färber on Lemaker Guitar device tree. Signed-off-by: Matheus Castello <matheus@castello.eng.br> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* | | | | Merge tag 'actions-bindings-for-v5.10' of ↵Olof Johansson2020-10-032-0/+15
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi bindings for v5.10 - Add vendor prefix for Roseapple Pi: http://roseapplepi.org/ - Document RoseapplePi SBC manufactured by Roseapple Pi team in Taiwan. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: http://roseapplepi.org/index.php/spec/ - Add vendor prefix for Caninos Loucos Program: https://caninosloucos.org/en/program-en/ - Document Caninos Loucos Labrador SBC manufactured by Laboratory of Integrated Technological Systems (LSI-TEC), Brazil. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: https://caninosloucos.org/en/labrador-32-en/ * tag 'actions-bindings-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: dt-bindings: arm: actions: Document RoseapplePi dt-bindings: Add vendor prefix for RoseapplePi.org dt-bindings: arm: actions: Document Caninos Loucos Labrador dt-bindings: Add vendor prefix for Caninos Loucos Link: https://lore.kernel.org/r/20200922113408.GA11251@Mani-XPS-13-9360 Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | dt-bindings: arm: actions: Document RoseapplePiCristian Ciocaltea2020-09-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define compatible strings for RoseapplePi, a SBC manufactured in Taiwan, based on Actions Semi S500 reference design. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * | | | | dt-bindings: Add vendor prefix for RoseapplePi.orgCristian Ciocaltea2020-09-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add devicetree vendor prefix for RoseapplePi.org Foundation. Website: http://roseapplepi.org/ Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * | | | | dt-bindings: arm: actions: Document Caninos Loucos LabradorMatheus Castello2020-09-221-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the documentation to add the Caninos Loucos Labrador. Labrador project consists of the computer on module Core v2 based on the Actions Semi S500, computer on module Core v3 based on the Actions Semi S700 and the Labrador base boards. Signed-off-by: Matheus Castello <matheus@castello.eng.br> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * | | | | dt-bindings: Add vendor prefix for Caninos LoucosMatheus Castello2020-09-221-0/+2
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Caninos Loucos Program develops Single Board Computers with an open structure. The Program wants to form a community of developers to use IoT technologies and disseminate the learning of embedded systems in Brazil. It is an initiative of the Technological Integrated Systems Laboratory (LSI-TEC) with the support of Polytechnic School of the University of São Paulo (Poli-USP) and Jon "Maddog" Hall. Signed-off-by: Matheus Castello <matheus@castello.eng.br> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* | | | | Merge tag 'sunxi-dt-for-5.10-1' of ↵Olof Johansson2020-10-0327-51/+770
|\ \ \ \ \ | | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt Our usual bunch of patches to support the Allwinner SoCs, this time adding: - Allwinner A100 initial support - Mali, DMA, cedrus and IR Support for the R40 - Crypto support for the v3s - New board: Allwinner A100 Perf1 * tag 'sunxi-dt-for-5.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (24 commits) ARM: dts: sun8i: v3s: Enable crypto engine dt-bindings: crypto: Add compatible for V3s dt-bindings: crypto: Specify that allwinner, sun8i-a33-crypto needs reset arm64: dts: allwinner: a64: Update the audio codec compatible arm64: dts: allwinner: a64: Update codec widget names ARM: dts: sun8i: a33: Update codec widget names ARM: dts: sun8i: r40: Add video engine node ARM: dts: sun8i: r40: Add node for system controller dt-bindings: sram: allwinner, sun4i-a10-system-control: Add R40 compatibles ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable IR ARM: dts: sun8i: r40: Add IR nodes dt-bindings: media: allwinner, sun4i-a10-ir: Add R40 compatible ARM: dts: sun8i: r40: Add DMA node dt-bindings: dma: allwinner,sun50i-a64-dma: Add R40 compatible arm64: allwinner: A100: add support for Allwinner Perf1 board dt-bindings: arm: sunxi: Add Allwinner A100 Perf1 Board bindings arm64: allwinner: A100: add the basical Allwinner A100 DTSI file dt-bindings: irq: sun7i-nmi: Add binding for A100's NMI controller dt-bindings: irq: sun7i-nmi: fix dt-binding for a80 nmi ARM: dts: sun4i: Enable HDMI support on the Mele A1000 ... Link: https://lore.kernel.org/r/ac39ee89-ea3a-4971-8cd7-8c4b2ecef39d.lettre@localhost Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | ARM: dts: sun8i: v3s: Enable crypto engineMartin Cerveny2020-09-171-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V3s contains crypto engine that is compatible with A33. Add device tree node. Signed-off-by: Martin Cerveny <m.cerveny@computer.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200907162458.23730-3-m.cerveny@computer.org
| * | | | dt-bindings: crypto: Add compatible for V3sMartin Cerveny2020-09-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner V3s has crypto engine similar to that in A33. So add compatible. Signed-off-by: Martin Cerveny <m.cerveny@computer.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200907162458.23730-2-m.cerveny@computer.org
| * | | | dt-bindings: crypto: Specify that allwinner, sun8i-a33-crypto needs resetCorentin Labbe2020-09-171-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When adding allwinner,sun8i-a33-crypto, I forgot to add that it needs reset. Furthermore, there are no need to use items to list only one compatible in compatible list. Fixes: f81547ba7a98 ("dt-bindings: crypto: add new compatible for A33 SS") Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200907175437.4464-1-clabbe.montjoie@gmail.com
| * | | | arm64: dts: allwinner: a64: Update the audio codec compatibleSamuel Holland2020-09-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The audio codec in the A64 has some differences from the A33 codec, so it needs its own compatible. Since the two codecs are similar, the A33 codec compatible is kept as a fallback. Using the correct compatible fixes a channel inversion issue and cleans up some DAPM widgets that are no longer used. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200726012557.38282-8-samuel@sholland.org
| * | | | arm64: dts: allwinner: a64: Update codec widget namesSamuel Holland2020-09-179-36/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sun8i-codec driver introduced a new set of DAPM widgets that more accurately describe the hardware topology. Update the various device trees to use the new widget names. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200726012557.38282-7-samuel@sholland.org
| * | | | ARM: dts: sun8i: a33: Update codec widget namesSamuel Holland2020-09-172-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sun8i-codec driver introduced a new set of DAPM widgets that more accurately describe the hardware topology. Update the various device trees to use the new widget names. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200726012557.38282-6-samuel@sholland.org
| * | | | ARM: dts: sun8i: r40: Add video engine nodeJernej Skrabec2020-09-171-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner R40 SoC has a video engine. Add a node for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825173523.1289379-6-jernej.skrabec@siol.net
| * | | | ARM: dts: sun8i: r40: Add node for system controllerJernej Skrabec2020-08-271-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner R40 has system controller and SRAM C1 region similar to that in A10. Add nodes for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825173523.1289379-3-jernej.skrabec@siol.net
| * | | | dt-bindings: sram: allwinner, sun4i-a10-system-control: Add R40 compatiblesJernej Skrabec2020-08-271-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner R40 has system controller similar to that in A10. Add compatibles for system controller and sram c1 region. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825173523.1289379-2-jernej.skrabec@siol.net
| * | | | ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable IRJernej Skrabec2020-08-271-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BananaPi M2 Ultra has IR receiver connected to IR0. Enable it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825171358.1286902-4-jernej.skrabec@siol.net
| * | | | ARM: dts: sun8i: r40: Add IR nodesJernej Skrabec2020-08-271-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner R40 has two IR cores, add nodes for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825171358.1286902-3-jernej.skrabec@siol.net
| * | | | dt-bindings: media: allwinner, sun4i-a10-ir: Add R40 compatibleJernej Skrabec2020-08-271-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner R40 has very similar IR core to that found in A31. Add compatible for R40 and while at it, sort compatibles by family. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825171358.1286902-2-jernej.skrabec@siol.net
| * | | | ARM: dts: sun8i: r40: Add DMA nodeJernej Skrabec2020-08-251-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner R40 SoC has DMA with 16 channels and 31 request sources. Add a node for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825100030.1145356-3-jernej.skrabec@siol.net
| * | | | dt-bindings: dma: allwinner,sun50i-a64-dma: Add R40 compatibleJernej Skrabec2020-08-251-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R40 has DMA engine which is basically the same as that in A64, with only known difference being number of request sources and number of channels. Add compatible for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825100030.1145356-2-jernej.skrabec@siol.net
| * | | | arm64: allwinner: A100: add support for Allwinner Perf1 boardYangtao Li2020-08-252-0/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A100 perf1 is an Allwinner A100-based SBC, with the following features: - 1GiB DDR3 DRAM - AXP803 PMIC - 2 USB 2.0 ports - MicroSD slot and on-board eMMC module - on-board Nand flash - ··· Adds initial support for it, including UART and PMU. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/30f4a3fc6ac84d05094e2c3b89d1dddc8ff6b7fc.1595572867.git.frank@allwinnertech.com
| * | | | dt-bindings: arm: sunxi: Add Allwinner A100 Perf1 Board bindingsYangtao Li2020-08-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document board compatible names for Allwinner A100 Perf1 Board. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/0368996b732f300d0b5719e51dbd4322fa09053d.1595572867.git.frank@allwinnertech.com
| * | | | arm64: allwinner: A100: add the basical Allwinner A100 DTSI fileYangtao Li2020-08-251-0/+364
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner A100 is a new SoC with Cortex-A53 cores, this commit adds the basical DTSI file of it, including the clock, i2c, pins, sid, ths, nmi, and UART support. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/815a458de74b79eb649972de786e647be3846424.1595572867.git.frank@allwinnertech.com
| * | | | dt-bindings: irq: sun7i-nmi: Add binding for A100's NMI controllerYangtao Li2020-08-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a binding for A100's nmi controller. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/953b76413563551b82dd11cadbc99c695f74f721.1595572867.git.frank@allwinnertech.com
| * | | | dt-bindings: irq: sun7i-nmi: fix dt-binding for a80 nmiYangtao Li2020-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no one use "allwinner,sun9i-a80-sc-nmi". The A80 uses "allwinner,sun9i-a80-nmi". Let's fix it. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/fb081585c4fedcb9b8b95e5f16879dff482c9717.1595572867.git.frank@allwinnertech.com
| * | | | ARM: dts: sun4i: Enable HDMI support on the Mele A1000Stefan Monnier2020-08-251-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the display pipeline and HDMI output. Signed-off-by: Stefan Monnier <monnier@iro.umontreal.ca> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200821171833.28177-1-monnier@iro.umontreal.ca
| * | | | ARM: dts: sun8i: r40: Add Mali nodeJernej Skrabec2020-08-251-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R40 has Mali400 GP2 GPU. Add a node for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200824150434.951693-3-jernej.skrabec@siol.net
| * | | | dt-bindings: gpu: mali-utgard: Add Allwinner R40 compatibleJernej Skrabec2020-08-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner R40 SoC contains Mali400, so add its specific compatible to bindings. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200824150434.951693-2-jernej.skrabec@siol.net
| * | | | arm64: dts: allwinner: Mark timer as stopped in suspendSamuel Holland2020-08-183-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When possible, system firmware on 64-bit Allwinner platforms disables OSC24M during system suspend. Since this oscillator is the clock source for the ARM architectural timer, this causes the timer to stop counting. Therefore, the ARM architectural timer must not be marked as NONSTOP on these platforms, or the time will be wrong after system resume. Adding the arm,no-tick-in-suspend property forces the kernel to ignore the ARM architectural timer when calculating sleeptime; it falls back to reading the RTC. Note that this only affects deep suspend, not s2idle. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200809021822.5285-1-samuel@sholland.org
| * | | | arm64: dts: allwinner: replace numerical constant with CCU_CLKXAlexander Kochetkov2020-08-181-4/+4
| |/ / / | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200803143022.25909-1-al.kochet@gmail.com
* | | | Merge tag 'amlogic-dt-2' of ↵Olof Johansson2020-10-031-2/+0
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt ARM: dts: amlogic updates for v5.10 (round 2) - GPU: remove invalid interrupt lines * tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8: remove two invalid interrupt lines from the GPU node Link: https://lore.kernel.org/r/20200917165040.22908-2-krzk@kernel.org Link: https://lore.kernel.org/r/20200917165040.22908-1-krzk@kernel.org Link: https://lore.kernel.org/r/7hsgawl9h2.fsf@baylibre.com Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | ARM: dts: meson8: remove two invalid interrupt lines from the GPU nodeMartin Blumenstingl2020-10-021-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 3.10 vendor kernel defines the following GPU 20 interrupt lines: #define INT_MALI_GP AM_IRQ(160) #define INT_MALI_GP_MMU AM_IRQ(161) #define INT_MALI_PP AM_IRQ(162) #define INT_MALI_PMU AM_IRQ(163) #define INT_MALI_PP0 AM_IRQ(164) #define INT_MALI_PP0_MMU AM_IRQ(165) #define INT_MALI_PP1 AM_IRQ(166) #define INT_MALI_PP1_MMU AM_IRQ(167) #define INT_MALI_PP2 AM_IRQ(168) #define INT_MALI_PP2_MMU AM_IRQ(169) #define INT_MALI_PP3 AM_IRQ(170) #define INT_MALI_PP3_MMU AM_IRQ(171) #define INT_MALI_PP4 AM_IRQ(172) #define INT_MALI_PP4_MMU AM_IRQ(173) #define INT_MALI_PP5 AM_IRQ(174) #define INT_MALI_PP5_MMU AM_IRQ(175) #define INT_MALI_PP6 AM_IRQ(176) #define INT_MALI_PP6_MMU AM_IRQ(177) #define INT_MALI_PP7 AM_IRQ(178) #define INT_MALI_PP7_MMU AM_IRQ(179) However, the driver from the 3.10 vendor kernel does not use the following four interrupt lines: - INT_MALI_PP3 - INT_MALI_PP3_MMU - INT_MALI_PP7 - INT_MALI_PP7_MMU Drop the "pp3" and "ppmmu3" interrupt lines. This is also important because there is no matching entry in interrupt-names for it (meaning the "pp2" interrupt is actually assigned to the "pp3" interrupt line). Fixes: 7d3f6b536e72c9 ("ARM: dts: meson8: add the Mali-450 MP6 GPU") Reported-by: Thomas Graichen <thomas.graichen@gmail.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: thomas graichen <thomas.graichen@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200815181957.408649-1-martin.blumenstingl@googlemail.com
* | | | | Merge tag 'ti-k3-dt-for-v5.10-part2' of ↵Olof Johansson2020-10-0313-96/+1323
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux into arm/dt Second and final device tree updates towards 5.10-rc1 for TI K3 platform. * tag 'ti-k3-dt-for-v5.10-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux: (23 commits) arm64: dts: ti: k3-j7200-common-proc-board: Add USB support arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function arm64: dts: ti: k3-j7200-main: Add USB controller arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux dt-bindings: ti-serdes-mux: Add defines for J7200 SoC arm64: dts: ti: k3-j721e-common-proc-board: align GPIO hog names with dtschema arm64: dts: ti: k3-j7200-common-proc-board: Add support for eMMC and SD card arm64: dts: ti: k3-j7200-main: Add support for MMC/SD controller nodes arm64: dts: ti: k3-j7200-som-p0: Add HyperFlash node arm64: dts: ti: k3-j7200-mcu-wakeup: Add HyperBus node arm64: dts: ti: k3-j7200-common-proc-board: Add I2C IO expanders arm64: dts: ti: k3-j7200: Add I2C nodes arm64: dts: ti: k3-j7200-common-proc-board: add mcu cpsw nuss pinmux and phy defs arm64: dts: ti: k3-j7200-mcu: add mcu cpsw nuss node arm64: dts: ti: k3-j7200-main: add main navss cpts node arm64: dts: ti: k3-j7200: add DMA support arm64: dts: ti: Add support for J7200 Common Processor Board arm64: dts: ti: Add support for J7200 SoC dt-bindings: arm: ti: Add bindings for J7200 SoC ... Link: https://lore.kernel.org/r/20201002134559.orvmgbns57qlyn3i@akan Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | arm64: dts: ti: k3-j7200-common-proc-board: Add USB supportRoger Quadros2020-09-301-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board uses lane 3 of SERDES for USB. Set the mux accordingly. The USB controller and EVM supports super-speed for USB0 on the Type-C port. However, the SERDES has a limitation that upto 2 protocols can be used at a time. The SERDES is wired for PCIe, QSGMII and USB super-speed. It has been chosen to use PCI2 and QSGMII as default. So restrict USB0 to high-speed mode. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-7-rogerq@ti.com
| * | | | | arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane functionKishon Vijay Abraham I2020-09-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First two lanes of SERDES is connected to PCIe, third lane is connected to QSGMII and the last lane is connected to USB. However, Cadence torrent SERDES doesn't support more than 2 protocols at the same time. Configure it only for PCIe and QSGMII. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-6-rogerq@ti.com
| * | | | | arm64: dts: ti: k3-j7200-main: Add USB controllerRoger Quadros2020-09-301-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | j7200 has on USB controller instance. Add that. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-5-rogerq@ti.com
| * | | | | arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUXRoger Quadros2020-09-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USB controller can be connected to one of the 2 lanes of SERDES0 using a MUX. Add a MUX controller node for that. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-4-rogerq@ti.com
| * | | | | arm64: dts: ti: k3-j7200-main: Add SERDES lane control muxRoger Quadros2020-09-301-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SERDES lane control mux registers are present in the CTRLMMR space. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-3-rogerq@ti.com
| * | | | | dt-bindings: ti-serdes-mux: Add defines for J7200 SoCRoger Quadros2020-09-301-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are 4 lanes in each J7200 SERDES. Each SERDES lane mux can select upto 4 different IPs. Define all the possible functions. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Peter Rosin <peda@axentia.se> Cc: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/20200930122032.23481-2-rogerq@ti.com
| * | | | | Merge tag 'ti-k3-dt-fixes-for-v5.9' into ti-k3-dts-nextNishanth Menon2020-09-304-64/+84
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge fix up for TI serdes mux definition introduced in 5.9 as dependency for 5.10 series on J7200 USB. Signed-off-by: Nishanth Menon <nm@ti.com>
| | * | | | | arm64: dts: ti: k3-j721e: Rename mux header and update macro namesRoger Quadros2020-09-214-64/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We intend to use one header file for SERDES MUX for all TI SoCs so rename the header file. The exsting macros are too generic. Prefix them with SoC name. While at that, add the missing configurations for completeness. Fixes: b766e3b0d5f6 ("arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux") Reported-by: Peter Rosin <peda@axentia.se> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/20200918165930.2031-1-rogerq@ti.com
| * | | | | | arm64: dts: ti: k3-j721e-common-proc-board: align GPIO hog names with dtschemaKrzysztof Kozlowski2020-09-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The convention for node names is to use hyphens, not underscores. dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20200916155715.21009-7-krzk@kernel.org
| * | | | | | arm64: dts: ti: k3-j7200-common-proc-board: Add support for eMMC and SD cardFaiz Abbas2020-09-241-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the eMMC and SD card connected on the common processor board sdhci0 is connected to an eMMC while sdhci1 is connected to the micro SD slot. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200924112644.11076-3-faiz_abbas@ti.com
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