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* MAINTAINERS: Remove the entry for the orphaned ams driverMichael Hanselmann2018-07-191-5/+0
| | | | | | | | | | | | I no longer have any hardware with the Apple motion sensor and thus relinquish maintainership of the driver. Remove the maintainers entry entirely, meaning the code will now fall under "LINUX FOR POWER MACINTOSH". Signed-off-by: Michael Hanselmann <linux-kernel@hansmi.ch> [mpe: Drop the entry entirely, munge change log] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/mpic: Pass first free vector number to mpic_setup_error_int()Bharat Bhushan2018-07-192-4/+4
| | | | | | | | | | | | | | | Update the comment to account for the spurious interrupt number. The code was already accounting for it, but that was unclear because it was achieved by mpic_setup_error_int() knowing that the number it was passed was the last used vector, rather than the first free vector. So change the meaning of the argument to the first free vector and update the caller to pass 13, instead of 12, to achieve the same result. Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com> [mpe: Rewrite change log] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/hugetlbpage: Rmove unhelpful HUGEPD_*_SHIFT macrosDavid Gibson2018-07-191-13/+4
| | | | | | | | | | | | | The HUGEPD_*_SHIFT macros are always defined to be PGDIR_SHIFT and PUD_SHIFT, and have to have those values to work properly. They once used to have different values, but that was really only because they were used to mean different things in different contexts. 6fa50483 "powerpc/mm/hugetlb: initialize the pagetable cache correctly for hugetlb" removed that double meaning, but left the now useless constants. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* chrp/nvram.c: add MODULE_LICENSE()Randy Dunlap2018-07-191-0/+3
| | | | | | | | | | | | | | Add MODULE_LICENSE() to the chrp nvram.c driver to fix the build warning message: WARNING: modpost: missing MODULE_LICENSE() in arch/powerpc/platforms/chrp/nvram.o Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/8xx: fix handling of early NULL pointer dereferenceChristophe Leroy2018-07-191-3/+4
| | | | | | | | | | | | | NULL pointers are pointers to user memory space. So user pagetable has to be set in order to avoid random behaviour in case of NULL pointer dereference, otherwise we may encounter random memory access hence Machine Check Exception from TLB Miss handlers. Set user pagetable as early as possible in order to properly catch early kernel NULL pointer dereference. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* Merge branch 'topic/ppc-kvm' into nextMichael Ellerman2018-07-1941-951/+546
|\ | | | | | | | | | | | | | | | | | | | | | | | | Merge in some commits we're sharing with the KVM tree. I manually propagated the change from commit d3d4ffaae439 ("powerpc/powernv/ioda2: Reduce upper limit for DMA window size") into pci-ioda-tce.c. Conflicts: arch/powerpc/include/asm/cputable.h arch/powerpc/platforms/powernv/pci-ioda.c arch/powerpc/platforms/powernv/pci.h
| * powerpc/powernv/ioda: Allocate indirect TCE levels on demandAlexey Kardashevskiy2018-07-166-27/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the moment we allocate the entire TCE table, twice (hardware part and userspace translation cache). This normally works as we normally have contigous memory and the guest will map entire RAM for 64bit DMA. However if we have sparse RAM (one example is a memory device), then we will allocate TCEs which will never be used as the guest only maps actual memory for DMA. If it is a single level TCE table, there is nothing we can really do but if it a multilevel table, we can skip allocating TCEs we know we won't need. This adds ability to allocate only first level, saving memory. This changes iommu_table::free() to avoid allocating of an extra level; iommu_table::set() will do this when needed. This adds @alloc parameter to iommu_table::exchange() to tell the callback if it can allocate an extra level; the flag is set to "false" for the realmode KVM handlers of H_PUT_TCE hcalls and the callback returns H_TOO_HARD. This still requires the entire table to be counted in mm::locked_vm. To be conservative, this only does on-demand allocation when the usespace cache table is requested which is the case of VFIO. The example math for a system replicating a powernv setup with NVLink2 in a guest: 16GB RAM mapped at 0x0 128GB GPU RAM window (16GB of actual RAM) mapped at 0x244000000000 the table to cover that all with 64K pages takes: (((0x244000000000 + 0x2000000000) >> 16)*8)>>20 = 4556MB If we allocate only necessary TCE levels, we will only need: (((0x400000000 + 0x400000000) >> 16)*8)>>20 = 4MB (plus some for indirect levels). Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
| * powerpc/powernv: Rework TCE level allocationAlexey Kardashevskiy2018-07-161-11/+19
| | | | | | | | | | | | | | | | | | | | | | | | This moves actual pages allocation to a separate function which is going to be reused later in on-demand TCE allocation. While we are at it, remove unnecessary level size round up as the caller does this already. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
| * powerpc/powernv: Add indirect levels to it_userspaceAlexey Kardashevskiy2018-07-166-78/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We want to support sparse memory and therefore huge chunks of DMA windows do not need to be mapped. If a DMA window big enough to require 2 or more indirect levels, and a DMA window is used to map all RAM (which is a default case for 64bit window), we can actually save some memory by not allocation TCE for regions which we are not going to map anyway. The hardware tables alreary support indirect levels but we also keep host-physical-to-userspace translation array which is allocated by vmalloc() and is a flat array which might use quite some memory. This converts it_userspace from vmalloc'ed array to a multi level table. As the format becomes platform dependend, this replaces the direct access to it_usespace with a iommu_table_ops::useraddrptr hook which returns a pointer to the userspace copy of a TCE; future extension will return NULL if the level was not allocated. This should not change non-KVM handling of TCE tables and it_userspace will not be allocated for non-KVM tables. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
| * KVM: PPC: Make iommu_table::it_userspace big endianAlexey Kardashevskiy2018-07-164-21/+21
| | | | | | | | | | | | | | | | | | | | | | We are going to reuse multilevel TCE code for the userspace copy of the TCE table and since it is big endian, let's make the copy big endian too. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
| * powerpc/powernv: Move TCE manupulation code to its own fileAlexey Kardashevskiy2018-07-165-320/+340
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now we have allocation code in pci-ioda.c and traversing code in pci.c, let's keep them toghether. However both files are big enough already so let's move this business to a new file. While we at it, move the code which links IOMMU table groups to IOMMU tables as it is not specific to any PNV PHB model. These puts exported symbols from the new file together. This fixes several warnings from checkpatch.pl like this: "WARNING: Prefer 'unsigned int' to bare use of 'unsigned'". As this is almost cut-n-paste, there should be no behavioral change. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
| * powerpc/powernv: Remove useless wrapperAlexey Kardashevskiy2018-07-161-6/+1
| | | | | | | | | | | | | | | | | | This gets rid of a useless wrapper around pnv_pci_ioda2_table_free_pages(). Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
| * powerpc/64s: Remove POWER9 DD1 supportNicholas Piggin2018-07-1632-533/+66
| | | | | | | | | | | | | | | | | | | | | | POWER9 DD1 was never a product. It is no longer supported by upstream firmware, and it is not effectively supported in Linux due to lack of testing. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Michael Ellerman <mpe@ellerman.id.au> [mpe: Remove arch_make_huge_pte() entirely] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/xive: Replace msleep(x) with msleep(OPAL_BUSY_DELAY_MS)Daniel Klamt2018-07-121-12/+12
| | | | | | | | | | | | | | | | | | Replace msleep(x) with with msleep(OPAL_BUSY_DELAY_MS) to document these sleeps are to wait for opal (firmware). Signed-off-by: Daniel Klamt <eleon@ele0n.de> Signed-off-by: Bjoern Noetel <bjoern@br3ak3r.de> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/64s: Report SLB multi-hit rather than parity errorMichael Ellerman2018-07-121-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we take an SLB multi-hit on bare metal, we see both the multi-hit and parity error bits set in DSISR. The user manuals indicates this is expected to always happen on Power8, whereas on Power9 it says a multi-hit will "usually" also cause a parity error. We decide what to do based on the various error tables in mce_power.c, and because we process them in order and only report the first, we currently always report a parity error but not the multi-hit, eg: Severe Machine check interrupt [Recovered] Initiator: CPU Error type: SLB [Parity] Effective address: c000000ffffd4300 Although this is correct, it leaves the user wondering why they got a parity error. It would be clearer instead if we reported the multi-hit because that is more likely to be simply a software bug, whereas a true parity error is possibly an indication of a bad core. We can do that simply by reordering the error tables so that multi-hit appears before parity. That doesn't affect the error recovery at all, because we flush the SLB either way. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc: Remove Power8 DD1 from cputableJoel Stanley2018-07-122-27/+7
| | | | | | | | | | | | | | | | | | This was added to support an early version of Power8 that did not have working doorbells. These machines were not publicly available, and all of the internal users have long since upgraded. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/dts: Use a correct at24 compatible fallback in ac14xxBartosz Golaszewski2018-07-101-10/+10
| | | | | | | | | | | | | | | | Using 'at24' as fallback is now deprecated - use the full 'atmel,<model>' string. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/dts: Use 'atmel' as at24 manufacturer for kmcent2Bartosz Golaszewski2018-07-101-1/+1
| | | | | | | | | | | | | | | | Using compatible strings without the <manufacturer> part for at24 is now deprecated. Use a correct 'atmel,<model>' value. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/dts: Use 'atmel' as at24 manufacturer for pdm360ngBartosz Golaszewski2018-07-101-1/+1
| | | | | | | | | | | | | | | | Using 'at' as the <manufacturer> part of the compatible string is now deprecated. Use a correct string: 'atmel,<model>'. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | cpufreq: powernv: Remove global pstate ramp-down timer in POWER9Shilpasri G Bhat2018-07-091-4/+16
| | | | | | | | | | | | | | | | | | | | | | POWER9 does not support global pstate requests for the chip. So remove the timer logic which slowly ramps down the global pstate in P9 platforms. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> [mpe: Drop NULL check before kfree(policy->driver_data)] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc: Enable kernel XZ compression option on BOOK3S_32Aaro Koskinen2018-07-042-1/+1
| | | | | | | | | | | | | | | | | | Enable kernel XZ compression option on BOOK3S_32. Tested on G4 PowerBook. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> [mpe: Use one select under the PPC symbol guarded by if PPC_BOOK3S] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/msi: Remove VLA usageKees Cook2018-07-041-7/+8
| | | | | | | | | | | | | | | | | | | | | | In the quest to remove all stack VLA usage from the kernel[1], this switches from an unchanging variable to a constant expression to eliminate the VLA generation. [1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/powernv/ioda2: Add 256M IOMMU page size to the default POWER8 caseAlexey Kardashevskiy2018-07-041-1/+1
| | | | | | | | | | | | | | | | | | | | The sketchy bypass uses 256M pages so add this page size as well. This should cause no behavioral change but will be used later. Fixes: 477afd6ea6 "powerpc/ioda: Use ibm,supported-tce-sizes for IOMMU page size mask" Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/kdump: Handle crashkernel memory reservation failureHari Bathini2018-07-041-1/+6
| | | | | | | | | | | | | | | | | | | | | | Memory reservation for crashkernel could fail if there are holes around kdump kernel offset (128M). Fail gracefully in such cases and print an error message. Signed-off-by: Hari Bathini <hbathini@linux.ibm.com> Tested-by: David Gibson <dgibson@redhat.com> Reviewed-by: Dave Young <dyoung@redhat.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/mpc5200: Remove VLA usageKees Cook2018-07-031-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | In the quest to remove all stack VLA usage from the kernel[1], this switches to using a stack size large enough for the saved routine and adds a sanity check making sure the routine doesn't overflow into the 0x600 exception handler. [1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | ocxl: Fix page fault handler in case of fault on dying processFrederic Barrat2018-07-021-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a process exits without doing proper cleanup, there's a window where an opencapi device can try to access the memory of the dying process and may trigger a page fault. That's an expected scenario and the ocxl driver holds a reference on the mm_struct of the process until the opencapi device is notified of the process exiting. However, if mm_users is already at 0, i.e. the address space of the process has already been destroyed, the driver shouldn't try resolving the page fault, as it will fail, but it can also try accessing already freed data. It is fixed by only calling the bottom half of the page fault handler if mm_users is greater than 0 and get a reference on mm_users instead of mm_count. Otherwise, we can safely return a translation fault to the device, as its associated memory context is being removed. The opencapi device will be properly cleaned up shortly after when closing the file descriptors. Fixes: 5ef3166e8a32 ("ocxl: Driver code for 'generic' opencapi devices") Cc: stable@vger.kernel.org # v4.16+ Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-By: Alastair D'Silva <alastair@d-silva.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | selftests/powerpc: Fix typosBreno Leitao2018-07-021-2/+2
| | | | | | | | | | | | | | | | | | Fix two typos in the file header. Replacing the word 'priviledged' by 'privileged' and 'exuecuted' by 'executed'. Signed-off-by: Breno Leitao <leitao@debian.org> Signed-off-by: Gustavo Romero <gromero@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | selftests/powerpc: Fix strncpy usageBreno Leitao2018-07-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | There is a buffer overflow in dscr_inherit_test.c test. In main(), strncpy()'s third argument is the length of the source, not the size of the destination buffer, which makes strncpy() behaves like strcpy(), causing a buffer overflow if argv[0] is bigger than LEN_MAX (100). This patch maps 'prog' to the argv[0] memory region, removing the static allocation and the LEN_MAX size restriction. Signed-off-by: Breno Leitao <leitao@debian.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | cxl: Remove abandonned capi support for the Mellanox CX4, final cleanupFrederic Barrat2018-07-024-87/+7
| | | | | | | | | | | | | | | | | | | | Remove a few XSL/CX4 oddities which are no longer needed. A simple revert of the initial commits was not possible (or not worth it) due to the history of the code. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | Revert "cxl: Allow a default context to be associated with an external pci_dev"Frederic Barrat2018-07-027-97/+28
| | | | | | | | | | | | | | | | | | | | Remove abandonned capi support for the Mellanox CX4. This reverts commit a19bd79e31769626d288cc016e21a31b6f47bf6f. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | Revert "cxl: Add cxl_slot_is_supported API"Frederic Barrat2018-07-022-52/+0
| | | | | | | | | | | | | | | | | | | | Remove abandonned capi support for the Mellanox CX4. This reverts commit 4e56f858bdde5cbfb70f61baddfaa56a8ed851bf. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | Revert "powerpc/powernv: Add support for the cxl kernel api on the real phb"Alastair D'Silva2018-07-024-152/+1
| | | | | | | | | | | | | | | | | | | | Remove abandonned capi support for the Mellanox CX4. This reverts commit 4361b03430d685610e5feea3ec7846e8b9ae795f. Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | Revert "cxl: Add support for using the kernel API with a real PHB"Alastair D'Silva2018-07-022-17/+2
| | | | | | | | | | | | | | | | | | | | Remove abandonned capi support for the Mellanox CX4. This reverts commit 317f5ef1b363417b6f1e93b90dfd2ffd6be6e867. Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | Revert "cxl: Add cxl_check_and_switch_mode() API to switch bi-modal cards"Alastair D'Silva2018-07-023-251/+18
| | | | | | | | | | | | | | | | | | | | Remove abandonned capi support for the Mellanox CX4. This reverts commit b0b5e5918ad1babfd1d43d98c7281926a7b57b9f. Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | Revert "cxl: Add kernel APIs to get & set the max irqs per context"Alastair D'Silva2018-07-021-27/+0
| | | | | | | | | | | | | | | | | | | | Remove abandonned capi support for the Mellanox CX4. This reverts commit 79384e4b71240abf50c375eea56060b0d79c242a. Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | Revert "cxl: Add preliminary workaround for CX4 interrupt limitation"Alastair D'Silva2018-07-026-64/+0
| | | | | | | | | | | | | | | | | | | | Remove abandonned capi support for the Mellanox CX4. This reverts commit cbce0917e2e47d4bf5aa3b5fd6b1247f33e1a126. Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | Revert "cxl: Add support for interrupts on the Mellanox CX4"Alastair D'Silva2018-07-028-202/+0
| | | | | | | | | | | | | | | | | | | | Remove abandonned capi support for the Mellanox CX4. This reverts commit a2f67d5ee8d950caaa7a6144cf0bfb256500b73e. Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | Revert "cxl: Add kernel API to allow a context to operate with relocate ↵Alastair D'Silva2018-07-025-32/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | disabled" Remove abandonned capi support for the Mellanox CX4. The symbol 'cxl_set_translation_mode' is never called, so ctx->real_mode is always false. This reverts commit 7a0d85d313c2066712e530e668bc02bb741a685c. Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/powernv/memtrace: Remove memtrace mmap()Michael Neuling2018-07-021-29/+0
| | | | | | | | | | | | | | debugfs doesn't support mmap(), so this code is never used. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/powernv/ioda2: Reduce upper limit for DMA window sizeAlexey Kardashevskiy2018-07-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use PHB in mode1 which uses bit 59 to select a correct DMA window. However there is mode2 which uses bits 59:55 and allows up to 32 DMA windows per a PE. Even though documentation does not clearly specify that, it seems that the actual hardware does not support bits 59:55 even in mode1, in other words we can create a window as big as 1<<58 but DMA simply won't work. This reduces the upper limit from 59 to 55 bits to let the userspace know about the hardware limits. Fixes: 7aafac11e3 "powerpc/powernv/ioda2: Gracefully fail if too many TCE levels requested" Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc: Document issues with TM on POWER9Michael Neuling2018-07-021-0/+44
| | | | | | | | | | | | Signed-off-by: Michael Neuling <mikey@neuling.org> Acked-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc: Document issues with the DAWR on POWER9Michael Neuling2018-07-021-0/+58
| | | | | | | | | | | | Signed-off-by: Michael Neuling <mikey@neuling.org> Acked-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/pci: Remove legacy debug codeBreno Leitao2018-07-021-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 59f47eff03a0 ("powerpc/pci: Use of_irq_parse_and_map_pci() helper") removed the 'oirq' variable, but kept memsetting it when the DEBUG macro is defined. When setting DEBUG macro for debugging purpose, the kernel fails to build since 'oirq' is not defined anymore. This patch simply remove the debug block, since it does not seem to sense now. Fixes: 59f47eff03a08c ("powerpc/pci: Use of_irq_parse_and_map_pci() helper") Signed-off-by: Breno Leitao <leitao@debian.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | scripts: Add ppc64le support for checkstack.plBreno Leitao2018-07-021-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 64-bit ELF v2 ABI specification for POWER describes, on section "General Stack Frame Requirements", that the stack should use the following instructions when compiled with backchain: mflr r0 std r0, 16(r1) stdu r1, -XX(r1) Where XX is the frame size for that function, and this is the value checkstack.pl will find the stack size for each function. This patch also simplifies the entire Powerpc section, since just two type of instructions are used, 'stdu' for 64 bits and 'stwu' for 32 bits platform. Signed-off-by: Breno Leitao <leitao@debian.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc: wii: Remove outdated comment about memory fixupsJonathan Neuschäfer2018-07-021-10/+0
| | | | | | | | | | | | | | | | | | The workaround has been removed. What stays is just code to find the memory hole so the BATs can be configured properly in the function below. Fixes: 57deb8fea01f ("powerpc/wii: Don't rely on the reserved memory hack") Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc: xmon: use ktime_get_coarse_boottime64Arnd Bergmann2018-07-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | get_monotonic_boottime() is deprecated, and may not be safe to call in every context, as it has to read a hardware clocksource. This changes xmon to print the time using ktime_get_coarse_boottime64() instead, which avoids the old timespec type and the HW access. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/eeh: Avoid misleading message "EEH: no capable adapters found"Mauro S. M. Rodrigues2018-07-023-9/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to recent refactoring in EEH in: commit b9fde58db7e5 ("powerpc/powernv: Rework EEH initialization on powernv") a misleading message was seen in the kernel message buffer: [ 0.108431] EEH: PowerNV platform initialized [ 0.589979] EEH: No capable adapters found This happened due to the removal of the initialization delay for powernv platform. Even though the EEH infrastructure for the devices is eventually initialized and still works just fine the eeh device probe step is postponed in order to assure the PEs are created. Later pnv_eeh_post_init does the probe devices job but at that point the message was already shown right after eeh_init flow. This patch introduces a new flag EEH_POSTPONED_PROBE to represent that temporary state and avoid the message mentioned above and showing the follow one instead: [ 0.107724] EEH: PowerNV platform initialized [ 4.844825] EEH: PCI Enhanced I/O Error Handling Enabled Signed-off-by: Mauro S. M. Rodrigues <maurosr@linux.vnet.ibm.com> Acked-by: Russell Currey <ruscur@russell.cc> Tested-by:Venkat Rao B <vrbagal1@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | ocxl: Change return type for fault handlerSouptick Joarder2018-07-022-14/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use new return type vm_fault_t for fault handler. For now, this is just documenting that the function returns a VM_FAULT value rather than an errno. Once all instances are converted, vm_fault_t will become a distinct type. Ref-> commit 1c8f422059ae ("mm: change return type to vm_fault_t") There is an existing bug when vm_insert_pfn() can return ENOMEM which was ignored and VM_FAULT_NOPAGE returned as default. The new inline vmf_insert_pfn() has removed this inefficiency by returning correct vm_fault_ type. Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | Linux 4.18-rc3v4.18-rc3Linus Torvalds2018-07-011-1/+1
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* | Merge tag 'for-4.18-rc2-tag' of ↵Linus Torvalds2018-07-012-5/+15
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux Pull btrfs fixes from David Sterba: "We have a few regression fixes for qgroup rescan status tracking and the vm_fault_t conversion that mixed up the error values" * tag 'for-4.18-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux: Btrfs: fix mount failure when qgroup rescan is in progress Btrfs: fix regression in btrfs_page_mkwrite() from vm_fault_t conversion btrfs: quota: Set rescan progress to (u64)-1 if we hit last leaf
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