summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* ata: add/use ata_taskfile::{error|status} fieldsSergey Shtylyov2022-02-2021-84/+90
| | | | | | | | | | Add the explicit error and status register fields to 'struct ata_taskfile' using the anonymous *union*s ('struct ide_taskfile' had that for ages!) and update the libata taskfile code accordingly. There should be no object code changes resulting from that... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: Kconfig: fix sata gemini compile test conditionDamien Le Moal2022-02-201-1/+1
| | | | | | | | | | When compile testing the sata gemini driver, CONFIG_OF is required to avoid the warning: drivers/ata/sata_gemini.c:421:34: error: ‘gemini_sata_of_match’ defined but not used [-Werror=unused-const-variable=] Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: libata-scsi: use *switch* statements to check SCSI command codesSergey Shtylyov2022-02-201-7/+19
| | | | | | | | Replace strings of the *if* statements checking the SCSI command code with the *switch* statements that fit better here... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: libata-sff: refactor ata_sff_altstatus()Sergey Shtylyov2022-02-201-26/+33
| | | | | | | | | | | | | | | | | | | The driver's calls to ata_sff_altstatus() are mostly surrounded by some clumsy checks. Refactor ata_sff_altstatus() to include the repetitive checks and return a 'bool' result indicating if the alternate status register exists or not. While at it, further update the 'kernel-doc' comment -- the alternate status register has never been a part of the taskfile, despite what Jeff and co. think! :-) In ata_sff_lost_interrupt(), wrap the ata_sff_altstatus() call in a WARN_ON_ONCE() check to issue a warning if the device control register does not exist. And while at it, fix the strange argument indentation in the ata_port_warn() call following the call to ata_sff_altstatus(). Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: libata-sff: refactor ata_sff_set_devctl()Sergey Shtylyov2022-02-191-15/+15
| | | | | | | | | | | | | | | | | Commit 41dec29bcb05 ("libata: introduce sff_set_devctl() method") left some clumsy checks surrounding calls to ata_sff_set_devctl() which Jeff Garzik suggested to factor out... and I never followed up. :-( At last, refactor ata_sff_set_devctl() to include the repetitive checks and return a 'bool' result indicating if the device control register exists or not. While at it, further update the 'kernel-doc' comment -- the device control register has never been a part of the taskfile, despite what Jeff and co. think! :-) Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: libata-sff: make ata_resources_present() return 'bool'Sergey Shtylyov2022-02-191-4/+4
| | | | | | | | | | | ata_resources_present() returns 1 if the primary/secondary channel's PCI resources are present, 0 if not -- the 'bool' type fits somewhat better here than 'int'... Use the *= operator, while at it... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_hpt3x2n: disable fast interrupts in prereset() methodSergey Shtylyov2022-02-191-13/+10
| | | | | | | | | The PIO/DMA mode setting function is hardly a good place for disabling the fast interrupts on a channel -- let's move that code to the driver's prereset() method instead. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_hpt37x: disable fast interrupts in prereset() methodSergey Shtylyov2022-02-191-26/+22
| | | | | | | | | The PIO/DMA mode setting functions are hardly a good place for disabling the fast interrupts on a channel -- let's move that code to the driver's prereset() method instead. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_hpt366: disable fast interrupts in prereset() methodSergey Shtylyov2022-02-191-6/+7
| | | | | | | | | The PIO/DMA mode setting function is hardly a good place for disabling the fast interrupts on a channel -- let's move that code to the driver's prereset() method instead. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_mpc52xx: use GFP_KERNELJulia Lawall2022-02-191-1/+1
| | | | | | | | | | | Platform_driver probe functions aren't called with locks held and thus don't need GFP_ATOMIC. Use GFP_KERNEL instead. Problem found with Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: sata_rcar: drop unused #define'sSergey Shtylyov2022-02-191-4/+0
| | | | | | | | | This driver has never used the SH-Navi2G/ATAPI-ATA compatible taskfile registers (the driver uses the taskfile registers in another location anyway), so drop their #define's... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_hpt366: check channel enable bitsSergey Shtylyov2022-02-191-2/+40
| | | | | | | | | | HighPoint HPT36x chips did turn out to have the channel enable bits -- however, badly implemented. Make use of them, despite that is probably only going to burden the driver's code -- assuming both channels are always enabled by the HighPoint BIOS anyway... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: sata_rcar: make sata_rcar_ata_devchk() return 'bool'Sergey Shtylyov2022-02-191-4/+3
| | | | | | | | sata_rcar_ata_devchk() returns 1 if a device is present, 0 if not -- the 'bool' type clearly fits better here than 'unsigned int'... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_samsung_cf: make pata_s3c_devchk() return 'bool'Sergey Shtylyov2022-02-191-4/+3
| | | | | | | | pata_s3c_devchk() returns 1 if a device is present, 0 if not -- the 'bool' type clearly fits better here than 'unsigned int'... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: libata-sff: make ata_devchk() return 'bool'Sergey Shtylyov2022-02-191-3/+6
| | | | | | | | ata_devchk() returns 1 if a device is present, 0 if not -- the 'bool' type clearly fits better here than 'unsigned int'... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_hpt3x2n: drop unused 'struct hpt_chip'Sergey Shtylyov2022-02-191-5/+0
| | | | | | | The driver has never used 'struct hpt_chip' -- drop its declaration. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_hpt3x2n: drop unused HPT_PCI_FASTSergey Shtylyov2022-02-191-1/+0
| | | | | | | The driver has never used HPT_PCI_FAST -- drop it. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_artop: use *switch* in atp8xx_fixup()Sergey Shtylyov2022-02-191-5/+9
| | | | | | | | This driver uses a string of the *if* statements in atp8xx_fixup() where a *switch* statement would fit better... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_artop: use *switch* in artop_init_one()Sergey Shtylyov2022-02-191-8/+11
| | | | | | | | | | This driver uses a string of the *if* statements in artop_init_one() where the *switch* statement would fit better. While fixing this, refactor the 6280 code to e.g. avoid a compound statement inside the *case* section... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* pata_hpt3x2n: fix writing to wrong register in hpt3x2n_bmdma_stop()Sergey Shtylyov2022-02-191-2/+2
| | | | | | | | | | | | | | The driver's bmdma_stop() method writes to the wrong PCI config register (0x52 intead of 0x54) when trying to clear the state machine on secondary channel -- "luckily", the write falls on a read-only part of the primary channel MISC. control 3 register, so no collateral damage is done... Alan Cox fixed the HPT37x driver in commit 6929da4427b4 ("[PATCH] hpt37x: Two important bug fixes") but forgot to check the HPT3x2N driver which has the same bug. :-/ Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* pata_hpt3x2n: check channel enable bitsSergey Shtylyov2022-02-191-1/+8
| | | | | | | | | | | | The driver's prereset() method still doesn't check the channel enable bits. The bug was there for the entire time the driver has existed. :-/ Alan Cox fixed the HPT37x driver in commit b5bf24b94c65 ("[PATCH] hpt37x: Check the enablebits") but forgot to check the HPT3x2N driver which has the same bug. :-/ Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: libata: make ata_host_suspend() *void*Sergey Shtylyov2022-02-1916-53/+39
| | | | | | | | | | | | | ata_host_suspend() always returns 0, so the result checks in many drivers look pointless. Let's make this function return *void* instead of *int*. Found by Linux Verification Center (linuxtesting.org) with the SVACE static analysis tool. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: libata: ata_{sff|std}_prereset() always return 0Sergey Shtylyov2022-02-032-5/+4
| | | | | | | | | | | | | ata_std_prereset() always returns 0, hence the check in ata_sff_prereset() is pointless and thus it also can return only 0 (however, we cannot change the prototypes of ata_{sff|std}_prereset() as they implement the driver's prereset() method). Found by Linux Verification Center (linuxtesting.org) with the SVACE static analysis tool. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: ahci: Skip 200 ms debounce delay for Marvell 88SE9235Paul Menzel2022-02-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 200 ms delay before debouncing the PHY in `sata_link_resume()` is not needed for the Marvell 88SE9235. $ lspci -nn -s 0021:0e:00.0 0021:0e:00.0 SATA controller [0106]: Marvell Technology Group Ltd. 88SE9235 PCIe 2.0 x2 4-port SATA 6 Gb/s Controller [1b4b:9235] (rev 11) So, remove it using the board_ahci_no_debounce_delay board definition. Tested on IBM S822LC with current Linux 5.17-rc1: Currently, without this patch (with 200 ms delay), device probe for ata1 takes 485 ms: [ 3.358158] ata1: SATA max UDMA/133 abar m2048@0x3fe881000000 port 0x3fe881000100 irq 39 [ 3.358175] ata2: SATA max UDMA/133 abar m2048@0x3fe881000000 port 0x3fe881000180 irq 39 [ 3.358191] ata3: SATA max UDMA/133 abar m2048@0x3fe881000000 port 0x3fe881000200 irq 39 [ 3.358207] ata4: SATA max UDMA/133 abar m2048@0x3fe881000000 port 0x3fe881000280 irq 39 […] [ 3.677542] ata3: SATA link down (SStatus 0 SControl 300) [ 3.677719] ata4: SATA link down (SStatus 0 SControl 300) [ 3.839242] ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300) [ 3.839828] ata2.00: ATA-10: ST1000NX0313 00LY266 00LY265IBM, BE33, max UDMA/133 [ 3.840029] ata2.00: 1953525168 sectors, multi 0: LBA48 NCQ (depth 32), AA [ 3.841796] ata2.00: configured for UDMA/133 [ 3.843231] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) [ 3.844083] ata1.00: ATA-10: ST1000NX0313 00LY266 00LY265IBM, BE33, max UDMA/133 [ 3.844313] ata1.00: 1953525168 sectors, multi 0: LBA48 NCQ (depth 32), AA [ 3.846043] ata1.00: configured for UDMA/133 With this patch (no delay) device probe for ata1 takes 273 ms: [ 3.624259] ata1: SATA max UDMA/133 abar m2048@0x3fe881000000 port 0x3f e881000100 irq 39 [ 3.624436] ata2: SATA max UDMA/133 abar m2048@0x3fe881000000 port 0x3f e881000180 irq 39 [ 3.624452] ata3: SATA max UDMA/133 abar m2048@0x3fe881000000 port 0x3f e881000200 irq 39 [ 3.624468] ata4: SATA max UDMA/133 abar m2048@0x3fe881000000 port 0x3f e881000280 irq 39 […] [ 3.731966] ata3: SATA link down (SStatus 0 SControl 300) [ 3.732069] ata4: SATA link down (SStatus 0 SControl 300) [ 3.897448] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) [ 3.897678] ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300) [ 3.898140] ata1.00: ATA-10: ST1000NX0313 00LY266 00LY265IBM, BE33, max UDMA/133 [ 3.898175] ata2.00: ATA-10: ST1000NX0313 00LY266 00LY265IBM, BE33, max UDMA/133 [ 3.898287] ata1.00: 1953525168 sectors, multi 0: LBA48 NCQ (depth 32), AA [ 3.898349] ata2.00: 1953525168 sectors, multi 0: LBA48 NCQ (depth 32), AA [ 3.900070] ata1.00: configured for UDMA/133 [ 3.900166] ata2.00: configured for UDMA/133 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: libata-acpi: kill ata_acpi_on_suspend()Sergey Shtylyov2022-02-023-29/+1
| | | | | | | | | | | | | Since the commit c05e6ff035c1b25d17364a685432 ("libata-acpi: implement and use ata_acpi_init_gtm()") ata_acpi_on_suspend() just returns 0, so its call from ata_eh_handle_port_suspend() doesn't make sense anymore. Remove the function completely, at last... Found by Linux Verification Center (linuxtesting.org) with the SVACE static analysis tool. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: libata-scsi: Simplify scsi_XX_lba_len()Damien Le Moal2022-01-311-34/+6
| | | | | | | | | | In scsi_10_lba_len() and scsi_16_lba_len() functions, use get_unaligned_bexx() to access a cdb LBA and length fields instead of hardcoding the byte retrieval. With these simplification, the functions can also be declared inline. Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Reviewed-by: Hannes Reinecke <hare@suse.de>
* ata: libata-scsi: Simplify ata_scsi_mode_select_xlat()Damien Le Moal2022-01-311-3/+3
| | | | | | | | Use get_unaligned_be16() instead of using hardcoded accesses to 16-bits big endian cdb fields. Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Reviewed-by: Hannes Reinecke <hare@suse.de>
* ata: libata-scsi: Cleanup ata_get_xlat_func()Damien Le Moal2022-01-311-1/+0
| | | | | | | | Remove the unnecessary "break" after the return statement in the MODE_SELECT/MODE_SELECT_10 case. Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Reviewed-by: Hannes Reinecke <hare@suse.de>
* ata: pata_pdc202xx_old: make static read-only array pio_timing constColin Ian King2022-01-311-1/+1
| | | | | | | | | The static array pio_timing is read-only so it make sense to make it const. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_atiixp: make static read-only arrays constColin Ian King2022-01-311-2/+2
| | | | | | | | | The static arrays pio_timings and mwdma_timings are read-only so it make sense to make them const. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* ata: pata_platform: Make use of platform_get_mem_or_io()Lad Prabhakar2022-01-311-12/+6
| | | | | | | | | | | Make use of platform_get_mem_or_io() to simplify the code. While at it, drop use of unlikely() from pata_platform_probe() as it isn't a hotpath. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
* Linux 5.17-rc2v5.17-rc2Linus Torvalds2022-01-301-1/+1
|
* Merge tag 'irq_urgent_for_v5.17_rc2_p2' of ↵Linus Torvalds2022-01-306-36/+121
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Borislav Petkov: - Drop an unused private data field in the AIC driver - Various fixes to the realtek-rtl driver - Make the GICv3 ITS driver compile again in !SMP configurations - Force reset of the GICv3 ITSs at probe time to avoid issues during kexec - Yet another kfree/bitmap_free conversion - Various DT updates (Renesas, SiFive) * tag 'irq_urgent_for_v5.17_rc2_p2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: dt-bindings: interrupt-controller: sifive,plic: Group interrupt tuples dt-bindings: interrupt-controller: sifive,plic: Fix number of interrupts dt-bindings: irqchip: renesas-irqc: Add R-Car V3U support irqchip/gic-v3-its: Reset each ITS's BASERn register before probe irqchip/gic-v3-its: Fix build for !SMP irqchip/loongson-pch-ms: Use bitmap_free() to free bitmap irqchip/realtek-rtl: Service all pending interrupts irqchip/realtek-rtl: Fix off-by-one in routing irqchip/realtek-rtl: Map control data to virq irqchip/apple-aic: Drop unused ipi_hwirq field
| * Merge tag 'irqchip-fixes-5.17-1' of ↵Thomas Gleixner2022-01-296-36/+121
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent Pull irqchip fixes from Marc Zyngier: - Drop an unused private data field in the AIC driver - Various fixes to the realtek-rtl driver - Make the GICv3 ITS driver compile again in !SMP configurations - Force reset of the GICv3 ITSs at probe time to avoid issues during kexec - Yet another kfree/bitmap_free conversion - Various DT updates (Renesas, SiFive) Link: https://lore.kernel.org/r/20220128174217.517041-1-maz@kernel.org
| | * dt-bindings: interrupt-controller: sifive,plic: Group interrupt tuplesGeert Uytterhoeven2022-01-281-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To improve human readability and enable automatic validation, the tuples in "interrupts-extended" properties should be grouped using angle brackets. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/211705e74a2ce77de43d036c5dea032484119bf7.1643360419.git.geert@linux-m68k.org
| | * dt-bindings: interrupt-controller: sifive,plic: Fix number of interruptsGeert Uytterhoeven2022-01-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of interrupts lacks an upper bound, thus assuming one, causing properly grouped "interrupts-extended" properties to be flagged as an error by "make dtbs_check". Fix this by adding the missing "maxItems", using the architectural maximum of 15872 interrupts. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/f73a0aead89e1426b146c4c64f797aa035868bf0.1643360419.git.geert@linux-m68k.org
| | * dt-bindings: irqchip: renesas-irqc: Add R-Car V3U supportGeert Uytterhoeven2022-01-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document support for the Interrupt Controller for External Devices (INT-EC) in the Renesas R-Car V3U (r8a779a0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/85b246cc0792663c72c1bb12a8576bd23d2299d3.1643200256.git.geert+renesas@glider.be
| | * irqchip/gic-v3-its: Reset each ITS's BASERn register before probeMarc Zyngier2022-01-261-21/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent bug report outlined that the way GICv4.1 is handled across kexec is pretty bad. We can end-up in a situation where ITSs share memory (this is the case when SVPET==1) and reprogram the base registers, creating a situation where ITSs that are part of a given affinity group see different pointers. Which is illegal. Boo. In order to restore some sanity, reset the BASERn registers to 0 *before* probing any ITS. Although this isn't optimised at all, this is only a once-per-boot cost, which shouldn't show up on anyone's radar. Cc: Jay Chen <jkchen@linux.alibaba.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Link: https://lore.kernel.org/r/20211216190315.GA14220@lpieralisi Link: https://lore.kernel.org/r/20220124133809.1291195-1-maz@kernel.org
| | * irqchip/gic-v3-its: Fix build for !SMPArd Biesheuvel2022-01-221-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 835f442fdbce ("irqchip/gic-v3-its: Limit memreserve cpuhp state lifetime") added a reference to cpus_booted_once_mask, which does not exist on !SMP builds, breaking the build for such configurations. Given the intent of the check, short circuit it to always pass. Cc: Valentin Schneider <valentin.schneider@arm.com> Fixes: 835f442fdbce ("irqchip/gic-v3-its: Limit memreserve cpuhp state lifetime") Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220122151614.133766-1-ardb@kernel.org
| | * irqchip/loongson-pch-ms: Use bitmap_free() to free bitmapChristophe JAILLET2022-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | kfree() and bitmap_free() are the same. But using the latter is more consistent when freeing memory allocated with bitmap_zalloc(). Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/0b982ab54844803049c217b2899baa59602faacd.1640529916.git.christophe.jaillet@wanadoo.fr
| | * irqchip/realtek-rtl: Service all pending interruptsSander Vanheule2022-01-171-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of only servicing the lowest pending interrupt line, make sure all pending SoC interrupts are serviced before exiting the chained handler. This adds a small overhead if only one interrupt is pending, but should prevent rapid re-triggering of the handler. Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/5082ad3cb8b4eedf55075561b93eff6570299fe1.1641739718.git.sander@svanheule.net
| | * irqchip/realtek-rtl: Fix off-by-one in routingSander Vanheule2022-01-171-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is an offset between routing values (1..6) and the connected MIPS CPU interrupts (2..7), but no distinction was made between these two values. This issue was previously hidden during testing, because an interrupt mapping was used where for each required interrupt another (unused) routing was configured, with an offset of +1. Offset the CPU IRQ numbers by -1 to retrieve the correct routing value. Fixes: 9f3a0f34b84a ("irqchip: Add support for Realtek RTL838x/RTL839x interrupt controller") Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/177b920aa8d8610615692d0e657e509f363c85ca.1641739718.git.sander@svanheule.net
| | * irqchip/realtek-rtl: Map control data to virqSander Vanheule2022-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver assigned the irqchip and irq handler to the hardware irq, instead of the virq. This is incorrect, and only worked because these irq numbers happened to be the same on the devices used for testing the original driver. Fixes: 9f3a0f34b84a ("irqchip: Add support for Realtek RTL838x/RTL839x interrupt controller") Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/4b4936606480265db47df152f00bc2ed46340599.1641739718.git.sander@svanheule.net
| | * irqchip/apple-aic: Drop unused ipi_hwirq fieldMarc Zyngier2022-01-171-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | This field was never used, remove it. Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Hector Martin <marcan@marcan.st> Link: https://lore.kernel.org/r/20220108140118.3378937-1-maz@kernel.org
* | | Merge tag 'perf_urgent_for_v5.17_rc2_p2' of ↵Linus Torvalds2022-01-301-4/+19
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull perf fixes from Borislav Petkov: - Prevent accesses to the per-CPU cgroup context list from another CPU except the one it belongs to, to avoid list corruption - Make sure parent events are always woken up to avoid indefinite hangs in the traced workload * tag 'perf_urgent_for_v5.17_rc2_p2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/core: Fix cgroup event list management perf: Always wake the parent event
| * | | perf/core: Fix cgroup event list managementNamhyung Kim2022-01-261-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The active cgroup events are managed in the per-cpu cgrp_cpuctx_list. This list is only accessed from current cpu and not protected by any locks. But from the commit ef54c1a476ae ("perf: Rework perf_event_exit_event()"), it's possible to access (actually modify) the list from another cpu. In the perf_remove_from_context(), it can remove an event from the context without an IPI when the context is not active. This is not safe with cgroup events which can have some active events in the context even if ctx->is_active is 0 at the moment. The target cpu might be in the middle of list iteration at the same time. If the event is enabled when it's about to be closed, it might call perf_cgroup_event_disable() and list_del() with the cgrp_cpuctx_list on a different cpu. This resulted in a crash due to an invalid list pointer access during the cgroup list traversal on the cpu which the event belongs to. Let's fallback to IPI to access the cgrp_cpuctx_list from that cpu. Similarly, perf_install_in_context() should use IPI for the cgroup events too. Fixes: ef54c1a476ae ("perf: Rework perf_event_exit_event()") Signed-off-by: Namhyung Kim <namhyung@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20220124195808.2252071-1-namhyung@kernel.org
| * | | perf: Always wake the parent eventJames Clark2022-01-261-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using per-process mode and event inheritance is set to true, forked processes will create a new perf events via inherit_event() -> perf_event_alloc(). But these events will not have ring buffers assigned to them. Any call to wakeup will be dropped if it's called on an event with no ring buffer assigned because that's the object that holds the wakeup list. If the child event is disabled due to a call to perf_aux_output_begin() or perf_aux_output_end(), the wakeup is dropped leaving userspace hanging forever on the poll. Normally the event is explicitly re-enabled by userspace after it wakes up to read the aux data, but in this case it does not get woken up so the event remains disabled. This can be reproduced when using Arm SPE and 'stress' which forks once before running the workload. By looking at the list of aux buffers read, it's apparent that they stop after the fork: perf record -e arm_spe// -vvv -- stress -c 1 With this patch applied they continue to be printed. This behaviour doesn't happen when using systemwide or per-cpu mode. Reported-by: Ruben Ayrapetyan <Ruben.Ayrapetyan@arm.com> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20211206113840.130802-2-james.clark@arm.com
* | | | Merge tag 'sched_urgent_for_v5.17_rc2_p2' of ↵Linus Torvalds2022-01-301-4/+5
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler fix from Borislav Petkov: "Make sure the membarrier-rseq fence commands are part of the reported set when querying membarrier(2) commands through MEMBARRIER_CMD_QUERY" * tag 'sched_urgent_for_v5.17_rc2_p2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched/membarrier: Fix membarrier-rseq fence command missing from query bitmask
| * | | | sched/membarrier: Fix membarrier-rseq fence command missing from query bitmaskMathieu Desnoyers2022-01-251-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The membarrier command MEMBARRIER_CMD_QUERY allows querying the available membarrier commands. When the membarrier-rseq fence commands were added, a new MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ_BITMASK was introduced with the intent to expose them with the MEMBARRIER_CMD_QUERY command, the but it was never added to MEMBARRIER_CMD_BITMASK. The membarrier-rseq fence commands are therefore not wired up with the query command. Rename MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ_BITMASK to MEMBARRIER_PRIVATE_EXPEDITED_RSEQ_BITMASK (the bitmask is not a command per-se), and change the erroneous MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_RSEQ_BITMASK (which does not actually exist) to MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_RSEQ. Wire up MEMBARRIER_PRIVATE_EXPEDITED_RSEQ_BITMASK in MEMBARRIER_CMD_BITMASK. Fixing this allows discovering availability of the membarrier-rseq fence feature. Fixes: 2a36ab717e8f ("rseq/membarrier: Add MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ") Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: <stable@vger.kernel.org> # 5.10+ Link: https://lkml.kernel.org/r/20220117203010.30129-1-mathieu.desnoyers@efficios.com
* | | | | Merge tag 'x86_urgent_for_v5.17_rc2' of ↵Linus Torvalds2022-01-302-1/+2
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Borislav Petkov: - Add another Intel CPU model to the list of CPUs supporting the processor inventory unique number - Allow writing to MCE thresholding sysfs files again - a previous change had accidentally disabled it and no one noticed. Goes to show how much is this stuff used * tag 'x86_urgent_for_v5.17_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/cpu: Add Xeon Icelake-D to list of CPUs that support PPIN x86/MCE/AMD: Allow thresholding interface updates after init
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-19 11:46:34 +0000