linux-stable.git - Linux kernel stable tree

	Commit message (Collapse)	Author	Age	Files	Lines
*	dt-bindings: PCI: update references to Designware schema	Mauro Carvalho Chehab	2021-07-19	1	-1/+1
\| \| \| \| \| \| \| \| \|	Now that its contents were converted to a DT schema, replace the references for the old file on existing properties. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/dfff4d94631546c53450d1baeddc694dd26b5c36.1626608375.git.mchehab+huawei@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
*	bindings: PCI: artpec: Add support for the ARTPEC-7 SoC	Niklas Cassel	2017-12-21	1	-0/+2
\| \| \| \| \| \| \| \| \| \| \|	Add support for the ARTPEC-7 SoC in the artpec6 driver. The ARTPEC-6 SoC and the ARTPEC-7 SoC are very similar. Unfortunately, some fields in the PCIECFG and PCIESTAT register have changed. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Rob Herring <robh@kernel.org>
*	bindings: PCI: artpec: Add support for endpoint mode	Niklas Cassel	2017-12-21	1	-1/+2
\| \| \| \| \| \| \| \| \|	The PCIe controller integrated in ARTPEC-6 SoCs is capable of operating in endpoint mode. Add endpoint mode support to the artpec6 driver. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Rob Herring <robh@kernel.org>
*	PCI: Fix typos and whitespace errors	Bjorn Helgaas	2017-09-01	1	-1/+1
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Fix various typos and whitespace errors: s/Synopsis/Synopsys/ s/Designware/DesignWare/ s/Keystine/Keystone/ s/gpio/GPIO/ s/pcie/PCIe/ s/phy/PHY/ s/confgiruation/configuration/ No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
*	bindings: PCI: artpec: correct pci binding example	Niklas Cassel	2016-08-31	1	-3/+4
\| \| \| \| \| \| \| \| \| \| \|	- Increase config size. When using a PCIe switch, the previous config size only had room for one device. - Add bus range. Inherited optional property. - Map downstream I/O to PCI address 0. We can map it to any address, but let's be consistent with other drivers. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Rob Herring <robh@kernel.org>
*	PCI: Add DT binding for Axis ARTPEC-6 PCIe controller	Niklas Cassel	2016-06-11	1	-0/+46
	Add the Device Tree binding documentation that allows to describe the PCIe controller found in the Axis ARTPEC-6 SoC. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org>