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| * | scsi: dt-bindings: ufs: Remove custom property "<name>-fixed-regulator"Stanley Chu2019-04-031-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Custom device tree property "<name>-fixed-regulator" can be removed because, 1) It is not used anywhere in tree. 2) All handlings for "<name>-fixed-regulator" have been removed in UFS driver. 3) There is no issue if an existed regulator defined "<name>-fixed-regulator" property in device tree. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * | scsi: dt-bindings: ufs-cdns: Update Cadence UFS compatibility listJan Kotas2019-04-031-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new compatible string description for CDNS UFS HCD + M31 16nm PHY. Signed-off-by: Jan Kotas <jank@cadence.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * | scsi: dt-bindings: ufs: Add document for ufs-mediatekStanley Chu2019-03-191-0/+40
| |/ | | | | | | | | | | | | | | Add UFS and UFS PHY node document for Mediatek SoC chips. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* | dt-bindings: phy: qcom-ufs: Add resets propertyEvan Green2019-04-171-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a resets property to the PHY that represents the PHY reset register in the UFS controller itself. This better describes the complete specification of the PHY, and allows the PHY to perform its initialization in a single function, rather than relying on back-channel sequencing of initialization through the PHY framework. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | dt-bindings: ufs: Add #reset-cells for Qualcomm controllersEvan Green2019-04-171-0/+3
|/ | | | | | | | | | Enable Qualcomm UFS controllers to expose the PHY reset via a reset controller. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* scsi: dt-bindings: ufs: Add HI3670 UFS controller bindingManivannan Sadhasivam2019-02-191-2/+3
| | | | | | | | | | | | | Add devicetree binding for HI3670 UFS controller. HI3760 SoC is very similar to HI3660 SoC with almost same IPs. Only major difference in terms of UFS is the PHY. HI3670 has 10nm PHY. But since the original driver (HI3660 UFS) cannot make HI3670 UFS functional, a separate compatible is added for HI3670 without any fallback. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Wei Li <liwei213@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* scsi: dt-bindings: ufs: Fix the compatible string definitionDouglas Anderson2019-02-081-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If you look at the bindings for the UFS Host Controller it says: - compatible: must contain "jedec,ufs-1.1" or "jedec,ufs-2.0", may also list one or more of the following: "qcom,msm8994-ufshc" "qcom,msm8996-ufshc" "qcom,ufshc" My reading of that is that it's fine to just have either of these: 1. "qcom,msm8996-ufshc", "jedec,ufs-2.0" 2. "qcom,ufshc", "jedec,ufs-2.0" As far as I can tell neither of the above is actually a good idea. For #1 it turns out that the driver currently only keys off the compatible string "qcom,ufshc" so it won't actually probe. For #2 the driver won't probe but it's not a good idea to keep the SoC name out of the compatible string. Let's update the compatible string to make it really explicit. We'll include a nod to the existing driver and the old binding and say that we should always include the "qcom,ufshc" string in addition to the SoC compatible string. While we're at it we'll also include another example SoC known to have UFS: sdm845. Fixes: 47555a5c8a11 ("scsi: ufs: make the UFS variant a platform device") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* scsi: dt-bindings: ufs: Add bindings for Cadence UFSJanek Kotas2018-11-091-0/+31
| | | | | | | | This patch adds a DT binding documentation for Cadence UFS Host Controller. Signed-off-by: Jan Kotas <jank@cadence.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* scsi: ufs: set the device reference clock settingSubhash Jadavani2018-11-091-0/+6
| | | | | | | | | | | | | | | UFS host supplies the reference clock to UFS device and UFS device specification allows host to provide one of the 4 frequencies (19.2 MHz, 26 MHz, 38.4 MHz, 52 MHz) for reference clock. Host should set the device reference clock frequency setting in the device based on what frequency it is supplying to UFS device. Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by: Can Guo <cang@codeaurora.org> Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* scsi: ufs: dt-bindings: add document for hisi-ufsliwei2018-07-192-3/+48
| | | | | | | | | add ufs node document for Hisilicon. Signed-off-by: Li Wei <liwei213@huawei.com> Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* dt-bindings: Remove leading 0x from bindings notationMathieu Malaterre2017-12-062-3/+3
| | | | | | | | | | | | | | | | Improve the binding example by removing all the leading 0x to fix the following dtc warnings: Warning (unit_address_format): Node /XXX unit name should not have leading "0x" Converted using the following command: find Documentation/devicetree/bindings -name "*.txt" -exec sed -i -e 's/([^ ])\@0x([0-9a-f])/$1\@$2/g' {} + This is a follow up to commit 48c926cd3414 Signed-off-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: Rob Herring <robh@kernel.org>
* phy: qcom-ufs: Remove -always-on propertyBjorn Andersson2017-01-271-1/+0
| | | | | | | | | | | | | | | | The fact that a regulator is always-on is a property of the regulator, not a specific consumer. Implementing this in the driver leads to a system behaviour that is dependent on if the Qualcomm UFS PHY was ever (partially) probed. If the specific regulator should be always on in a particular device, mark it so by specifying "regulator-always-on" in the regulator node. Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: qcom-ufs-14nm: Add new compatible for msm8996 based phyVivek Gautam2016-11-081-2/+5
| | | | | | | | | | Add a new compatible string for 14nm ufs phy present on msm8996 chipset. This phy is bit different from the legacy 14nm ufs phy in terms of the clocks that are needed to be handled in the driver. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* ufs: add TC G210 platform driverJoao Pinto2016-07-121-0/+26
| | | | | | | | This patch adds a glue platform driver for the Synopsys G210 Test Chip. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Reviewed-by: Hannes Reinicke <hare@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* ufs: add UFS 2.0 to ufshcd-pltfrm bindingsJoao Pinto2016-07-121-2/+2
| | | | | | | | | | Add UFS 2.0 to the ufshcd-pltfrm devicetree binding. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Tomas Winkler <tomas.winkler@intel.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* scsi: ufs-qcom: add number of lanes per directionYaniv Gardi2016-03-141-0/+3
| | | | | | | | | | | | | Different platform may have different number of lanes for the UFS link. Add parameter to device tree specifying how many lanes should be configured for the UFS link. Reviewed-by: Hannes Reinecke <hare@suse.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gilad Broner <gbroner@codeaurora.org> Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* scsi: ufs: make the UFS variant a platform deviceYaniv Gardi2015-11-092-1/+68
| | | | | | | | | | | | | | | | | | | | This change turns the UFS variant (SCSI_UFS_QCOM) into a UFS a platform device. In order to do so a few additional changes are required: 1. The ufshcd-pltfrm is no longer serves as a platform device. Now it only serves as a group of platform APIs such as PM APIs (runtime suspend/resume, system suspend/resume etc), parsers of clocks, regulators and pm_levels from DT. 2. What used to be the old platform "probe" is now "only" a pltfrm_init() routine, that does exactly the same, but only being called by the new probe function of the UFS variant. Reviewed-by: Rob Herring <robherring2@gmail.com> Reviewed-by: Gilad Broner <gbroner@codeaurora.org> Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* ufs: Add freq-table-hz property for UFS deviceSahitya Tummala2014-10-011-6/+6
| | | | | | | | | Add freq-table-hz propery for UFS device to keep track of <min max> frequencies supported by UFS clocks. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Dolev Raviv <draviv@codeaurora.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
* ufs: add voting support for host controller powerRaviv Shvili2014-10-011-0/+4
| | | | | | | | | | Add the support for voting of the regulator powering the host controller logic. Signed-off-by: Raviv Shvili <rshvili@codeaurora.org> Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by: Dolev Raviv <draviv@codeaurora.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
* ufs: Add clock initialization supportSujit Reddy Thumma2014-10-011-1/+14
| | | | | | | | | | | | Add generic clock initialization support for UFSHCD platform driver. The clock info is read from device tree using standard clock bindings. A generic max-clock-frequency-hz property is defined to save information on maximum operating clock frequency the h/w supports. Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org> Signed-off-by: Dolev Raviv <draviv@codeaurora.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
* ufs: Add regulator enable supportSujit Reddy Thumma2014-10-011-0/+24
| | | | | | | | | | | | | | | | | UFS devices are powered by at most three external power supplies - - VCC - The flash memory core power supply, 2.7V to 3.6V or 1.70V to 1.95V - VCCQ - The controller and I/O power supply, 1.1V to 1.3V - VCCQ2 - Secondary controller and/or I/O power supply, 1.65V to 1.95V For some devices VCCQ or VCCQ2 are optional as they can be generated using internal LDO inside the UFS device. Add DT bindings for voltage regulators that can be controlled from host driver. Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org> Signed-off-by: Dolev Raviv <draviv@codeaurora.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
* [SCSI] Documentation/devicetree: Add DT bindings for UFS host controllerSujit Reddy Thumma2013-06-041-0/+16
Compatible list is used in commit 03b1781 but is not documented. Add necessary device tree bindings to describe on-chip UFS host controllers. Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org> Signed-off-by: Santosh Y <santoshsy@gmail.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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