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* dt-bindings: iio: dac: ti,dac5571: Add DAC081C081 supportLaurent Pinchart2024-03-281-0/+1
| | | | | | | | | | | | The DAC081C081 is a TI DAC whose software interface is compatible with the DAC5571. It is the 8-bit version of the DAC121C081, already supported by the DAC5571 bindings. Extends the bindings to support this chip. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20240325203245.31660-2-laurent.pinchart@ideasonboard.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* dt-bindings: iio: health: maxim,max30102: add max30101Javier Carrasco2024-03-281-4/+8
| | | | | | | | | | | | | | The Maxim max30101 is the replacement for the max30105, which is no longer recommended for future designs. The max30101 does not require new properties, and it can be described with the existing ones for the max30105, which will be used as a fallback compatible. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240324-max30101-v2-1-611deb510c97@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* docs: iio: new docs for ad7944 driverDavid Lechner2024-03-282-0/+131
| | | | | | | | This adds a new page to document how to use the ad7944 ADC driver. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240322-mainline-ad7944-doc-v2-2-0923d35d5596@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* dt-bindings: iio: humidity: hdc3020: add reset-gpiosJavier Carrasco2024-03-251-0/+5
| | | | | | | | | | | | The HDC3020 provides an active low reset signal that is still not described in the bindings. Add reset-gpios to the bindings and the example. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20240303-hdc3020-pm-v3-2-48bc02b5241b@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* dt-bindings: iio: adc: add ad7944 ADCsDavid Lechner2024-03-251-0/+213
| | | | | | | | | | This adds a new binding for the Analog Devices, Inc. AD7944, AD7985, and AD7986 ADCs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240304-ad7944-mainline-v5-1-f0a38cea8901@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* dt-bindings: adc: ad7173: add support for additional modelsDumitru Ceclan2024-03-251-3/+36
| | | | | | | | | | | Add support for: AD7172-2, AD7175-8, AD7177-2. AD7172-4 does not feature an internal reference, check for external reference presence. Signed-off-by: Dumitru Ceclan <mitrutzceclan@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240306110956.13167-2-mitrutzceclan@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* dt-bindings: iio: light: Avago APDS9306Subhajit Ghosh2024-03-251-0/+2
| | | | | | | | | Extend avago,apds9300.yaml schema file to support apds9306 device. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Subhajit Ghosh <subhajit.ghosh@tweaklogic.com> Link: https://lore.kernel.org/r/20240309105031.10313-5-subhajit.ghosh@tweaklogic.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* dt-bindings: iio: light: adps9300: Update interrupt definitionsSubhajit Ghosh2024-03-251-1/+3
| | | | | | | | | Include irq.h and irq level macro in the example for readability Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Subhajit Ghosh <subhajit.ghosh@tweaklogic.com> Link: https://lore.kernel.org/r/20240309105031.10313-4-subhajit.ghosh@tweaklogic.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* dt-bindings: iio: light: adps9300: Add missing vdd-supplySubhajit Ghosh2024-03-251-0/+3
| | | | | | | | | All devices covered by the binding have a vdd supply. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Subhajit Ghosh <subhajit.ghosh@tweaklogic.com> Link: https://lore.kernel.org/r/20240309105031.10313-3-subhajit.ghosh@tweaklogic.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* dt-bindings: iio: light: Merge APDS9300 and APDS9960 schemasSubhajit Ghosh2024-03-252-48/+7
| | | | | | | | | | | Merge very similar schemas for APDS9300 and APDS9960. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/all/4e785d2e-d310-4592-a75a-13549938dcef@linaro.org/ Signed-off-by: Subhajit Ghosh <subhajit.ghosh@tweaklogic.com> Link: https://lore.kernel.org/r/20240309105031.10313-2-subhajit.ghosh@tweaklogic.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* dt-bindings: adc: add AD7173Dumitru Ceclan2024-03-251-0/+246
| | | | | | | | | | | | | The AD7173 family offer a complete integrated Sigma-Delta ADC solution which can be used in high precision, low noise single channel applications or higher speed multiplexed applications. The Sigma-Delta ADC is intended primarily for measurement of signals close to DC but also delivers outstanding performance with input bandwidths out to ~10kHz. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Dumitru Ceclan <mitrutzceclan@gmail.com> Link: https://lore.kernel.org/r/20240228110622.25114-1-mitrutzceclan@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* Merge tag 'x86-urgent-2024-03-24' of ↵Linus Torvalds2024-03-241-4/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Thomas Gleixner: - Ensure that the encryption mask at boot is properly propagated on 5-level page tables, otherwise the PGD entry is incorrectly set to non-encrypted, which causes system crashes during boot. - Undo the deferred 5-level page table setup as it cannot work with memory encryption enabled. - Prevent inconsistent XFD state on CPU hotplug, where the MSR is reset to the default value but the cached variable is not, so subsequent comparisons might yield the wrong result and as a consequence the result prevents updating the MSR. - Register the local APIC address only once in the MPPARSE enumeration to prevent triggering the related WARN_ONs() in the APIC and topology code. - Handle the case where no APIC is found gracefully by registering a fake APIC in the topology code. That makes all related topology functions work correctly and does not affect the actual APIC driver code at all. - Don't evaluate logical IDs during early boot as the local APIC IDs are not yet enumerated and the invoked function returns an error code. Nothing requires the logical IDs before the final CPUID enumeration takes place, which happens after the enumeration. - Cure the fallout of the per CPU rework on UP which misplaced the copying of boot_cpu_data to per CPU data so that the final update to boot_cpu_data got lost which caused inconsistent state and boot crashes. - Use copy_from_kernel_nofault() in the kprobes setup as there is no guarantee that the address can be safely accessed. - Reorder struct members in struct saved_context to work around another kmemleak false positive - Remove the buggy code which tries to update the E820 kexec table for setup_data as that is never passed to the kexec kernel. - Update the resource control documentation to use the proper units. - Fix a Kconfig warning observed with tinyconfig * tag 'x86-urgent-2024-03-24' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/boot/64: Move 5-level paging global variable assignments back x86/boot/64: Apply encryption mask to 5-level pagetable update x86/cpu: Add model number for another Intel Arrow Lake mobile processor x86/fpu: Keep xfd_state in sync with MSR_IA32_XFD Documentation/x86: Document that resctrl bandwidth control units are MiB x86/mpparse: Register APIC address only once x86/topology: Handle the !APIC case gracefully x86/topology: Don't evaluate logical IDs during early boot x86/cpu: Ensure that CPU info updates are propagated on UP kprobes/x86: Use copy_from_kernel_nofault() to read from unsafe address x86/pm: Work around false positive kmemleak report in msr_build_context() x86/kexec: Do not update E820 kexec table for setup_data x86/config: Fix warning for 'make ARCH=x86_64 tinyconfig'
| * Documentation/x86: Document that resctrl bandwidth control units are MiBTony Luck2024-03-241-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory bandwidth software controller uses 2^20 units rather than 10^6. See mbm_bw_count() which computes bandwidth using the "SZ_1M" Linux define for 0x00100000. Update the documentation to use MiB when describing this feature. It's too late to fix the mount option "mba_MBps" as that is now an established user interface. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240322182016.196544-1-tony.luck@intel.com
* | Merge tag 'sched-urgent-2024-03-24' of ↵Linus Torvalds2024-03-241-0/+3
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler doc clarification from Thomas Gleixner: "A single update for the documentation of the base_slice_ns tunable to clarify that any value which is less than the tick slice has no effect because the scheduler tick is not guaranteed to happen within the set time slice" * tag 'sched-urgent-2024-03-24' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched/doc: Update documentation for base_slice_ns and CONFIG_HZ relation
| * | sched/doc: Update documentation for base_slice_ns and CONFIG_HZ relationMukesh Kumar Chaurasiya2024-03-211-0/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tunable base_slice_ns is dependent on CONFIG_HZ (i.e. TICK_NSEC) for any significant performance improvement. The reason being the scheduler tick is not frequent enough to force preemption when base_slice expires in case of: base_slice_ns < TICK_NSEC The below data is of stress-ng: Number of CPU: 1 Stressor threads: 4 Time: 30sec On CONFIG_HZ=1000 | base_slice | avg-run (msec) | context-switches | | ---------- | -------------- | ---------------- | | 3ms | 2.914 | 10342 | | 6ms | 4.857 | 6196 | | 9ms | 6.754 | 4482 | | 12ms | 7.872 | 3802 | | 22ms | 11.294 | 2710 | | 32ms | 13.425 | 2284 | On CONFIG_HZ=100 | base_slice | avg-run (msec) | context-switches | | ---------- | -------------- | ---------------- | | 3ms | 9.144 | 3337 | | 6ms | 9.113 | 3301 | | 9ms | 8.991 | 3315 | | 12ms | 12.935 | 2328 | | 22ms | 16.031 | 1915 | | 32ms | 18.608 | 1622 | base_slice: the value of base_slice in ms avg-run (msec): average time of the stressor threads got on cpu before it got preempted context-switches: number of context switches for the stress-ng process Signed-off-by: Mukesh Kumar Chaurasiya <mchauras@linux.ibm.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/r/20240320173815.927637-2-mchauras@linux.ibm.com
* | Merge tag 'timers-core-2024-03-23' of ↵Linus Torvalds2024-03-236-5/+81
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull more clocksource updates from Thomas Gleixner: "A set of updates for clocksource and clockevent drivers: - A fix for the prescaler of the ARM global timer where the prescaler mask define only covered 4 bits while it is actully 8 bits wide. This obviously restricted the possible range of prescaler adjustments - A fix for the RISC-V timer which prevents a timer interrupt being raised while the timer is initialized - A set of device tree updates to support new system on chips in various drivers - Kernel-doc and other cleanups all over the place" * tag 'timers-core-2024-03-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers/timer-riscv: Clear timer interrupt on timer initialization dt-bindings: timer: Add support for cadence TTC PWM clocksource/drivers/arm_global_timer: Simplify prescaler register access clocksource/drivers/arm_global_timer: Guard against division by zero clocksource/drivers/arm_global_timer: Make gt_target_rate unsigned long dt-bindings: timer: add Ralink SoCs system tick counter clocksource: arm_global_timer: fix non-kernel-doc comment clocksource/drivers/arm_global_timer: Remove stray tab clocksource/drivers/arm_global_timer: Fix maximum prescaler value clocksource/drivers/imx-sysctr: Add i.MX95 support clocksource/drivers/imx-sysctr: Drop use global variables dt-bindings: timer: nxp,sysctr-timer: support i.MX95 dt-bindings: timer: renesas: ostm: Document RZ/Five SoC dt-bindings: timer: renesas,tmu: Document input capture interrupt clocksource/drivers/ti-32K: Fix misuse of "/**" comment clocksource/drivers/stm32: Fix all kernel-doc warnings dt-bindings: timer: exynos4210-mct: Add google,gs101-mct compatible clocksource/drivers/imx: Fix -Wunused-but-set-variable warning
| * \ Merge tag 'timers-v6.9-rc1' of ↵Thomas Gleixner2024-03-186-5/+81
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.linaro.org/people/daniel.lezcano/linux into timers/core Pull clocksource/event driver updates from Daniel Lezcano: - Fix -Wunused-but-set-variable warning for the iMX GPT timer (Daniel Lezcano) - Add Pixel6 compatible string for Exynos 4210 MCT timer (Peter Griffin) - Fix all kernel-doc warnings and misuse of comment format (Randy Dunlap) - Document in the DT bindings the interrupt used for input capture interrupt and udpate the example to match the reality (Geert Uytterhoeven) - Document RZ/Five SoC DT bindings (Lad Prabhakar) - Add DT bindings support for the i.MX95, reorganize the driver to move globale variables to a timer private structure and introduce the i.MX95 timer support (Peng Fan) - Fix prescalar value to conform to the ARM global timer documentation. Fix data types and comparison, guard the divide by zero code section and use the available macros for bit manipulation (Martin Blumenstingl) - Add Ralink SoCs system tick counter (Sergio Paracuellos) - Add support for cadence TTC PWM (Mubin Sayyed) - Clear timer interrupt on timer initialization to prevent the interrupt to fire during setup (Ley Foon Tan) Link: https://lore.kernel.org/r/5552010a-1ce2-46a1-a740-a69f2e9a2cf2@linaro.org
| | * | dt-bindings: timer: Add support for cadence TTC PWMMubin Sayyed2024-02-261-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cadence TTC can act as PWM device, it will be supported through separate PWM framework based driver. Decision to configure specific TTC device as PWM or clocksource/clockevent would be done based on presence of "#pwm-cells" property. Also, interrupt property is not required for TTC PWM driver. Update bindings to support TTC PWM configuration. Signed-off-by: Mubin Sayyed <mubin.sayyed@amd.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20240226093333.2581092-1-mubin.sayyed@amd.com
| | * | dt-bindings: timer: add Ralink SoCs system tick counterSergio Paracuellos2024-02-231-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add YAML doc for the system tick counter which is present on Ralink SoCs. cc: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20231212093443.1898591-1-sergio.paracuellos@gmail.com
| | * | dt-bindings: timer: nxp,sysctr-timer: support i.MX95Peng Fan2024-02-181-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i.MX95 System counter module compatible string, the SCMI firmware blocks access to control register, so should not add "nxp,sysctr-timer" as fallback. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20240205-imx-sysctr-v4-1-ca5a6e1552e7@nxp.com
| | * | dt-bindings: timer: renesas: ostm: Document RZ/Five SoCLad Prabhakar2024-02-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OSTM block on the RZ/Five SoC is identical to one found on the RZ/G2UL SoC. "renesas,r9a07g043-ostm" compatible string will be used on the RZ/Five SoC so to make this clear and to keep this file consistent, update the comment to include RZ/Five SoC. No driver changes are required as generic compatible string "renesas,ostm" will be used as a fallback on RZ/Five SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20231115212908.33131-1-prabhakar.mahadev-lad.rj@bp.renesas.com
| | * | dt-bindings: timer: renesas,tmu: Document input capture interruptGeert Uytterhoeven2024-01-311-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Timer Unit (TMU) instances with 3 channels support a fourth interrupt: an input capture interrupt for the third channel. While at it, document the meaning of the four interrupts, and add "interrupt-names" for clarity. Update the example to match reality. Inspired by a patch by Yoshinori Sato for SH. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/8cb38b5236213a467c6c0073f97ccc4bfd5a39ff.1706717378.git.geert+renesas@glider.be
| | * | dt-bindings: timer: exynos4210-mct: Add google,gs101-mct compatiblePeter Griffin2024-01-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add dedicated google,gs101-mct compatible to the dt-schema for representing mct timer of the Google Tensor gs101 SoC. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20231222165355.1462740-2-peter.griffin@linaro.org
* | | | Merge tag 'riscv-for-linus-6.9-mw2' of ↵Linus Torvalds2024-03-226-13/+74
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: - Support for various vector-accelerated crypto routines - Hibernation is now enabled for portable kernel builds - mmap_rnd_bits_max is larger on systems with larger VAs - Support for fast GUP - Support for membarrier-based instruction cache synchronization - Support for the Andes hart-level interrupt controller and PMU - Some cleanups around unaligned access speed probing and Kconfig settings - Support for ACPI LPI and CPPC - Various cleanus related to barriers - A handful of fixes * tag 'riscv-for-linus-6.9-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (66 commits) riscv: Fix syscall wrapper for >word-size arguments crypto: riscv - add vector crypto accelerated AES-CBC-CTS crypto: riscv - parallelize AES-CBC decryption riscv: Only flush the mm icache when setting an exec pte riscv: Use kcalloc() instead of kzalloc() riscv/barrier: Add missing space after ',' riscv/barrier: Consolidate fence definitions riscv/barrier: Define RISCV_FULL_BARRIER riscv/barrier: Define __{mb,rmb,wmb} RISC-V: defconfig: Enable CONFIG_ACPI_CPPC_CPUFREQ cpufreq: Move CPPC configs to common Kconfig and add RISC-V ACPI: RISC-V: Add CPPC driver ACPI: Enable ACPI_PROCESSOR for RISC-V ACPI: RISC-V: Add LPI driver cpuidle: RISC-V: Move few functions to arch/riscv riscv: Introduce set_compat_task() in asm/compat.h riscv: Introduce is_compat_thread() into compat.h riscv: add compile-time test into is_compat_task() riscv: Replace direct thread flag check with is_compat_task() riscv: Improve arch_get_mmap_end() macro ...
| * \ \ \ Merge patch series "riscv: mm: Extend mappable memory up to hint address"Palmer Dabbelt2024-03-151-11/+5
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Charlie Jenkins <charlie@rivosinc.com> says: On riscv, mmap currently returns an address from the largest address space that can fit entirely inside of the hint address. This makes it such that the hint address is almost never returned. This patch raises the mappable area up to and including the hint address. This allows mmap to often return the hint address, which allows a performance improvement over searching for a valid address as well as making the behavior more similar to other architectures. Note that a previous patch introduced stronger semantics compared to other architectures for riscv mmap. On riscv, mmap will not use bits in the upper bits of the virtual address depending on the hint address. On other architectures, a random address is returned in the address space requested. On all architectures the hint address will be returned if it is available. This allows riscv applications to configure how many bits in the virtual address should be left empty. This has the two benefits of being able to request address spaces that are smaller than the default and doesn't require the application to know the page table layout of riscv. * b4-shazam-merge: docs: riscv: Define behavior of mmap selftests: riscv: Generalize mm selftests riscv: mm: Use hint address in mmap if available Link: https://lore.kernel.org/r/20240130-use_mmap_hint_address-v3-0-8a655cfa8bcb@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| | * | | | docs: riscv: Define behavior of mmapCharlie Jenkins2024-03-141-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define mmap on riscv to not provide an address that uses more bits than the hint address, if provided. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> Link: https://lore.kernel.org/r/20240130-use_mmap_hint_address-v3-3-8a655cfa8bcb@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| * | | | | Merge patch series "Support Andes PMU extension"Palmer Dabbelt2024-03-152-1/+12
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Yu Chien Peter Lin <peterlin@andestech.com> says: This patch series introduces the Andes PMU extension, which serves the same purpose as Sscofpmf and Smcntrpmf. Its non-standard local interrupt is assigned to bit 18 in the custom S-mode local interrupt enable and pending registers (slie/slip), while the interrupt cause is (256 + 18). * b4-shazam-merge: riscv: andes: Support specifying symbolic firmware and hardware raw events riscv: dts: renesas: Add Andes PMU extension for r9a07g043f dt-bindings: riscv: Add Andes PMU extension description perf: RISC-V: Introduce Andes PMU to support perf event sampling perf: RISC-V: Eliminate redundant interrupt enable/disable operations riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC dt-bindings: riscv: Add Andes interrupt controller compatible string riscv: errata: Rename defines for Andes Link: https://lore.kernel.org/r/20240222083946.3977135-1-peterlin@andestech.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| | * | | | | dt-bindings: riscv: Add Andes PMU extension descriptionYu Chien Peter Lin2024-03-121-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the ISA string for Andes Technology performance monitor extension which provides counter overflow interrupt and mode filtering mechanisms. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20240222083946.3977135-9-peterlin@andestech.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| | * | | | | dt-bindings: riscv: Add Andes interrupt controller compatible stringYu Chien Peter Lin2024-03-121-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add "andestech,cpu-intc" compatible string to indicate that Andes specific local interrupt is supported on the core, e.g. AX45MP cores have 3 types of non-standard local interrupt which can be handled in supervisor mode: - Slave port ECC error interrupt - Bus write transaction error interrupt - Performance monitor overflow interrupt These interrupts are enabled/disabled via a custom register SLIE instead of the standard interrupt enable register SIE. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20240222083946.3977135-5-peterlin@andestech.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| * | | | | | membarrier: riscv: Provide core serializing commandAndrea Parri2024-02-151-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RISC-V uses xRET instructions on return from interrupt and to go back to user-space; the xRET instruction is not core serializing. Use FENCE.I for providing core serialization as follows: - by calling sync_core_before_usermode() on return from interrupt (cf. ipi_sync_core()), - via switch_mm() and sync_core_before_usermode() (respectively, for uthread->uthread and kthread->uthread transitions) before returning to user-space. On RISC-V, the serialization in switch_mm() is activated by resetting the icache_stale_mask of the mm at prepare_sync_core_cmd(). Suggested-by: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Andrea Parri <parri.andrea@gmail.com> Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Link: https://lore.kernel.org/r/20240131144936.29190-5-parri.andrea@gmail.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| * | | | | | membarrier: Create Documentation/scheduler/membarrier.rstAndrea Parri2024-02-152-0/+40
| |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To gather the architecture requirements of the "private/global expedited" membarrier commands. The file will be expanded to integrate further information about the membarrier syscall (as needed/desired in the future). While at it, amend some related inline comments in the membarrier codebase. Suggested-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Signed-off-by: Andrea Parri <parri.andrea@gmail.com> Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Link: https://lore.kernel.org/r/20240131144936.29190-3-parri.andrea@gmail.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
* | | | | | Merge tag 'spi-fix-v6.9-merge-window' of ↵Linus Torvalds2024-03-222-3/+3
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A small collection of fixes that came in since the merge window. Most of it is relatively minor driver specific fixes, there's also fixes for error handling with SPI flash devices and a fix restoring delay control functionality for non-GPIO chip selects managed by the core" * tag 'spi-fix-v6.9-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: spi-mt65xx: Fix NULL pointer access in interrupt handler spi: docs: spidev: fix echo command format spi: spi-imx: fix off-by-one in mx51 CPU mode burst length spi: lm70llp: fix links in doc and comments spi: Fix error code checking in spi_mem_exec_op() spi: Restore delays for non-GPIO chip select spi: lpspi: Avoid potential use-after-free in probe()
| * | | | | | spi: docs: spidev: fix echo command formatDavid Lechner2024-03-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The two example echo commands for binding the spidev driver were being rendered as one line in the HTML output. This patch makes use of the restructured text :: to format the commands as a code block instead which preserves the line break. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240319183344.2106335-1-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | | | spi: Merge up v6.8 releaseMark Brown2024-03-1836-89/+571
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | An i.MX fix depends on other fixes that were sent to v6.8.
| * | | | | | | spi: lm70llp: fix links in doc and commentsKousik Sanagavarapu2024-03-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update links in the documentation and in-code comments which point to the datasheet and schematic. The current links don't work because National Semiconductor (which is the manufacturer of this board and lm70) has been a part of Texas Instruments since 2011 and hence http://www.national.com/ doesn't work anymore. Fixes: 78961a574037 ("spi_lm70llp parport adapter driver") Fixes: 2b7300513b98 ("hwmon: (lm70) Code streamlining and cleanup") Signed-off-by: Kousik Sanagavarapu <five231003@gmail.com> Link: https://msgid.link/r/20240318154540.90613-2-five231003@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | | | | | | Merge tag 'sound-fix2-6.9-rc1' of ↵Linus Torvalds2024-03-221-5/+6
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull more sound fixes from Takashi Iwai: "The remaining fixes for 6.9-rc1 that have been gathered in this week. More about ASoC at this time (one long-standing fix for compress offload, SOF, AMD ACP, Rockchip, Cirrus and tlv320 stuff) while another regression fix in ALSA core and a couple of HD-audio quirks as usual are included" * tag 'sound-fix2-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA: control: Fix unannotated kfree() cleanup ALSA: hda/realtek: Add quirks for some Clevo laptops ALSA: hda/realtek: Add quirk for HP Spectre x360 14 eu0000 ALSA: hda/realtek: fix the hp playback volume issue for LG machines ASoC: soc-compress: Fix and add DPCM locking ASoC: SOF: amd: Skip IRAM/DRAM size modification for Steam Deck OLED ASoC: SOF: amd: Move signed_fw_image to struct acp_quirk_entry ASoC: amd: yc: Revert "add new YC platform variant (0x63) support" ASoC: amd: yc: Revert "Fix non-functional mic on Lenovo 21J2" ASoC: soc-core.c: Skip dummy codec when adding platforms ASoC: rockchip: i2s-tdm: Fix inaccurate sampling rates ASoC: dt-bindings: cirrus,cs42l43: Fix 'gpio-ranges' schema ASoC: amd: yc: Fix non-functional mic on ASUS M7600RE ASoC: tlv320adc3xxx: Don't strip remove function when driver is builtin
| * \ \ \ \ \ \ \ Merge tag 'asoc-fix-v6.9-merge-window' of ↵Takashi Iwai2024-03-2112-29/+374
| |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Fixes for v6.9 A bunch of fixes that came in during the merge window, probably the most substantial thing is the DPCM locking fix for compressed audio which has been lurking for a while.
| | * \ \ \ \ \ \ \ ASoC: Merge up releaseMark Brown2024-03-1312-25/+369
| | |\ \ \ \ \ \ \ \ | | | | |/ / / / / / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | In order to apply additional fixes that depend on the fixes merged for v6.8 merge up the final release.
| | * | | | | | | | ASoC: dt-bindings: cirrus,cs42l43: Fix 'gpio-ranges' schemaRob Herring2024-03-121-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'gpio-ranges' is a phandle-array which is really a matrix. The schema in cirrus,cs42l43 is incomplete as it doesn't define there's only a single entry. Add the outer array constraints that there is a single entry. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://msgid.link/r/20240311222554.1940567-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | | | | | | | | Merge tag 'i2c-for-6.9-rc1-part2' of ↵Linus Torvalds2024-03-222-7/+44
|\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull more i2c updates from Wolfram Sang: "Some more I2C updates after the dependencies have been merged now. Plus a DT binding fix" * tag 'i2c-for-6.9-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: dt-bindings: i2c: qcom,i2c-cci: Fix OV7251 'data-lanes' entries i2c: muxes: pca954x: Allow sharing reset GPIO i2c: nomadik: sort includes i2c: nomadik: support Mobileye EyeQ5 I2C controller i2c: nomadik: fetch i2c-transfer-timeout-us property from devicetree i2c: nomadik: replace jiffies by ktime for FIFO flushing timeout i2c: nomadik: support short xfer timeouts using waitqueue & hrtimer i2c: nomadik: use bitops helpers i2c: nomadik: simplify IRQ masking logic i2c: nomadik: rename private struct pointers from dev to priv dt-bindings: i2c: nomadik: add mobileye,eyeq5-i2c bindings and example
| * | | | | | | | | | dt-bindings: i2c: qcom,i2c-cci: Fix OV7251 'data-lanes' entriesRob Herring2024-03-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OV7251 sensor only has a single data lane, so 2 entries is not valid. Fix this to be 1 entry as the schema specifies. The schema validation doesn't catch this currently due to some limitations in handling of arrays vs. matrices, but a fix is being worked on. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
| * | | | | | | | | | Merge tag 'i2c-host-6.9-part2' of ↵Wolfram Sang2024-03-201-6/+43
| |\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow Théo adds support for the Mobileye EyeQ5-I2C in the bindings. This patch is followed by eight commits featuring improvements to the Nomadik controller, such as simplification of the IRQ logic, renaming of the private data structure, more efficient use of FIELD_PREP/GET, GENMASK, etc., better time measurement with ktime, and more.
| | * | | | | | | | | | dt-bindings: i2c: nomadik: add mobileye,eyeq5-i2c bindings and exampleThéo Lebrun2024-03-081-6/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add EyeQ5 bindings to the existing Nomadik I2C dt-bindings. Add the EyeQ5-specific property behind a conditional. Add an example for this compatible. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* | | | | | | | | | | | Merge tag 'rtc-6.9' of ↵Linus Torvalds2024-03-218-68/+202
|\ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux Pull RTC updates from Alexandre Belloni: "Subsytem: - rtc_class is now const Drivers: - ds1511: cleanup, set date and time range and alarm offset limit - max31335: fix interrupt handler - pcf8523: improve suspend support" * tag 'rtc-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (28 commits) MAINTAINER: Include linux-arm-msm for Qualcomm RTC patches dt-bindings: rtc: zynqmp: Add support for Versal/Versal NET SoCs rtc: class: make rtc_class constant dt-bindings: rtc: abx80x: Improve checks on trickle charger constraints MAINTAINERS: adjust file entry in ARM/Mediatek RTC DRIVER rtc: nct3018y: fix possible NULL dereference rtc: max31335: fix interrupt status reg rtc: mt6397: select IRQ_DOMAIN instead of depending on it dt-bindings: rtc: abx80x: convert to yaml rtc: m41t80: Use the unified property API get the wakeup-source property dt-bindings: at91rm9260-rtt: add sam9x7 compatible dt-bindings: rtc: convert MT7622 RTC to the json-schema dt-bindings: rtc: convert MT2717 RTC to the json-schema rtc: pcf8523: add suspend handlers for alarm IRQ rtc: ds1511: set alarm offset limit rtc: ds1511: set range rtc: ds1511: drop inline/noinline hints rtc: ds1511: rename pdata rtc: ds1511: implement ds1511_rtc_read_alarm properly rtc: ds1511: remove partial alarm support ...
| * | | | | | | | | | | | dt-bindings: rtc: zynqmp: Add support for Versal/Versal NET SoCsMichal Simek2024-03-081-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Versal and Versal NET SoCs. Both of them should use the same IP core but differences can be in integration part that's why create separate compatible strings. Also describe optional power-domains property. It is optional because power domain doesn't need to be onwed by non secure firmware hence no access to control it via any driver. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/5ecd775e6083f86aa744c4e9dfb7f6a13082c78a.1709804617.git.michal.simek@amd.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| * | | | | | | | | | | | dt-bindings: rtc: abx80x: Improve checks on trickle charger constraintsLaurent Pinchart2024-03-081-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The abracon,tc-diode and abracon,tc-resistor DT properties are only valid for the ABx0804 and ABx0805. Furthermore, they must both be present, or neither of them must be specified. Add rules to check this. The generic abracon,abx08x compatible string doesn't indicate which chip variant is used, but performs auto-detection at runtime. It must this also allow the two above properties. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240305080944.17991-1-laurent.pinchart@ideasonboard.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| * | | | | | | | | | | | dt-bindings: rtc: abx80x: convert to yamlJosua Mayer2024-02-292-31/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the abracon abx80x rtc text bindings to dt-schema format. In addition to the text description reference generic interrupts properties and add an example. Signed-off-by: Josua Mayer <josua@solid-run.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240219-rtc-abracon-convert-bindings-v7-1-aca4fc3b8cec@solid-run.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| * | | | | | | | | | | | dt-bindings: at91rm9260-rtt: add sam9x7 compatibleVarshini Rajendran2024-02-291-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add compatible for SAM9X7 RTT. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240223172552.672094-1-varshini.rajendran@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| * | | | | | | | | | | | dt-bindings: rtc: convert MT7622 RTC to the json-schemaRafał Miłecki2024-02-292-21/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This helps validating DTS files. Introduced changes: 1. Reworded title 2. Dropper redundant properties descriptions 3. Added required #include-s and adjusted "reg" in example Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240123125043.27192-1-zajec5@gmail.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| * | | | | | | | | | | | dt-bindings: rtc: convert MT2717 RTC to the json-schemaRafał Miłecki2024-02-292-14/+39
| | |_|_|_|_|_|/ / / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This helps validating DTS files. Introduced changes: 1. Reworded title 2. Dropper redundant properties descriptions 3. Added required #include and adjusted "reg" in example Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122124949.29577-1-zajec5@gmail.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>