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* ARM: dts: microchip: at91-sama7g54_curiosity: Replace ↵Andrei Simion2024-04-211-4/+4
| | | | | | | | | | | | | | | | regulator-suspend-voltage with the valid property By checking the pmic node with microchip,mcp16502.yaml# 'regulator-suspend-voltage' does not match any of the regexes 'pinctrl-[0-9]+' from schema microchip,mcp16502.yaml# which inherits regulator.yaml#. So replace regulator-suspend-voltage with regulator-suspend-microvolt to avoid the inconsitency. Fixes: ebd6591f8ddb ("ARM: dts: microchip: sama7g54_curiosity: Add initial device tree of the board") Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240404123824.19182-3-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: at91-sama7g5ek: Replace regulator-suspend-voltage with ↵Andrei Simion2024-04-211-4/+4
| | | | | | | | | | | | | | | | | | the valid property By checking the pmic node with microchip,mcp16502.yaml# 'regulator-suspend-voltage' does not match any of the regexes 'pinctrl-[0-9]+' from schema microchip,mcp16502.yaml# which inherits regulator.yaml#. So replace regulator-suspend-voltage with regulator-suspend-microvolt to avoid the inconsitency. Fixes: 85b1304b9daa ("ARM: dts: at91: sama7g5ek: set regulator voltages for standby state") Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240404123824.19182-2-andrei.simion@microchip.com [claudiu.beznea: added a dot before starting the last sentence in commit description] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: sama7g5: add sama7g5 compatibleBalakrishnan Sambath2024-02-231-9/+9
| | | | | | | | | Add sama7g5 flexcom specific compatible in DT with fallbacks. Signed-off-by: Balakrishnan Sambath <balakrishnan.s@microchip.com> Link: https://lore.kernel.org/r/20240223-b4-sama5d2-flexcom-yaml-v2-1-7e96c60c7701@microchip.com [claudiu.beznea: adapt for flexcom10] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: sam9x60: align dmas to the opening '<'Claudiu Beznea2024-02-231-32/+32
| | | | | | | | | | Align dmas to the opening '<' to comply with the dts coding style, indentation section, point 3: "For arrays spanning across lines, it is preferred to align the continued entries with opening < from the first line." Link: https://lore.kernel.org/r/20240218151353.3612621-3-claudiu.beznea@tuxon.dev Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: sama7g5: align dmas to the opening '<'Claudiu Beznea2024-02-231-8/+8
| | | | | | | | | | Align dmas to the opening '<' to comply with the dts coding style, indentation section, point 3: "For arrays spanning across lines, it is preferred to align the continued entries with opening < from the first line." Link: https://lore.kernel.org/r/20240218151353.3612621-2-claudiu.beznea@tuxon.dev Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: sama7g54_curiosity: Add initial device tree of the boardMihai Sain2024-02-232-0/+484
| | | | | | | | Add initial device tree of the SAMA7G54 Curiosity board. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20240215091524.14732-4-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: sama7g5: Add flexcom 10 nodeMihai Sain2024-02-231-0/+24
| | | | | | | | | Add flexcom 10 node for usage on the SAMA7G54 Curiosity board. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20240215091524.14732-3-mihai.sain@microchip.com [claudiu.beznea: align dmas to the opening '<'] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: gardena-smart-gateway: Use DMA for USART3Ezra Buehler2024-02-031-0/+2
| | | | | | | | | | | | | | | | | The AT91SAM9G25-based GARDENA smart Gateway uses USART3 (ttyS1) to communicate (over PPP, at 115200 baud) with the radio module. We have been experiencing packet loss and seeing errors on the ppp0 interface. Enabling DMA for the serial interface resolves the issues. Co-developed-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net> Signed-off-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net> Signed-off-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240102161839.702625-3-ezra.buehler@husqvarna.com [claudiu.beznea: s/Co-Developed-by/Co-developed-by to make checkpatch.pl happy, s/at91/microchip in commit title] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: at91sam9x5ek: Use DMA for DBGU serial portEzra Buehler2024-02-031-0/+2
| | | | | | | | | | | | | | | | | | The UART controller does not seem to be fast enough to receive data (at 115200 baud) without dropping bytes when DMA is disabled. This has often been noticed when pasting SSH keys into the serial console (ttyS0). Only after multiple tries, the long strings would be successfully transferred without missing characters. Co-developed-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net> Signed-off-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net> Signed-off-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240102161839.702625-2-ezra.buehler@husqvarna.com [claudiu.beznea: s/Co-Developed-by/Co-developed-by to make checkpatch.pl happy, s/at91/microchip in commit title] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: sama5d27_som1_ek: Remove mmc-ddr-3_3v property from ↵Mihai Sain2023-12-121-1/+0
| | | | | | | | | | | | | | sdmmc0 node On board the sdmmc0 interface is wired to a SD Card socket. According with mmc-controller bindings, the mmc-ddr-3_3v property is used for eMMC devices to enable high-speed DDR mode (3.3V I/O). Remove the mmc-ddr-3_3v property from sdmmc0 node. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20231211070345.2792-1-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: sama5d27_wlsom1_ek: Remove mmc-ddr-3_3v property from ↵Mihai Sain2023-12-081-1/+0
| | | | | | | | | | | | | sdmmc0 node On board the sdmmc0 interface is wired to a SD Card socket. According with mmc-controller bindings, the mmc-ddr-3_3v property is used for eMMC devices to enable high-speed DDR mode (3.3V I/O). Remove the mmc-ddr-3_3v property from sdmmc0 node. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20231204072537.2991-1-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: sam9x60ek: Add IRQ support for ethernet PHYMihai Sain2023-11-191-0/+3
| | | | | | | | | | Add interrupt support for ethernet phy subnode. Add PB8 definition to macb0 pinctrl. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20231109131149.46397-3-mihai.sain@microchip.com [claudiu.beznea: s/at91/microchip in commit title to match dts directory] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: microchip: sam9x60_curiosity: Add IRQ support for ethernet PHYMihai Sain2023-11-191-0/+3
| | | | | | | | | | Add interrupt support for ethernet phy subnode. Add PB8 definition to macb0 pinctrl. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20231109131149.46397-2-mihai.sain@microchip.com [claudiu.beznea: s/at91/microchip in commit title to match dts directory] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: at91: sam9x60_curiosity: Add mandatory dt property for RTTTudor Ambarus2023-09-291-0/+4
| | | | | | | | | | | | | atmel,rtt-rtc-time-reg is a mandatory property and encodes the GPBR register used to store the time base when the RTT is used as an RTC. Align the RTT with what's currently done for sam9x60ek and sama7g5ek, and enable it by default even if RTC is also enabled. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> [nicolas.ferre@microchip.com: adapt to newer kernel] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230928143644.208515-1-nicolas.ferre@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: at91: sama5d29_curiosity: Add device tree for sama5d29_curiosity boardMihai Sain2023-09-292-0/+602
| | | | | | | | Add initial device tree file for sama5d29_curiosity board. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20230919124606.26898-3-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* ARM: dts: at91/trivial: fix typo in crypto DT namingNicolas Ferre2023-09-181-1/+1
| | | | | | | | | | | Fix typo in DT name for TDES node. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230906135838.59247-1-nicolas.ferre@microchip.com [claudiu.beznea: removed fixes tag as tdes node is not referenced anywhere by its node name] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2023-08-3016-61/+61
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM devicetree updates from Arnd Bergmann: "These are the devicetree updates for Arm and RISC-V based SoCs, mainly from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and Starfive. Only a few new SoC got added: - TI AM62P5, a variant of the existing Sitara AM62x family - Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55 SoC. - Qualcomm ipq5018 is used in wireless access points - Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone platform. In total, 29 machines get added, which is low because of the summer break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST, Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of these are development and reference boards. Despite not adding a lot of new machines, there are over 700 patches in total, most of which are cleanups and minor fixes" * tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits) arm64: dts: use capital "OR" for multiple licenses in SPDX ARM: dts: use capital "OR" for multiple licenses in SPDX arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved ARM: dts: qcom: apq8064: add support to gsbi4 uart riscv: dts: change TH1520 files to dual license riscv: dts: thead: add BeagleV Ahead board device tree dt-bindings: riscv: Add BeagleV Ahead board compatibles ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs ARM: dts: stm32: support display on stm32f746-disco board ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco ARM: dts: stm32: add pin map for LTDC on stm32f7 ARM: dts: stm32: add ltdc support on stm32f746 MCU arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Add PDC riscv: dts: starfive: fix jh7110 qspi sort order ...
| * ARM: dts: at91: remove duplicated entriesClaudiu Beznea2023-08-041-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove duplicated DTC_FLAGS_<board> := -@ entries which intends to enable the building of device tree overlays. Commit 724ba6751532 ("ARM: dts: Move .dts files to vendor sub-directories") added those entries at the beginning of file w/o removing the already available entries spread though file. Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230721053918.33944-1-claudiu.beznea@tuxon.dev Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
| * ARM: dts: microchip: split interrupts per cellsKrzysztof Kozlowski2023-08-024-35/+35
| | | | | | | | | | | | | | | | Each interrupt should be in its own cell. This is much more readable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230730111542.98238-1-krzysztof.kozlowski@linaro.org Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
| * ARM: dts: at91: ksz9477_evb: Add tx-internal-delay-ps property for port5Lukasz Majewski2023-07-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this change the KSZ9477 Evaluation board's Linux (v6.5-rc1) shows following device warning: 'ksz-switch spi1.0: Port 5 interpreting RGMII delay settings based on "phy-mode" property, please update device tree to specify "rx-internal-delay-ps" and "tx-internal-delay-ps"' This is not critical, as KSZ driver by itself assigns default value of tx delay to 2000 ps (as 'rgmii-txid' is set as PHY mode). However, to avoid extra warnings in logs - the missing 'tx-internal-delay-ps' has been specified with the default value of 2000 ps. Signed-off-by: Lukasz Majewski <lukma@denx.de> Link: https://lore.kernel.org/r/20230727080656.3828397-1-lukma@denx.de Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
| * ARM: dts: at91: ksz9477_evb: Add missing timer nodesLukasz Majewski2023-07-311-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this change the KSZ9477-EVB board hangs just after passing execution flow from u-boot to Linux kernel. This code has been copied from at91-sama5d3_xplained.dts. Test setup: Linux 6.5-rc1 Config: arch/arm/configs/sama5_defconfig Toolchain: gcc-linaro-7.3.1-2018.05-x86_64_arm-linux-gnueabi Signed-off-by: Lukasz Majewski <lukma@denx.de> Link: https://lore.kernel.org/r/20230712152111.3756211-1-lukma@denx.de Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
| * ARM: dts: at91-vinco: Fix "status" valuesRob Herring2023-07-311-2/+2
| | | | | | | | | | | | | | | | | | The defined value for "status" is "disabled", not "disable". Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230626221010.3946263-1-robh@kernel.org Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
| * ARM: dts: microchip: add missing space before {Krzysztof Kozlowski2023-07-299-9/+9
| | | | | | | | | | | | | | | | | | | | Add missing whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230705150058.293942-1-krzysztof.kozlowski@linaro.org [claudiu.beznea: added link] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
| * ARM: dts: microchip: minor whitespace cleanup around '='Krzysztof Kozlowski2023-07-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230702185108.43959-1-krzysztof.kozlowski@linaro.org [claudiu.beznea: added link] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
* | ARM: dts: at91: sam9x60: fix the SOC detectionDurai Manickam KR2023-07-211-13/+13
|/ | | | | | | | | | Remove the dbgu compatible strings in the UART submodule of the flexcom for the proper SOC detection. Fixes: 99c808335877 (ARM: dts: at91: sam9x60: Add missing flexcom definitions) Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> Link: https://lore.kernel.org/r/20230712100042.317856-1-durai.manickamkr@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2023-06-292-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC devicetree updates from Arnd Bergmann: "The biggest change this time is for the 32-bit devicetree files, which are all moved to a new location, using separate subdirectories for each SoC vendor, following the same scheme that is used on arm64, mips and riscv. This has been discussed for many years, but so far we never did this as there was a plan to move the files out of the kernel entirely, which has never happened. The impact of this will be that all external patches no longer apply, and anything depending on the location of the dtb files in the build directory will have to change. The installed files after 'make dtbs_install' keep the current location. There are six added SoCs here that are largely variants of previously added chips. Two other chips are added in a separate branch along with their device drivers. - The Samsung Exynos 4212 makes its return after the Samsung Galaxy Express phone is addded at last. The SoC support was originally added in 2012 but removed again in 2017 as it was unused at the time. - Amlogic C3 is a Cortex-A35 based smart IP camera chip - Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of the still common MSM8916 (Snapdragon 410) phone chip that has been supported for a long time. - Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end laptop chips, used in the Lenovo Flex 5G, which is added along with the reference board. - Qualcomm SDX75 is the latest generation modem chip that is used as a peripherial in phones but can also run a standalone Linux. Unlike the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55. - Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the Xuantie C910 core, a step up from all previously added rv64 chips. All of the above come with reference board implementations, those included there are 39 new board files, but only five more 32-bit this time, probably a new low: - Marantec Maveo board based on dhcor imx6ull module - Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip - Epson Moverio BT-200 AR glasses based on TI OMAP4 - PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM - ICnova ADB4006 board based on Allwinner A20 On the 64-bit side, there are also fewer addded machines than we had in the recent releases: - Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device. - NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234 - Qualcomm gains support for 6 reference boards on various members of their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top of the various reference platforms for their new chips. - Rockchips support for several newer boards: Indiedroid Nova (rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn Fastrhino R66S/R68S (rk3568) - TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex Verdin family with AM62 COM, carrier and dev boards Other changes to existing boards contain the usual minor improvements along with - continued updates to clean up dts files based on dtc warnings and binding checks, in particular cache properties and node names - support for devicetree overlays on at91, bcm283x - significant additions to existing SoC support on mediatek, qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST STM32MP1 As usual, a lot more detail is available in the individual merge commits" * tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits) ARM: mvebu: fix unit address on armada-390-db flash ARM: dts: Move .dts files to vendor sub-directories kbuild: Support flat DTBs install ARM: dts: Add .dts files missing from the build ARM: dts: allwinner: Use quoted #include ARM: dts: lan966x: kontron-d10: add PHY interrupts ARM: dts: lan966x: kontron-d10: fix SPI CS ARM: dts: lan966x: kontron-d10: fix board reset ARM: dts: at91: Enable device-tree overlay support for AT91 boards arm: dts: Enable device-tree overlay support for AT91 boards arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller ARM: dts: at91: use generic name for shutdown controller ARM: dts: BCM5301X: Add cells sizes to PCIe nodes dt-bindings: firmware: brcm,kona-smc: convert to YAML riscv: dts: sort makefile entries by directory riscv: defconfig: enable T-HEAD SoC MAINTAINERS: add entry for T-HEAD RISC-V SoC riscv: dts: thead: add sipeed Lichee Pi 4A board device tree riscv: dts: add initial T-HEAD TH1520 SoC device tree riscv: Add the T-HEAD SoC family Kconfig option ...
* Merge tag 'arm-dts-mv-for-6.5' of ↵Arnd Bergmann2023-06-2122-21/+50
| | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into soc/dt ARM: dts: Move .dts files to vendor sub-directories The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. * tag 'arm-dts-mv-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: ARM: dts: Move .dts files to vendor sub-directories kbuild: Support flat DTBs install ARM: dts: Add .dts files missing from the build ARM: dts: allwinner: Use quoted #include Link: https://lore.kernel.org/r/20230621185025.GA3197738-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: dts: Move .dts files to vendor sub-directoriesRob Herring2023-06-21150-0/+35859
The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
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