summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-at91/pm_slowclock.S
Commit message (Collapse)AuthorAgeFilesLines
* ARM: at91/pm: rename file name: pm_slowclock.S --> pm_suspend.SWenyou Yang2015-03-131-324/+0
| | | | | | | | | | Because the sram function is used for both suspend to memory and the suspend to standby mode, renaming is more elegant. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/pm: standby mode uses same sram function as suspend to memory modeWenyou Yang2015-03-131-1/+24
| | | | | | | | | | | | | To simply the PM code, the suspend to standby mode uses same sram function as the suspend to memory mode, running in the internal SRAM, instead of the respective code for each mode. For the suspend to standby mode, the master clock doesn't switch to the slow clock, and PLLA and the main oscillator doesn't turn off as well. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/pm_slowclock: create the procedure to handle the sdram self-refreshWenyou Yang2015-03-131-105/+139
| | | | | | | | | To decrease the duplicated code, create the procedure to contain both activing and exiting the sdram self-refresh mode. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/pm_slowclock: remove clocks which are already stopped when ↵Sylvain Rochet2015-03-131-31/+0
| | | | | | | | | | | | | | entering slow clock mode Assume USB PLL and PLL B are already stopped before entering sleep mode. Removed PLL B from slow clock code, all drivers are supposed to properly unprepare clocks. Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Acked-by: Wenyou.Yang <wenyou.yang@atmel.com> [nicolas.ferre@atmel.com: remove the warning printed in pm.c] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/pm_slowclock: remove the unused code related with ↵Wenyou Yang2015-03-131-37/+0
| | | | | | | | | | | SLOWDOWN_MASTER_CLOCK The SLOWDOWN_MASTER_CLOCK definition is not used, remove the redundant code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: pm_slowclock: fix the compilation errorWenyou Yang2015-03-111-0/+2
| | | | | | | | | | | | | | When compiling the kernel in thumb2 (CONFIG_THUMB2_KERNEL option activated), we hit a compilation crash. The error message is listed below: ---8< ----- Error: cannot use register index with PC-relative addressing -- `str r0,.saved_lpr' --->8---- Add the .arm directive in the assembly files related to power management. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/pm: MOR register KEY was missingPatrice Vilchez2015-03-051-0/+2
| | | | | | | | | Because writing the MOR register requires the PASSWD(0x37), if missed, the write operation will be aborted. Signed-off-by: Patrice Vilchez <patrice.vilchez@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* pm: at91: Workaround DDRSDRC self-refresh bug with LPDDR1 memories.Peter Rosin2015-03-031-5/+38
| | | | | | | | | | | | | | | The DDRSDR controller fails miserably to put LPDDR1 memories in self-refresh. Force the controller to think it has DDR2 memories during the self-refresh period, as the DDR2 self-refresh spec is equivalent to LPDDR1, and is correctly implemented in the controller. Assume that the second controller has the same fault, but that is untested. Signed-off-by: Peter Rosin <peda@axentia.se> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* pm: at91: pm_slowclock: fix suspend/resume hang up in timeoutsSylvain Rochet2015-03-031-29/+4
| | | | | | | | | | | | | | | Removed timeout on XTAL, PLL lock and Master Clock Ready, hang if something went wrong instead of continuing in unknown condition. There is not much we can do if a PLL lock never ends, we are running in SRAM and we will not be able to connect back the sdram or ddram in order to be able to fire up a message or just panic. As a bonus, not decounting the timeout register in slow clock mode reduce cumulated suspend time and resume time from ~17ms to ~15ms. Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Acked-by: Wenyou.Yang <wenyou.yang@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usageAlexandre Belloni2015-01-261-9/+0
| | | | | | | The SOC_AT91SAM9263 is being removed, stop using it. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: move at91_pmc.h to include/linux/clk/at91_pmc.hBoris BREZILLON2013-12-021-1/+1
| | | | | | | | | | | | | This patch moves at91_pmc.h header from machine specific directory (arch/arm/mach-at91/include/mach/at91_pmc.h) to clk include directory (include/linux/clk/at91_pmc.h). We need this to avoid reference to machine specific headers in clk drivers. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Felipe Balbi <balbi@ti.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core supportJean-Christophe PLAGNIOL-VILLARD2012-04-171-1/+1
| | | | | | | | | | We can now compile all SoC core support together and DT boards. We still can not compile together the non DT board. So We keep the ARCH_AT91xxx for the non DT board and for backward defconfig compatibility. This will enable the plaform_device ressources. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/PMC: make register base soc independentJean-Christophe PLAGNIOL-VILLARD2012-02-231-19/+19
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
* ARM: at91/pm_slowclock: add runtime detection of memory contollerJean-Christophe PLAGNIOL-VILLARD2012-02-231-15/+51
| | | | | | | This will allow to have all SoC in one kernel image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: make sdram/ddr register base soc independentJean-Christophe PLAGNIOL-VILLARD2012-02-231-9/+1
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.hJean-Christophe PLAGNIOL-VILLARD2012-02-231-1/+2
| | | | | | | This cleanup is done to allow to have multiple SoC in the same image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/pm_slowclock: function slow_clock() accepts parametersJean-Christophe PLAGNIOL-VILLARD2012-02-231-32/+9
| | | | | | | | | | | | | | Change slow_clock()/at91_slow_clock() prototype to accept the PMC base address and one or two RAM controller addresses by parameters. The r0, r1 and r2 registers are used differently and preserved during function call. Those values are defined in pm.c and slow_clock() function is called from there with its new parameters. This will allow to have a soc independent pm_slowclock. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Ached-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/pm_slowclock: rename register to named defineJean-Christophe PLAGNIOL-VILLARD2012-02-231-86/+91
| | | | | | | | | This patch will give a name to ARM registers in the assembly source code. It is done to simplify the code reading and the passing of parameters to functions. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: code removal of CAP9 SoCJean-Christophe PLAGNIOL-VILLARD2012-02-031-8/+4
| | | | | | | | Following removal announce and addition to feature-removal-schedule.txt, here is the actual source code deletion for Atmel CAP9 family. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: merge at91cap9_ddrsdr.h in at91sam9_ddrsdr.hJean-Christophe PLAGNIOL-VILLARD2012-01-201-3/+2
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* AT91: pm: make sure that r0 is 0 when dealing with cache operationsNicolas Ferre2010-10-261-0/+1
| | | | | | | When using CP15 cache operations (c7), we make sure that Rd (r0) is actually 0 as ARM 926 TRM is saying. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: 6185/1: AT91: PM: dual ram controller supportNicolas Ferre2010-07-091-20/+54
| | | | | | | | | | | | | | | | | | | This rework allows to address tow memory controllers. AT91SAM9263 and AT91SAM9G45 family have tow SDRAM or DDR/SDRAM controllers. Power management should take care of this. This patch modify the way RAM IP header files are implemented to allow access to registers of both controllers ; it also adds some macros. We also modify the power management files to use those modified header files. Slow clock (assembly) and regular power management functions are synchronized for setting of RAM self-refresh procedure: (lpr & ~AT91_DDRSDRC_LPCB) | AT91_DDRSDRC_LPCB_SELF_REFRESH Note that AT91RM9200 is not impacted by this modification. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 5975/1: AT91 slow-clock suspend: don't wait when turning PLLs offAnders Larsen2010-04-141-4/+0
| | | | | | | | | | | | | | | | | | From: Julien Langer <julien.langer@gmail.com> AT91: when turning off the PLLs during suspend, don't wait for the lock flag to be set. Previously the code would always run into the loop limitation of 1000 iterations because the flag is never set when turning the PLLs off. Comments from Anders Larsen: (in http://marc.info/?l=linux-kernel&m=127058929724193&w=2) Signed-off-by: Julien Langer <julien.langer@gmail.com> Signed-off-by: Anders Larsen <al@alarsen.net> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6043/1: AT91 slow-clock resume: Don't wait for a disabled PLL to lockAnders Larsen2010-04-091-0/+12
| | | | | | | | | | | | | | | | | at91 slow-clock resume: Don't wait for a disabled PLL to lock. We run into this problem with the PLLB on the at91: ohci-at91 disables the PLLB when going to suspend. The slowclock code however tries to do the same: It saves the PLLB register value and when restoring the value during resume, it waits for the PLLB to lock again. However the PLL will never lock and the loop would run into its timeout because the slowclock code just stored and restored an empty register. This fixes the problem by only restoring PLLA/PLLB when they were enabled at suspend time. Cc: Andrew Victor <avictor.za@gmail.com> Signed-off-by: Anders Larsen <al@alarsen.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5264/2: [AT91] Suspend-to-RAM disables main oscillatorAndrew Victor2008-09-211-0/+283
This patch adds support for a low(er)-power suspend-to-RAM. In addition to the SDRAM being put into self-refresh mode, the Master Clock is set to the Slow-clock rate (32Khz) and PLLA & PLLB are disabled. Certain peripherals are therefore also disabled, and thus cannot be used as wakeup sources. This patch has been included in the AT91 patches in various forms since 2.6.19 and a number of people have worked or commented on it, most notably: Savin Zlobec (for the original AT91RM9200 support) Anti Sullin (for the SAM9260 version) David Brownell, etc. Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-22 20:52:52 +0000