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* msm: mmc: Add msm prefix to platform data structureSahitya Tummala2010-08-092-2/+3
| | | | | | | | Rename mmc_platform_data to msm_mmc_platform_data as it is used only by MSM platform. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* msm: trout: Remove extern declaration from source fileSahitya Tummala2010-08-091-0/+3
| | | | | | | | Add msm_add_sdcc() prototype to mach/board.h to fix the checkpatch warning. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* Add GPIO support for HTC Dream.Pavel Machek2010-06-151-0/+7
| | | | | | Signed-off-by: Pavel Machek <pavel@ucw.cz> [dwalker@codeaurora.org: renamed to trout, checkpatch cleanup] Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* Merge branch 'msm-mmc_sdcc' of ↵Linus Torvalds2010-05-211-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://codeaurora.org/quic/kernel/dwalker/linux-msm * 'msm-mmc_sdcc' of git://codeaurora.org/quic/kernel/dwalker/linux-msm: drivers: mmc: msm_sdcc: Add EMBEDDED_SDIO support mmc: msm_sdcc: Fix issue where clocks could be disabled mid transaction mmc: msm_sdcc: Fix the dma exec function to use the proper delays mmc: msm_sdcc: Don't set host->curr.mrq until after we're sure the busclk timer won't fire mmc: msm_sdcc: Enable busclk idle timer for power savings mmc: msm_sdcc: Don't disable interrupts while suspending mmc: msm_sdcc: Fix issue where we might not end a sucessfull request mmc: msm_sdcc: Featurize busclock power save and disable it by default mmc: msm_sdcc: Fix bug where busclk expiry timer was not properly disabled mmc: msm_sdcc: Reduce command timeouts and improve reliability. mmc: msm_sdcc: Schedule clock disable after probe mmc: msm_sdcc: Wrap readl/writel calls with appropriate clk delays mmc: msm_sdcc: Driver clocking/irq improvements msm: Add 'execute' datamover callback mmc: msm_sdcc: Snoop SDIO_CCCR_ABORT register mmc: msm_sdcc: Clean up clock management and add a 10us delay after enabling clocks
| * msm: Add 'execute' datamover callbackSan Mehat2010-03-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on a patch from Brent DeGraaf: "The datamover supports channels which can be shared amongst devices. As a result, the actual data transfer may occur some time after the request is queued up. Some devices such as mmc host controllers will timeout if a command is issued too far in advance of the actual transfer, so if dma to other devices on the same channel is already in progress or queued up, the added delay can cause pending transfers to fail before they start. This change extends the api to allow a user callback to be invoked just before the actual transfer takes place, thus allowing actions directly associated with the dma transfer, such as device commands, to be invoked with precise timing. Without this mechanism, there is no way for a driver to realize this timing. Also adds a user pointer to the command structure for use by the caller to reference information that may be needed by the callback routine for proper identification and processing associated with that specific request. This change is necessary to fix problems associated with excessive command timeouts and race conditions in the mmc driver." This patch also fixes all the callers of msm_dmov_enqueue_cmd() to ensure their callback function is NULL. Signed-off-by: San Mehat <san@google.com> Cc: Brent DeGraaf <bdegraaf@quicinc.com> Cc: Brian Swetland <swetland@google.com> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* | msm: physical offset for MSM7X30Daniel Walker2010-05-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | The MSM7x30 does not have a separate bank of memory for shared memory communication with the radio CPU. Set the kernel base address 2MB in, to use this first 2MB for this purpose. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: io: add io support for 7x30Daniel Walker2010-05-131-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: dma: add 7x30 security domain abstractionDaniel Walker2010-05-131-15/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The MSM SOC's DMA controller contains several security domains. On the MSM7x00, only security domain 3 is accessible to our CPU. The 7x30, however, uses security domain 2. Fix up the register definition macros to select this appropriately, based on configured target. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: add msm_iomap-7x30.h for MSM7x30 supportDaniel Walker2010-05-132-1/+125
| | | | | | | | | | | | | | | | | | | | Add a header describing the io regions for MSM7x30. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: irqs: add irqs-7x30.h for MSM7x30 supportDaniel Walker2010-05-132-1/+173
| | | | | | | | | | | | | | | | Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: physical offset for QSD8x50Daniel Walker2010-05-131-0/+6
| | | | | | | | | | | | | | | | | | | | | | Support different RAM base addresses used by Qualcomm SOCs, with QSD8x50 as the first addtional one. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: io: add io support for 8x50Daniel Walker2010-05-131-0/+3
| | | | | | | | | | | | | | | | Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: add msm_iomap-8x50.h for QSD8x50 supportDaniel Walker2010-05-132-0/+151
| | | | | | | | | | | | | | | | | | | | Add a header describing the io regions for QSD8x50. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: irqs: add irqs-8x50.h for QSD8x50 supportDaniel Walker2010-05-132-1/+109
| | | | | | | | | | | | | | | | Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: add tlmm support for gpio.Gregory Bean2010-05-131-0/+142
| | | | | | | | | | | | | | | | | | | | | | | | GPIO support for Qualcomm SOCs requires interaction with the radio (baseband processor). This API allows the different boards to enable GPIO through the radio processor in a generic way. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: generalize clock support.Daniel Walker2010-05-132-2/+60
| | | | | | | | | | | | | | | | | | | | | | | | The 'PCOM' method of clock control (commands issued to the radio CPU) is shared across several (but not all) Qualcomm SOCs. Generalize this clock mechanism so these other SOCs can be added. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: add sirc interrupt controller driver.Gregory Bean2010-05-131-0/+115
| | | | | | | | | | | | | | | | | | | | | | Scorpion-based SOCs from Qualcomm use a different interrupt controller 'sirc'. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: generialize iomap to support multiple SOCs.Gregory Bean2010-05-132-94/+142
| | | | | | | | | | | | | | | | | | | | | | msm_iomap.h is specific to the MSM7x00 series devices. Generalize this in preparation to support more devices. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | msm: generialize IRQ to support multiple SOCs.Gregory Bean2010-05-132-67/+84
| | | | | | | | | | | | | | | | | | | | | | irqs.h is specific to the MSM7x00 series devices. Generalize this in preparation to support more devices. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
* | arm: msm: video: add msm_fb.hDaniel Walker2010-05-122-6/+147
| | | | | | | | | | | | | | Also drops the old mddi structure, which conflicts with the new file. Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* | arm: msm: smd: checkpatch clean up of smd/proc_commDaniel Walker2010-05-121-2/+3
| | | | | | | | | | | | This cleans up coding style. There are no run time changes. Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* | arm: msm: correctly signal the apps-to-modem irq in smd/proc_commDima Zavin2010-05-121-0/+6
| | | | | | | | | | Signed-off-by: Dima Zavin <dima@android.com> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* | msm: smd: provide atomic channel writesBrian Swetland2010-05-121-0/+1
| | | | | | | | | | | | | | | | | | | | Some smd clients may write from multiple threads, in which case it's not safe to call smd_write without holding a lock. smd_write_atomic() provides the same functionality as smd_write() but obtains the smd lock first. Signed-off-by: Brian Swetland <swetland@google.com> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* | [ARM] msm: shared memory interface for baseband processor ipcBrian Swetland2010-05-122-0/+112
| | | | | | | | | | | | | | | | | | This code provides the low level interface to the "shared memory state machine" (smsm), and the virtual serial channels (smd), used to communicate with the baseband processor. Higher level transports (rpc, ethernet, AT command channel, etc) ride on top of this. Signed-off-by: Brian Swetland <swetland@google.com>
* | arm: msm: status for vregSteve Muckle2010-05-121-1/+1
| | | | | | | | | | | | | | Keep track of the success/failure of the last vreg proc comm command, and return that on debugfs reads. Signed-off-by: Steve Muckle <smuckle@quicinc.com>
* | arm: msm: add cpu frequency controlsDaniel Walker2010-05-121-0/+11
| | | | | | | | | | | | | | | | | | | | This adds acpuclock-arm11.c from Google. This provides control over the cpu frequency for arm11 cpu's. This has shared authorship between Google, and Qualcomm. Most of it was written by Mike Chan at Google. Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* | ARM: 5910/1: ARM: Add tmp register for addruart and loadspTony Lindgren2010-02-121-2/+2
|/ | | | | | | | | | | | | | Otherwise more complicated uart configuration won't be possible. We can use r1 for tmp register for both head.S and debug.S. NOTE: This patch depends on another patch to add the the tmp register into all debug-macro.S files. That can be done with: $ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/" arch/arm/*/include/*/debug-macro.S Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* HTC Dream: mmc compilation fixesPavel Machek2009-12-101-0/+26
| | | | | | | | | Add missing include for msm_sdcc compilation, and remove pwrsink support that is not mainline, yet. Signed-off-by: Pavel Machek <pavel@ucw.cz> [dwalker@codeaurora.org : fixed indent in mmc.h] Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* msm: make debugging UART (for DEBUG_LL) configurablePavel Machek2009-11-203-7/+36
| | | | | | | | | | Provides options to select one of the three "lowspeed" UARTs on MSM7k SoCs for DEBUG_LL output from the zImage decompressor and kernel. Signed-off-by: Brian Swetland <swetland@google.com> Signed-off-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
* [ARM] pass reboot command line to arch_reset()Russell King2009-03-191-1/+1
| | | | | | | | | | | | | | | OMAP wishes to pass state to the boot loader upon reboot in order to instruct it whether to wait for USB-based reflashing or not. There is already a facility to do this via the reboot() syscall, except we ignore the string passed to machine_restart(). This patch fixes things to pass this string to arch_reset(). This means that we keep the reboot mode limited to telling the kernel _how_ to perform the reboot which should be independent of what we request the boot loader to do. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Add a common typesafe __io implementationRussell King2008-11-301-5/+1
| | | | | | | | As Al did for Versatile in 2ad4f86b60b649fd7428265c08d73a3bd360c81b, add a typesafe __io implementation for platforms to use. Convert platforms to use this new simple typesafe implementation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] remove a common set of __virt_to_bus definitionsNicolas Pitre2008-11-281-4/+0
| | | | | | | | | | | | | | | | Let's provide an overridable default instead of having every machine class define __virt_to_bus and __bus_to_virt to the same thing. What most platforms are using is bus_addr == phys_addr so such is the default. One exception is ebsa110 which has no DMA what so ever, so the actual definition is not important except only for proper compilation. Also added a comment about the special footbridge bus translation. Let's also remove comments alluding to set_dma_addr which is not (and should not) be commonly used. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] msm: vreg interface to msm7k pmicBrian Swetland2008-10-221-0/+29
| | | | | | | | The baseband cpu owns the pmic, so voltage regulator control is only available via a relatively limited interface through the proc_comm transport. Signed-off-by: Brian Swetland <swetland@google.com>
* [ARM] msm: dma: various basic dma improvements and bugfixesBrian Swetland2008-10-221-5/+19
| | | | | | | | | | | | | | | | San: - Propagate DM errors to the originator of the request. - Implement msm_dmov_stop_cmd() - Add return value to init code - Modify msm_dmov_stop_cmd() to support ungraceful flushing Arve: - Disable datamover interrupt when not in use. We turn off the interrrupt to allow power collapse from idle. Signed-off-by: San Mehat <san@android.com> Signed-off-by: Arve Hjønnevåg <arve@android.com> Signed-off-by: Brian Swetland <swetland@google.com>
* [ARM] msm: clock: provide clk_*() api support forBrian Swetland2008-10-221-0/+1
| | | | | | | Makes use of the proc_comm interface to provide clock control on MSM7X01A family SoCs. Signed-off-by: Brian Swetland <swetland@google.com>
* [ARM] msm: clean up iomap and devicesBrian Swetland2008-10-222-28/+49
| | | | | | | | | | | | | - Add some more peripherals (sdcc, etc) to the iomap. - Remove virtual base addresses for devices that we should be passing physical addresses to drivers via resources and ioremap()ing. - don't try to use uarts for ll debug once the mmu is enabled due to problems with the peripheral window - make base addresses void __iomem * and fixup irq.c and timer.c - Remove common.c and bring in devices.c/devices.h similar to the PXA architecture. Signed-off-by: Brian Swetland <swetland@google.com>
* [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King2008-08-0713-0/+640
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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