| Commit message (Collapse) | Author | Age | Files | Lines |
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The MTP is a "mobile reference device", as such the default operation is
to use fastboot to boot/flash software onto it and the common case is
thereby that we boot with a USB cable connected downstream from a PC or
a hub. And without support for the PMI8998 charger block VBUS will not
be driven by the device.
Switch to peripheral until we can enable OTG.
Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Add the Audio DSP (ADSP) and Compute DSP (CDSP) nodes for TrustZone
based remoteproc, supporting booting these cores on e.g. the MTP, and
enable the same for the MTP.
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Add device node for the ath10k SNOC platform driver probe
and add resources required for WCN3990 on SDM845 soc.
Reviewed-by: Brian Norris <briannorris@chromium.org>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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This adds the low pass audio clock controller node to sdm845 based on
the example in the bindings.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
[bjorn: Disabled lpasscc node, as it's normally protected]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Enable the UFS host controller and PHY on sdm845-mtp.
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Enable support for one of the micro SD slots on the MTP.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Stephen Boyd:
"A few clk driver fixes this time:
- Introduce protected-clock DT binding to fix breakage on qcom
sdm845-mtp boards where the qspi clks introduced this merge window
cause the firmware on those boards to take down the system if we
try to read the clk registers
- Fix a couple off-by-one errors found by Dan Carpenter
- Handle failure in zynq fixed factor clk driver to avoid using
uninitialized data"
* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: zynqmp: Off by one in zynqmp_is_valid_clock()
clk: mmp: Off by one in mmp_clk_add()
clk: mvebu: Off by one bugs in cp110_of_clk_get()
arm64: dts: qcom: sdm845-mtp: Mark protected gcc clocks
clk: qcom: Support 'protected-clocks' property
dt-bindings: clk: Introduce 'protected-clocks' property
clk: zynqmp: handle fixed factor param query error
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As of v4.20-rc1 probing the GCC driver on a SDM845 device with the
standard security implementation causes an access violation and an
immediate system restart. Use the protected-clocks property to mark the
offending clocks protected for the MTP, in order to allow it to boot.
Cc: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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With the introduction of commit 3edfb7bd76bd ("gpiolib: Show correct
direction from the beginning") the gpiolib will attempt to read the
direction of all pins, which triggers a read from protected register
regions.
The pins 0 through 3 and 81 through 84 are protected, so mark these as
reserved.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Set the various nodes to "okay" and hook up the regulators.
NOTE: For now the main USB port (the one that goes out the Type C
connector) is forced to host. Eventually someone will need to get the
Type C detection hooked up and get this all integrated with the
PMI8998 PMIC. The reason for forcing to "host" in the meantime is
that this will leave us with one "host" and one "peripheral" port.
In order for host mode this to work, we assume that the bootloader
left things configured enough for us. Apparently the magic for that
is is to do these writes on pmi8998:
- pm_comm_write_byte(2, 0x1153, 0x2C, 0);
- pm_comm_write_byte(2, 0x1152, 0x07, 0);
- pm_comm_write_byte(2, 0x1140, 0x00, 0);
- pm_comm_write_byte(2, 0x1140, 0x01, 0);
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add regulator devices for PMIC regulators managed via VRM and XOB
RPMh accelerators.
A few notes here:
- Regulators are added directly to the board file. While it's true
that this will mean a bunch of copy/pasting for other boards that
are very similar, this is probably the right call since boards
could make changes to the way these regulators are hooked up and
trying to find a way to avoid duplication will result in some
confusing node overrides.
- Regulators that are hooked up to supply pins on the SoC are given
an alias matching the name of that pin (pin name comes from the
Qualcomm SoC "device specification" doc).
- Other regulator labels are based on the schematic. If there is
more than one logical name on the schematic for the same rail the
secondary names are also listed and should be referred to as
appropriate.
- Regulators all default to HPM mode w/ no ability to switch modes.
Future patches can switch things to LPM and possibly add
dynamic load switching if we have determined there's a benefit.
This should only be done for rails where we'll actually be able
to take advantage of the lower power modes so we don't need to
churn with lots of patches adding regulator_set_load() calls
to drivers.
NOTE: This patch is loosely based on one originally shared to me by
David Collins.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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The debug UART is very useful to have. I2C10 is enabled as an example
of a I2C port we can talk on for now. Eventually we'll want to put
peripherals under it.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add a skeletal sdm845 SoC dtsi and MTP board dts/dtsi files
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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