summaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/xilinx
Commit message (Collapse)AuthorAgeFilesLines
...
* Merge branch 'dt/irq-fix' into next/dt64Arnd Bergmann2016-09-141-4/+4
|\ | | | | | | | | | | | | | | * dt/irq-fix: arm64: dts: Fix broken architected timer interrupt trigger This resolves a non-obvious conflict between a bugfix from v4.8 and a cleanup for the exynos7 platform.
| * arm64: dts: Fix broken architected timer interrupt triggerMarc Zyngier2016-09-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number of DTs are being remarkably creative, declaring the interrupt to be edge triggered. A quick look at the TRM for the corresponding ARM CPUs clearly shows that this is wrong, and I've corrected those. For non-ARM designs (and in the absence of a publicly available TRM), I've made them active low as well, which can't be completely wrong as the GIC cannot disinguish between level low and level high. The respective maintainers are of course welcome to prove me wrong. While I was at it, I took the liberty to fix a couple of related issue, such as some spurious affinity bits on ThunderX, and their complete absence on ls1043a (both of which seem to be related to copy-pasting from other DTs). Acked-by: Duc Dang <dhdang@apm.com> Acked-by: Carlo Caione <carlo@endlessm.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | ARM64: zynqmp: Correct the watchdog timer interrupt numberPunnaiah Choudary Kalluri2016-08-191-1/+1
| | | | | | | | | | | | | | | | Corrected the watchdog timer interrupt number. Origin value was for CSUPMU watchdog. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM64: zynqmp: Add missing interrupt-parent to PMU nodeMichal Simek2016-08-191-0/+1
| | | | | | | | | | | | | | | | | | ZynqMP is not using global interrupt-parent setting that's why it has to be listed in every node separately. PMU node missed it and this patch is adding it. Reported-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM64: zynqmp: Add PCIe nodeMichal Simek2016-08-191-0/+39
| | | | | | | | | | | | | | Add PCIe node with prefetchable memory which goes beyond 4GB. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM64: zynqmp: Use 64bit size cell formatMichal Simek2016-08-192-28/+28
| | | | | | | | | | | | | | Use 64bit size cell format instead of 32bit for memory description. Change 64bit sizes also for all others IPs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM64: zynqmp: Align gic ranges for 64k in device treeAlexander Graf2016-08-191-2/+2
|/ | | | | | | | | | | | | The GIC ranges in the zynqmp device tree are only 4kb aligned. Since commit 12e14066f we automatically deal with aliases GIC regions though, so we can map them transparently into guests even on 64kb page size systems. This patch makes use of that features and sets GICC and GICV to 64kb aligned and sized regions. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Extract clock information from EP108Michal Simek2016-02-253-42/+90
| | | | | | | Extract clocks and put it specific file to help with platform autogeneration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Keep gpio node alphabetically sortedMichal Simek2016-02-251-12/+12
| | | | | | No functional change. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: DT: Add interrupt-controller property to GPIOSoren Brinkmann2015-12-141-0/+2
| | | | | | | | GPIO can be used as interrupt-controller. Add the missing properties to the GPIO node. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Move SPI nodes to the right locationMichal Simek2015-07-311-24/+24
| | | | | | Keep nodes sorted. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Move uart and ttcs to the right locationMichal Simek2015-07-311-60/+60
| | | | | | Sort nodes in DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Enable spi flashes on ep108Michal Simek2015-07-311-0/+34
| | | | | | Enable spi flashes on ep108. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add eeprom memories on i2c busMichal Simek2015-07-311-0/+18
| | | | | | | Add i2c eeprom memories on i2c bus. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com>
* ARM64: zynqmp: Enable sdhci on ep108Michal Simek2015-07-311-0/+8
| | | | | | Enable both sdhcis on ep108. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Enable watchdog on ep108Michal Simek2015-07-311-0/+4
| | | | | | Enable watchdog on ep108. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add DWC3 usb supportMichal Simek2015-07-312-0/+32
| | | | | | Add usb nodes to DTSI and enable both of them on ep108. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add SMMU supportMichal Simek2015-07-311-0/+12
| | | | | | Add SMMU DT node to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add CANs node for platformMichal Simek2015-07-312-0/+28
| | | | | | Also enable can0 for ep108. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Use zynqmp specific compatible string for gpioMichal Simek2015-07-312-1/+5
| | | | | | | | | | | The patch: "gpio: Added support to Zynq Ultrascale+ MPSoC" (sha1: bdf7a4ae371894b4dc10b5820006b0a82d484929) added zynqmp specific features. This patch is switching the driver to use the zynqmp compatible string. Also enable the driver for ep108 platform. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* devicetree: xilinx: zynqmp: add sata nodeSuneel Garapati2015-07-312-0/+20
| | | | | | | | add sata node with sata fixed clock nodes in dtsi file. enable sata in zynqmp-ep108.dts with broken-gen2. Signed-off-by: Suneel Garapati <suneel.garapati@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: Add new Xilinx ZynqMP SoCMichal Simek2015-03-113-0/+357
Initial version of device tree for Xilinx ZynqMP SoC. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-04 00:00:51 +0000