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path: root/arch/arm64/include/asm/cache.h
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* kasan, arm64: remove redundant ARCH_SLAB_MINALIGN defineAndrey Konovalov2019-01-161-2/+0
* kasan, arm64: use ARCH_SLAB_MINALIGN instead of manual aligningAndrey Konovalov2019-01-081-0/+6
* arm64: cpufeature: Fix handling of CTR_EL0.IDC fieldSuzuki K Poulose2018-10-161-0/+40
* arm64: Fix mismatched cache line size detectionSuzuki K Poulose2018-07-051-0/+4
* arm64: Increase ARCH_DMA_MINALIGN to 128Catalin Marinas2018-05-151-2/+2
* Revert "arm64: Increase the max granular size"Catalin Marinas2018-05-111-1/+1
* Revert "arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size)"Will Deacon2018-03-271-3/+3
* arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDCShanker Donthineni2018-03-091-0/+4
* arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size)Catalin Marinas2018-03-061-3/+3
* arm64: cache: Identify VPIPT I-cachesWill Deacon2017-03-201-0/+7
* arm64: cache: Merge cachetype.h into cache.hWill Deacon2017-03-201-1/+30
* arm64: Increase the max granular sizeTirumalesh Chalamarla2015-10-281-1/+1
* arm64: Implement support for read-mostly sectionsJungseok Lee2014-12-031-0/+2
* arm64: Implement cache_line_size() based on CTR_EL0.CWGCatalin Marinas2014-05-091-1/+12
* arm64: Cache maintenance routinesCatalin Marinas2012-09-171-0/+32