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path: root/arch/arm64/include/asm/sysreg.h
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* | arm64/sysreg: Convert CTR_EL0 to automatic generationMark Brown2022-07-051-16/+0
* | arm64/sysreg: Add _EL1 into ID_AA64ISAR2_EL1 definition namesMark Brown2022-07-051-17/+17
* | arm64/sysreg: Add _EL1 into ID_AA64ISAR1_EL1 definition namesMark Brown2022-07-051-31/+31
* | arm64/sysreg: Remove defines for RPRES enumerationMark Brown2022-07-051-2/+0
* | arm64/sysreg: Standardise naming for ID_AA64ZFR0_EL1 fieldsMark Brown2022-07-051-20/+20
* | arm64/sysreg: Standardise naming for ID_AA64SMFR0_EL1 enumsMark Brown2022-07-051-15/+15
* | arm64/sysreg: Standardise naming for WFxT definesMark Brown2022-07-051-3/+3
* | arm64/sysreg: Make BHB clear feature defines match the architectureMark Brown2022-07-051-1/+1
* | arm64/sysreg: Align pointer auth enumeration defines with architectureMark Brown2022-07-051-17/+17
* | arm64/mte: Standardise GMID field name definitionsMark Brown2022-07-051-2/+2
* | arm64/sysreg: Standardise naming for DCZID_EL0 field namesMark Brown2022-07-051-2/+2
* | arm64/sysreg: Standardise naming for CTR_EL0 fieldsMark Brown2022-07-051-0/+15
* | arm64/sysreg: Add SYS_FIELD_GET() helperMark Brown2022-07-051-0/+3
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* arm64/sme: Fix tests for 0b1111 value ID registersMark Brown2022-06-081-2/+2
* arm64/sysreg: Generate definitions for FAR_ELxMark Brown2022-05-201-3/+0
* arm64/sysreg: Generate definitions for DACR32_EL2Mark Brown2022-05-201-1/+0
* arm64/sysreg: Generate definitions for CSSELR_EL1Mark Brown2022-05-201-2/+0
* arm64/sysreg: Generate definitions for CPACR_ELxMark Brown2022-05-201-2/+0
* arm64/sysreg: Generate definitions for CONTEXTIDR_ELxMark Brown2022-05-201-2/+0
* arm64/sysreg: Generate definitions for CLIDR_EL1Mark Brown2022-05-201-1/+0
* arm64/sve: Generate ZCR definitionsMark Brown2022-05-161-7/+0
* arm64/sme: Generate defintions for SVCRMark Brown2022-05-161-4/+0
* arm64/sme: Generate SMPRI_EL1 definitionsMark Brown2022-05-161-3/+0
* arm64/sme: Automatically generate SMPRIMAP_EL2 definitionsMark Brown2022-05-161-1/+0
* arm64/sme: Automatically generate SMIDR_EL1 definesMark Brown2022-05-161-1/+0
* arm64/sme: Automatically generate defines for SMCRMark Brown2022-05-161-10/+0
* arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.hMark Brown2022-05-161-3/+3
* arm64/sme: Standardise bitfield names for SVCRMark Brown2022-05-161-2/+2
* arm64/sme: Drop SYS_ from SMIDR_EL1 definesMark Brown2022-05-161-3/+3
* arm64/fp: Rename SVE and SME LEN field name to _WIDTHMark Brown2022-05-161-2/+2
* arm64/fp: Make SVE and SME length register definition match architectureMark Brown2022-05-161-14/+4
* Merge branch 'for-next/sme' into for-next/sysreg-genCatalin Marinas2022-05-161-0/+67
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| * arm64/sme: System register and exception syndrome definitionsMark Brown2022-04-221-0/+67
* | arm64/sysreg: Generate definitions for SCTLR_EL1Mark Brown2022-05-041-38/+0
* | arm64/sysreg: Generate definitions for TTBRn_EL1Mark Brown2022-05-041-2/+0
* | arm64/sysreg: Generate definitions for ID_AA64ISAR0_EL1Mark Brown2022-05-041-20/+0
* | arm64/sysreg: Enable automatic generation of system register definitionsMark Brown2022-05-041-0/+8
* | arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro namesMark Brown2022-05-041-17/+17
* | arm64: Update name of ID_AA64ISAR0_EL1_ATOMIC to reflect ARMMark Brown2022-05-041-1/+1
* | arm64/sysreg: Define bits for previously RES1 fields in SCTLR_EL1Mark Brown2022-05-041-21/+32
* | arm64/sysreg: Rename SCTLR_EL1_NTWE/TWI to SCTLR_EL1_nTWE/TWIMark Brown2022-05-041-3/+3
* | arm64/mte: Make TCF field values and naming more standardMark Brown2022-05-041-7/+7
* | arm64/mte: Make TCF0 naming and field values more standardMark Brown2022-05-041-4/+4
* | arm64/sysreg: Introduce helpers for access to sysreg fieldsMark Brown2022-05-041-0/+6
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* Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2022-03-241-0/+8
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| * KVM: arm64: Allow guest to set the OSLK bitOliver Upton2022-02-081-0/+3
| * KVM: arm64: Stash OSLSR_EL1 in the cpu contextOliver Upton2022-02-081-0/+5
* | Merge branch 'for-next/spectre-bhb' into for-next/coreWill Deacon2022-03-141-0/+2
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| * | arm64: Use the clearbhb instruction in mitigationsJames Morse2022-02-241-0/+1
| * | arm64: Mitigate spectre style branch history side channelsJames Morse2022-02-241-0/+1
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