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path: root/arch/arm64/include/asm/sysreg.h
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* | arm64: Enable data independent timing (DIT) in the kernelArd Biesheuvel2022-11-081-4/+8
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* Merge tag 'char-misc-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds2022-10-081-0/+1
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| * Merge tag 'coresight-next-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/...Greg Kroah-Hartman2022-09-211-0/+1
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| | * coresight: etm4x: Expose default timestamp source in sysfsGerman Gomez2022-08-261-0/+1
* | | arm64/sysreg: Convert ID_AA64AFRn_EL1 to automatic generationMark Brown2022-09-161-3/+0
* | | arm64/sysreg: Convert ID_AA64DFR1_EL1 to automatic generationMark Brown2022-09-161-2/+0
* | | arm64/sysreg: Convert ID_AA64FDR0_EL1 to automatic generationMark Brown2022-09-161-24/+0
* | | arm64/sysreg: Use feature numbering for PMU and SPE revisionsMark Brown2022-09-161-7/+7
* | | arm64/sysreg: Add _EL1 into ID_AA64DFR0_EL1 definition namesMark Brown2022-09-161-21/+21
* | | arm64/sysreg: Align field names in ID_AA64DFR0_EL1 with architectureMark Brown2022-09-161-20/+20
* | | arm64/sysreg: Convert SCXTNUM_EL1 to automatic generationMark Brown2022-09-091-2/+0
* | | arm64/sysreg: Convert TIPDR_EL1 to automatic generationMark Brown2022-09-091-2/+0
* | | arm64/sysreg: Convert ID_AA64PFR1_EL1 to automatic generationMark Brown2022-09-091-21/+0
* | | arm64/sysreg: Convert ID_AA64PFR0_EL1 to automatic generationMark Brown2022-09-091-24/+0
* | | arm64/sysreg: Convert ID_AA64MMFR2_EL1 to automatic generationMark Brown2022-09-091-19/+0
* | | arm64/sysreg: Convert ID_AA64MMFR1_EL1 to automatic generationKristina Martsenko2022-09-091-23/+0
* | | arm64/sysreg: Convert ID_AA64MMFR0_EL1 to automatic generationMark Brown2022-09-091-30/+0
* | | arm64/sysreg: Convert HCRX_EL2 to automatic generationMark Brown2022-09-091-4/+0
* | | arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 SME enumerationMark Brown2022-09-091-1/+1
* | | arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 BTI enumerationMark Brown2022-09-091-1/+1
* | | arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 fractional version fieldsMark Brown2022-09-091-2/+2
* | | arm64/sysreg: Standardise naming for MTE feature enumerationMark Brown2022-09-091-3/+3
* | | arm64/sysreg: Standardise naming for SSBS feature enumerationMark Brown2022-09-091-5/+5
* | | arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1.AdvSIMD constantsMark Brown2022-09-091-2/+2
* | | arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1 constantsMark Brown2022-09-091-5/+4
* | | arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.CnPMark Brown2022-09-091-1/+1
* | | arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.VARangeMark Brown2022-09-091-1/+1
* | | arm64/sysreg: Standardise naming for ID_AA64MMFR1_EL1 fieldsKristina Martsenko2022-09-091-20/+20
* | | arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.ASIDBitsMark Brown2022-09-091-3/+3
* | | arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.BigEndMark Brown2022-09-091-1/+1
* | | arm64/sysreg: Add _EL1 into ID_AA64PFR1_EL1 constant namesMark Brown2022-09-091-17/+17
* | | arm64/sysreg: Add _EL1 into ID_AA64PFR0_EL1 definition namesMark Brown2022-09-091-26/+26
* | | arm64/sysreg: Add _EL1 into ID_AA64MMFR2_EL1 definition namesMark Brown2022-09-091-15/+15
* | | arm64/sysreg: Add _EL1 into ID_AA64MMFR0_EL1 definition namesMark Brown2022-09-091-53/+53
* | | arm64/sysreg: Remove stray SMIDR_EL1 definesMark Brown2022-09-091-4/+0
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* | arm64/sysreg: Guard SYS_FIELD_ macros for asmMark Brown2022-08-231-2/+2
* | arm64/sysreg: Directly include bitfield.hMark Brown2022-08-231-0/+1
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* Merge branch 'for-next/cpufeature' into for-next/coreWill Deacon2022-07-251-0/+4
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| * arm64: trap implementation defined functionality in userspaceKristina Martsenko2022-06-231-0/+4
* | arm64/sysreg: Convert ID_AA64ZFR0_EL1 to automatic generationMark Brown2022-07-051-23/+0
* | arm64/sysreg: Convert ID_AA64SMFR0_EL1 to automatic generationMark Brown2022-07-051-18/+0
* | arm64/sysreg: Convert LORID_EL1 to automatic generationMark Brown2022-07-051-2/+0
* | arm64/sysreg: Convert LORC_EL1 to automatic generationMark Brown2022-07-051-1/+0
* | arm64/sysreg: Convert LORN_EL1 to automatic generationMark Brown2022-07-051-1/+0
* | arm64/sysreg: Convert LOREA_EL1 to automatic generationMark Brown2022-07-051-1/+0
* | arm64/sysreg: Convert LORSA_EL1 to automatic generationMark Brown2022-07-051-1/+0
* | arm64/sysreg: Convert ID_AA64ISAR2_EL1 to automatic generationMark Brown2022-07-051-27/+0
* | arm64/sysreg: Convert ID_AA64ISAR1_EL1 to automatic generationMark Brown2022-07-051-34/+0
* | arm64/sysreg: Convert GMID to automatic generationMark Brown2022-07-051-1/+0
* | arm64/sysreg: Convert DCZID_EL0 to automatic generationMark Brown2022-07-051-5/+0
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-23 21:44:29 +0000