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* Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds2019-05-061-1/+4
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| * arm64: mm: enable per pmd page table lockYu Zhao2019-04-091-1/+4
* | asm-generic/tlb, arch: Provide generic tlb_flush() based on flush_tlb_range()Peter Zijlstra2019-04-031-0/+1
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* arm64: tlb: Avoid synchronous TLBIs when freeing page tablesWill Deacon2018-09-111-3/+0
* arm64: tlb: Adjust stride and type of TLBI according to mmu_gatherWill Deacon2018-09-111-9/+10
* arm64: tlb: Remove redundant !CONFIG_HAVE_RCU_TABLE_FREE codeWill Deacon2018-09-111-9/+3
* arm64: tlbflush: Allow stride to be specified for __flush_tlb_range()Will Deacon2018-09-111-1/+1
* arm64: tlb: Provide forward declaration of tlb_flush() before including tlb.hWill Deacon2018-08-231-0/+2
* mm: do not initialize TLB stack vma's with vma_init()Linus Torvalds2018-08-011-3/+1
* mm: use vma_init() to initialize VMAs on stack and data segmentsKirill A. Shutemov2018-07-261-1/+3
* arm64: tlbflush: avoid flushing when fullmm == 1Will Deacon2015-10-071-11/+15
* arm64: Use last level TLBI for user pte changesCatalin Marinas2015-07-281-1/+6
* arm64: expose number of page table levels on Kconfig levelKirill A. Shutemov2015-04-141-2/+2
* arm64: Invalidate the TLB corresponding to intermediate page table levelsCatalin Marinas2015-03-141-0/+3
* mmu_gather: move minimal range calculations into generic codeWill Deacon2014-11-171-64/+3
* arm64: mm: enable HAVE_RCU_TABLE_FREE logicSteve Capper2014-10-091-3/+17
* arm64: Convert bool ARM64_x_LEVELS to int ARM64_PGTABLE_LEVELSCatalin Marinas2014-07-231-2/+2
* arm64: mm: Implement 4 levels of translation tablesJungseok Lee2014-07-231-0/+9
* arm64: Introduce VA_BITS and translation level optionsJungseok Lee2014-07-231-1/+1
* arm64: mm: Add THP TLB entries to general mmu_gatherSteve Capper2014-04-251-0/+6
* arm64: Convert asm/tlb.h to generic mmu_gatherCatalin Marinas2014-02-261-116/+20
* Fix TLB gather virtual address range invalidation corner casesLinus Torvalds2013-08-161-2/+5
* ARM64: mm: THP support.Steve Capper2013-06-141-0/+6
* arm64: TLB maintenance functionalityCatalin Marinas2012-09-171-0/+190