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* OMAP: clockdomain: split clkdm_init()Paul Walmsley2011-09-144-34/+121
| | | | | | | | | | | | | | | | | | | | | | | | | In preparation for OMAP_CHIP() removal, split clkdm_init() into four functions. This allows some of them to be called multiple times: for example, clkdm_register_clkdms() can be called once to register clockdomains that are common to a group of SoCs, and once to register clockdomains that are specific to a single SoC. The appropriate order to call these functions - which is enforced by the code - is: 1. clkdm_register_platform_funcs() 2. clkdm_register_clkdms() (can be called multiple times) 3. clkdm_register_autodeps() (optional; deprecated) 4. clkdm_complete_init() Convert the OMAP2, 3, and 4 clockdomain init code to use these new functions. While here, improve documentation, and increase CodingStyle conformance by shortening some local variable names. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP2+: id: remove OMAP_REVBITS_* macrosPaul Walmsley2011-09-141-23/+10
| | | | | | | | | The OMAP_REVBITS_* macros are just used as otherwise meaningless aliases for the numbers zero through five, so remove these macros. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* OMAP3: id: remove duplicate code for testing SoC ES levelPaul Walmsley2011-09-141-57/+23
| | | | | | | | | | | | omap3_cpuinfo() contains essentially duplicated code from omap3_check_revision(), just for the purpose of determining the chip ES level. Set the cpu_rev char array pointer in omap3_check_revision() instead, and drop the now-useless code from omap3_cpuinfo(). Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* OMAP3: id: add fallthrough warning; fix some CodingStyle issuesPaul Walmsley2011-09-141-5/+6
| | | | | | | | | | | | | | | | Emit a warning to the console in omap3_check_revision() if that code cannot determine what type of SoC the system is currently running on. Remove some extra whitespace, remove some duplicate code, and add an appropriate comment to a fallthrough case. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Hemant Pedanekar <hemantp@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levelsPaul Walmsley2011-09-142-2/+11
| | | | | | | | | | | Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest of the OMAP2+ SoCs do in mach-omap2/cpu.c. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* OMAP3: id: remove useless strcpy()sPaul Walmsley2011-09-141-26/+22
| | | | | | | | | omap3_cpuinfo() is filled with useless strcpy() calls; remove them. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* OMAP3: id: remove identification codes that only correspond to marketing namesPaul Walmsley2011-09-133-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | The OMAP3505/AM3505 appears to be based on the same silicon as the OMAP3517/AM3517, with some features disabled via eFuse bits. Follow the same practice as OMAP3430 and identify these devices internally as part of the OMAP3517/AM3517 family. The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon as the OMAP3430, with some features disabled via eFuse bits. Identify these devices internally as part of the OMAP3430 family. Remove the old OMAP35XX_CLASS, which actually covered two very different chip families. The OMAP3503/3515/3525/3530 chips will now be covered by OMAP343X_CLASS, since the silicon appears to be identical. For the OMAP3517/AM3517 family, create a new class, OMAP3517_CLASS. Thanks to Tony Lindgren <tony@atomide.com> for some help with the second revision of this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Cc: Tony Lindgren <tony@atomide.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
*-----. Merge branches 'non_hwmod_compliant_fix_3.1rc', 'omap3_clock_fixes_3.1rc', ↵Paul Walmsley2011-09-0411-13/+30
|\ \ \ \ | | | | | | | | | | | | | | | 'omap4_clock_fixes_3.1rc', 'missing_2430_musb_adds_terminator_fix_3.1rc' and 'pwrdm_clkdm_fixes_3.1rc' into prcm-fixes-a-3.1rc
| | | | * OMAP: clockdomain: Wait for powerdomain to be ON when using clockdomain ↵Santosh Shilimkar2011-08-192-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | force wakeup While using clockdomain force wakeup method, not waiting for powerdomain to be effectively ON may end up locking the clockdomain FSM until a next wakeup event occurs. One such issue was seen on OMAP4430, where L4_PER was periodically getting stuck in in-transition state when transitioning from from OSWR to ON. This issue was reported and investigated by Patrick Titiano <p-titiano@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reported-by: Patrick Titiano <p-titiano@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> [paul@pwsan.com: updated to apply; added transition wait on clkdm_deny_idle(); remove two superfluous pwrdm_wait_transition() calls] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | | * OMAP: powerdomains: Make all powerdomain target states as ON at initRajendra Nayak2011-08-191-9/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Program all powerdomain target state as ON; this is to prevent domains from hitting low power states (if bootloader has target states set to something other than ON) and potentially even losing context while PM is not fully initialized, which can cause the system to crash. The PM late init code can then program the desired target state for all the power domains. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [paul@pwsan.com: dropped comment typo hunk; fixed comment indent and moved to kerneldoc; moved code to pwrdm_init(); changed pwrdm_init() argument name to prevent clash; cleaned up patch description] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | * | OMAP2430: hwmod: musb: add missing terminator to omap2430_usbhsotg_addrs[]Paul Walmsley2011-09-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a missing array terminator to omap2430_usbhsotg_addrs[]. Without this terminator, the omap_hwmod resource building code runs off the end of the array, resulting in at least this error -- if not worse behavior: [ 0.578002] musb-omap2430: failed to claim resource 4 [ 0.583465] omap_device: musb-omap2430: build failed (-16) [ 0.589294] Could not build omap_device for musb-omap2430 usb_otg_hs This should have been part of commit 78183f3fdf76f422431a81852468be01b36db325 ("omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays") but was evidently missed. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | * | Merge branch 'pm-fixes' of ↵Linus Torvalds2011-08-284-1/+6
| | | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm * 'pm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: ARM: mach-shmobile: sh7372 LCDC1 suspend fix V2 (incremental) OMAP: omap_device: only override _noirq methods, not normal suspend/resume PM / Runtime: Correct documentation of pm_runtime_irq_safe() ARM: mach-shmobile: sh7372 LCDC1 suspend fix sh-sci / PM: Use power.irq_safe PM: Use spinlock instead of mutex in clock management functions
| | | | * | ARM: mach-shmobile: sh7372 LCDC1 suspend fix V2 (incremental)Magnus Damm2011-08-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the recently submitted "Associate the HDMI clock together with LCDC1 on sh7372" to V2 with the following change: - Use lcdc1_device on AP4EVB to build properly. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| | | | * | OMAP: omap_device: only override _noirq methods, not normal suspend/resumeKevin Hilman2011-08-251-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c03f007a8bf0e092caeb6856a5c8a850df10b974 (OMAP: PM: omap_device: add system PM methods for PM domain handling) mistakenly used SET_SYSTEM_SLEEP_PM_OPS() when trying to configure custom methods for the PM domains noirq methods. Fix that by setting only the suspend_noirq and resume_noirq methods with custom versions. Note that all other PM domain methods (including the "normal" suspend/resume methods) are populated using USE_PLATFORM_PM_SLEEP_OPS, which configures them all to the default subsystem (platform_bus) methods. Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| | | | * | ARM: mach-shmobile: sh7372 LCDC1 suspend fixMagnus Damm2011-08-243-0/+4
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Associate the HDMI clock together with LCDC1 on sh7372. Without this patch Suspend-to-RAM hangs on the boards AP4EVB and Mackerel. The code hangs in the LCDC driver where the software is waiting forever for the hardware to power down. By explicitly associating the HDMI clock with LCDC1 we can make sure the HDMI clock is enabled using Runtime PM whenever the driver is accessing the hardware. This HDMI and LCDC1 dependency is documented in the sh7372 data sheet. Older kernels did work as expected but the recently merged (3.1-rc) 794d78f drivers: sh: late disabling of clocks V2 introduced code to turn off clocks lacking software reference which happens to include the HDMI clock that is needed by LCDC1 to operate as expected. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| | | * / All Arch: remove linkage for sys_nfsservctl system callNeilBrown2011-08-261-1/+1
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nfsservctl system call is now gone, so we should remove all linkage for it. Signed-off-by: NeilBrown <neilb@suse.de> Signed-off-by: J. Bruce Fields <bfields@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| | * / OMAP4: clock: fix compile warningPaul Walmsley2011-08-211-0/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following compile warning: arch/arm/mach-omap2/clock44xx_data.c: In function 'omap4xxx_clk_init': arch/arm/mach-omap2/clock44xx_data.c:3371:6: warning: 'cpu_clkflg' may be used uninitialized in this function The approach taken here is intended to work if omap4xxx_clk_init() is converted into an initcall. Thanks to Bjarne Steinsbo <bsteinsbo@gmail.com> for proposing another approach. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Bjarne Steinsbo <bsteinsbo@gmail.com>
| * / OMAP3: clock: indicate that gpt12_fck and wdt1_fck are in the WKUP clockdomainPaul Walmsley2011-08-221-0/+2
| |/ | | | | | | | | | | | | | | | | | | The oscillator that supplies GPT12_FCLK and WDT1_FCLK exists in the WKUP powerdomain[1]. This resolves at least one boot-time warning: omap_hwmod: gpt12_fck: missing clockdomain for gpt12_fck. 1. _OMAP34xx Multimedia High Security (HS) Device Silicon Revision 3.1.x Security Addendum Version K (SWPU119K)_ Figure 3-29. August 2010.
* / OMAP4: clock: re-enable previous clockdomain enable/disable sequencePaul Walmsley2011-08-191-1/+7
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit 665d001338b494d6d62810aa99b4c0fa1a0884b9 ("OMAP2+: hwmod: Follow the recommended PRCM module enable sequence"), device drivers for OMAP IP blocks that do not use runtime PM can cause oopses or kernel instability[1][2]. This is because those non-runtime PM drivers do not use the hwmod code, which implements the correct IP block enable and disable sequence. Several options for dealing with this problem have been proposed: 1. Add a new field to the OMAP struct clk to mark clocks that are currently used by non-runtime PM drivers. Modify the clock code to use the old clockdomain sequence for these marked clocks. As drivers are converted to use runtime PM, remove the annotation from the clocks. 2. Similar to #1, but associate the flag with the struct omap_clk instead. 3. Add IDLEST wait support to the OMAP4 clock code, similar to the way it is implemented for OMAP2/3, and enable it in each struct clk currently used by non-runtime PM drivers. As drivers are converted to use runtime PM, remove the annotation from the clocks. 4. Do nothing; leave the problem to those responsible for the unconverted drivers. 5. Re-enable clock-based clockdomain control in the OMAP4 clock code. This would revert back to the behavior of Linux 3.0, simply with a slightly longer module enable/disable latency. Unfortunately, no approach seemed particularly good. Options 1 through 3 seemed unwise due to the following reasons: A. The OMAP struct clks are intended primarily to describe hardware clock nodes, and the intention is that no driver-specific data should be stored there (applies to #1) B. The resulting patch would have been quite large for the -rc series (applies to #1, #2, #3) C. The patch would have been a new, yet temporary hack; and similar fixes have drawn negative comments in the recent past (see for example [3]) Option 4 is undesirable because commit 665d001338b494d6d62810aa99b4c0fa1a0884b9 ("OMAP2+: hwmod: Follow the recommended PRCM module enable sequence") has resulted in a less stable kernel; and kernel stability is more important than OMAP4 power management. Option 5 is the approach taken in this patch. This seemed to be the least intrusive approach for 3.1-rc. The approach in this patch was originally proposed by Ohad Ben-Cohen <ohad@wizery.com>. I'm simply writing the commit message and passing it along. ... Thanks to Luciano Coelho <coelho@ti.com> for reporting the problem. Thanks to Ohad Ben-Cohen <ohad@wizery.com> for tracking the problem down, generating a temporary workaround, and proposing a patch to deal with the problem. Thanks to Rajendra Nayak <rnayak@ti.com> for proposing another patch to deal with the problem. Thanks to Felipe Balbi <balbi@ti.com> for comments. 1. Coelho, Luciano <coelho@ti.com>. _Re: Oops on ehci_hcd when booting 3.0.0-rc2 on panda_. Tue, 09 Aug 2011 14:26:08 +0300. Posted to the <linux-omap@vger.kernel.org> mailing list. Available from (among others) http://www.spinics.net/linux/lists/linux-omap/msg55213.html 2. Munegowda, Keshava <keshava_mgowda@ti.com>. _Re: Oops on ehci_hcd when booting 3.0.0-rc2 on panda_. Thu, 11 Aug 2011 13:51:05 +0530. Posted to the <linux-omap@vger.kernel.org> mailing list. Available from (among others) http://www.spinics.net/linux/lists/linux-omap/msg55371.html 3. King, Russell <linux@arm.linux.org.uk>. _Re: [PATCH 5/8] OMAP4: PM: TEMP: Prevent l3init from idling/force sleep_. Thu, 23 Jun 2011 16:22:49 +0100. Posted to the <linux-omap@vger.kernel.org> mailing list. Available from (among others) http://www.mail-archive.com/linux-omap@vger.kernel.org/msg51392.html Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Luciano Coelho <coelho@ti.com> Cc: Ohad Ben-Cohen <ohad@wizery.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* Merge branch 'fixes' of ↵Linus Torvalds2011-08-1232-186/+252
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (32 commits) ARM: mmp: Change the way we use timer 0 as clockevent timer. ARM: mmp: Switch to using timer 1 as clocksource timer. ARM: mmp: Also start timer 1 on boot. ARM: pxa168/gplugd: free correct GPIO ARM: pxa168/gplugd: get rid of mfp-gplugd.h ARM: pxa: fix logic error in PJ4 iWMMXt handling mach-sa1100: fix PCI build problem omap: timer: Set dmtimer used as clocksource in autoreload mode OMAP3: am3517crane: remove NULL board_mux from board file arm: mach-omap2: mux: use kstrdup() arch:arm:plat-omap:iovmm: remove unused variable 'va' Update Nook Color machine 3284 to common Encore name am3505/3517: Various platform defines for UART4 OMAP: hwmod: fix build break on non-OMAP4 multi-OMAP2 builds OMAP: Fix linking error in twl-common.c for OMAP2/3/4 only builds iMX: Fix build for iMX53 ARM: mx5: board-cpuimx51.c fixup irq_to_gpio() usage OMAP2+: PM: SmartReflex: use put_sync_suspend for IRQ-safe disabling OMAP3: beagle: don't touch omap_device internals OMAP1: enable GENERIC_IRQ_CHIP ...
| * Merge branch 'fixes' of ↵Arnd Bergmann2011-08-1214-70/+94
| |\ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into fixes
| | * omap: timer: Set dmtimer used as clocksource in autoreload modeHemant Pedanekar2011-08-101-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_OMAP_32K_TIMER is not selected and dmtimer is used as clocksource, the timer stops counting once overflow occurs as it was not set in autoreload mode. This results into timekeeping failure: for example, 'sleep 1' at the shell after the timer counter overflow would hang. This patch sets up autoreload when starting the clocksource timer which fixes the above issue. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * OMAP3: am3517crane: remove NULL board_mux from board fileJohan Hovold2011-08-101-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Since 7203f8a48bb63015ebe58a6f2a38aec1cb208b9d (arm: mach-omap2: remove NULL board_mux from board files) NULL board_mux is defined in mux.h. Signed-off-by: Johan Hovold <jhovold@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * arm: mach-omap2: mux: use kstrdup()Thomas Meyer2011-08-101-10/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use kstrdup rather than duplicating its implementation The semantic patch that makes this output is available in scripts/coccinelle/api/kstrdup.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/ Signed-off-by: Thomas Meyer <thomas@m3y3r.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * arch:arm:plat-omap:iovmm: remove unused variable 'va'Maxin John2011-08-101-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | The pointer "va" returned from "phys_to_virt(pa)" is never used in "sgtable_fill_kmalloc()".So,it is safe to remove this set-but-unused variable. Signed-off-by: Maxin B. John <maxin.john@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * Update Nook Color machine 3284 to common Encore nameOleg Drokin2011-08-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Machine database already updated: http://www.arm.linux.org.uk/developer/machines/list.php?id=3284 Signed-off-by: Oleg Drokin <green@linuxhacker.ru> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * am3505/3517: Various platform defines for UART4Raphaël Assénat2011-08-103-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add missing definitions for the AM3505/3517 UART4 such as DMAs, INTs and base address. Signed-of-by: Raphael Assenat <raph@8d.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * Merge branch 'for_3.1/pm-fixes' of ↵Tony Lindgren2011-08-104-15/+13
| | |\ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into fixes
| | | * OMAP2+: PM: SmartReflex: use put_sync_suspend for IRQ-safe disablingColin Cross2011-08-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap_sr_disable_reset_volt is called with irqs off in omapx_enter_sleep, as part of idle sequence, this eventually calls sr_disable and pm_runtime_put_sync. pm_runtime_put_sync calls rpm_idle, which will enable interrupts in order to call the callback. In this short interval when interrupts are enabled, scenarios such as the following can occur: while interrupts are enabled, the timer interrupt that is supposed to wake the device out of idle occurs and is acked, so when the CPU finally goes to off, the timer is already gone, missing a wakeup event. Further, as the documentation for runtime states:" However, subsystems can use the pm_runtime_irq_safe() helper function to tell the PM core that a device's ->runtime_suspend() and ->runtime_resume() callbacks should be invoked in atomic context with interrupts disabled (->runtime_idle() is still invoked the default way)." Hence, replace pm_runtime_put_sync with pm_runtime_put_sync_suspend to invoke the suspend handler and shut off the fclk for SmartReflex module instead of using the idle handler in interrupt disabled context. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Colin Cross <ccross@google.com> [khilman@ti.com: minor Subject edits] Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * OMAP3: beagle: don't touch omap_device internalsKevin Hilman2011-08-051-13/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Board code should not touch omap_device internals. To get the MPU/IVA devices, use existing APIs: omap2_get_mpu_device(), omap2_get_iva_device(). Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * OMAP1: enable GENERIC_IRQ_CHIPKevin Hilman2011-08-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP1 needs this also since GPIO driver (common for all OMAPs) is being converted to use generic IRQ chip. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * OMAP3+: SR: ensure pm-runtime callbacks can be invoked with IRQs disabledNishanth Menon2011-08-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SmartReflex should be disabled while entering low power mode due to a) SmartReflex values are not defined for retention voltage, further b) with SmartReflex enabled, if CPU enters lower c-states, FSM will try to bump the voltage to current OPP's voltage for which it has entered c-state; hence SmartReflex needs to be disabled for MPU, CORE and IVA voltage domains in idle path before enabling auto retention voltage achievement on the device. However, since the current pm_runtime setup for SmartReflex devices are setup to allow callbacks to be invoked with interrupts enabled, calling SmartReflex enable/disable from other contexts such as idle paths where preemption is disabled causes warnings such as the following indicating of a potential race. [ 82.023895] [<c04d079c>] (__irq_svc+0x3c/0x120) from [<c04d0484>] (_raw_spin_unlock_irq+0x28/0x2c) [ 82.023895] [<c04d0484>] (_raw_spin_unlock_irq+0x28/0x2c) from [<c0323234>] (rpm_callback+0x4c/0x68) [ 82.023956] [<c0323234>] (rpm_callback+0x4c/0x68) from [<c0323f7c>] (rpm_resume+0x338/0x53c) [ 82.023956] [<c0323f7c>] (rpm_resume+0x338/0x53c) from [<c03243f4>] (__pm_runtime_resume+0x48/0x60) [ 82.023986] [<c03243f4>] (__pm_runtime_resume+0x48/0x60) from [<c008aee0>] (sr_enable+0xa8/0x19c) [ 82.023986] [<c008aee0>] (sr_enable+0xa8/0x19c) from [<c008b2fc>] (omap_sr_enable+0x50/0x90) [ 82.024017] [<c008b2fc>] (omap_sr_enable+0x50/0x90) from [<c00888c0>] (omap4_enter_sleep+0x138/0x168) Instead, we use pm_runtime_irq_safe to tell the PM core that callbacks can be invoked in interrupt disabled contexts. Acked-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> [khilman@ti.com: minor changelog edits] Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * OMAP2+: Kconfig: don't select PM in OMAP2PLUS_TYPICALKevin Hilman2011-08-051-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_PM is no longer a user-selectable Kconfig option. Rather it is automatically enabled if either CONFIG_SUSPEND or CONFIG_RUNTIME_PM is enabled, so having a 'select PM' here is redunant when 'select CONFIG_PM_RUNTIME' is present. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * | OMAP: hwmod: fix build break on non-OMAP4 multi-OMAP2 buildsPaul Walmsley2011-08-101-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Builds for multi-OMAP2 (e.g., OMAP2420 with OMAP2430) with CONFIG_ARCH_OMAP4=n fail with the following errors: arch/arm/mach-omap2/built-in.o: In function `_enable_module': arch/arm/mach-omap2/omap_hwmod.c:701: undefined reference to `omap4_cminst_module_enable' arch/arm/mach-omap2/built-in.o: In function `_disable_module': arch/arm/mach-omap2/omap_hwmod.c:726: undefined reference to `omap4_cminst_module_disable' arch/arm/mach-omap2/built-in.o: In function `_wait_target_disable': arch/arm/mach-omap2/omap_hwmod.c:1179: undefined reference to `omap4_cminst_wait_module_idle' This is probably due to the preprocessor directives in arch/arm/plat-omap/include/plat/cpu.h that convert some cpu_is_omap*() expressions from preprocessor directives into something that is only resolvable during runtime, if multiple OMAP2 build targets are selected. Thanks to Tony Lindgren <tony@atomide.com> for reporting. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | OMAP: Fix linking error in twl-common.c for OMAP2/3/4 only buildsPeter Ujfalusi2011-08-101-37/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b22f954 (OMAP4: Move common twl6030 configuration to twl-common) caused compile failures for code for OMAP arch which is not selected by the config. Fixes issues like: With CONFIG_ARCH_OMAP3=y and CONFIG_ARCH_OMAP4=n, I'm getting this: arch/arm/mach-omap2/built-in.o:(.data+0xf99c): undefined reference to `omap4430_phy_init' arch/arm/mach-omap2/built-in.o:(.data+0xf9a0): undefined reference to `omap4430_phy_exit' arch/arm/mach-omap2/built-in.o:(.data+0xf9a4): undefined reference to `omap4430_phy_power' arch/arm/mach-omap2/built-in.o:(.data+0xf9a8): undefined reference to `omap4430_phy_set_clk' arch/arm/mach-omap2/built-in.o:(.data+0xf9ac): undefined reference to `omap4430_phy_suspend' Fix the problem by moving the code to ifdef sections for omap3 and omap4. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | Merge branch 'fix' of ↵Arnd Bergmann2011-08-125-85/+94
| |\ \ \ | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into fixes
| | * | | ARM: mmp: Change the way we use timer 0 as clockevent timer.Lennert Buytenhek2011-08-111-12/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of setting up a match interrupt for 'current_time + delta' on ->set_next_event(), program timer 0 to count down from 'delta - 1' and trigger an interrupt when it reaches zero. Signed-off-by: Lennert Buytenhek <buytenh@laptop.org> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | ARM: mmp: Switch to using timer 1 as clocksource timer.Lennert Buytenhek2011-08-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@laptop.org> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | ARM: mmp: Also start timer 1 on boot.Lennert Buytenhek2011-08-111-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, arch-mmp/time.c uses timer 0 both as a clocksource timer and as a clockevent timer, the latter by setting up a comparator interrupt to match on 'current_time + delta'. This is problematic if delta is small enough, as that can lead to 'current_time + delta' already being in the past when comparator setup has finished, leading to the requested event not triggering. As there is also a silicon issue that requires stopping a timer's counter while writing to one of its match registers, we'll switch to using two separate timers -- timer 0 as clockevent timer, which we'll start and stop on every invocation of ->set_next_event(), and timer 1 as clocksource timer, which will be free-running. This first patch enables timer 1 on boot, so that we can use it as clocksource timer. Signed-off-by: Lennert Buytenhek <buytenh@laptop.org> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | ARM: pxa168/gplugd: free correct GPIOTanmay Upadhyay2011-08-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | ARM: pxa168/gplugd: get rid of mfp-gplugd.hTanmay Upadhyay2011-08-113-62/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move definitions from mfp-gplugd.h to mfp-pxa168.h as they aren't gplugD specific. Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | ARM: pxa: fix logic error in PJ4 iWMMXt handlingLennert Buytenhek2011-08-111-3/+3
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This got added in: commit ef6c84454f8567d4968c210d7d194fb711ed3739 Author: Haojian Zhuang <haojian.zhuang@marvell.com> Date: Wed Nov 24 11:54:25 2010 +0800 ARM: pxa: add iwmmx support for PJ4 which does: - mrc p15, 0, r2, c15, c1, 0 - orr r2, r2, #0x3 @ enable access to CP0 and CP1 - mcr p15, 0, r2, c15, c1, 0 + @ enable access to CP0 and CP1 + XSC(mrc p15, 0, r2, c15, c1, 0) + XSC(orr r2, r2, #0x3) + XSC(mcr p15, 0, r2, c15, c1, 0) but then later does: - mrc p15, 0, r4, c15, c1, 0 - orr r4, r4, #0x3 @ enable access to CP0 and CP1 - mcr p15, 0, r4, c15, c1, 0 + @ enable access to CP0 and CP1 + XSC(mrc p15, 0, r4, c15, c1, 0) + XSC(orr r4, r4, #0xf) + XSC(mcr p15, 0, r4, c15, c1, 0) Signed-off-by: Lennert Buytenhek <buytenh@laptop.org> Acked-by Haojian <haojian.zhuang@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * | | Merge branch 'imx-fixes-for-arnd' of ↵Arnd Bergmann2011-08-1212-31/+63
| |\ \ \ | | | | | | | | | | | | | | | git://git.pengutronix.de/git/imx/linux-2.6 into fixes
| | * | | iMX: Fix build for iMX53Arnaud Patard (Rtp)2011-08-081-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit fad107086d5a869c1c07e5bb35b7b57a10ecf578 fixed the wrong test for MX51 as the MX51 addresses are wrong for MX50 and MX53 but now it's MX51 only, UART_PADDR is not defined anymore when building for MX50/MX53. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Steev Klimaszewski <steev@genesi-usa.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | ARM: mx5: board-cpuimx51.c fixup irq_to_gpio() usageBen Dooks2011-08-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | irq_to_gpio() is being called on a GPIO so change to using gpio_to_irq() instead. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | Merge commit 'v3.1-rc1' into imx-fixesSascha Hauer2011-08-081089-25619/+24864
| | |\| |
| | * | | ARM: iMX5: Don't enable DPLL if it already enabledJason Liu2011-08-051-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the DPLL is already enabled, don't try to enable it again. Since write to the DPLL control register will make the DPLL reset and which will cause some issues when some child module are sourced from this DPLL. Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | i.MX25 GPT clock fix: ensure correct the clock sourceMehnert, Torsten2011-08-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Request for comment and commit. From: T. Mehnert <t.mehnert@eckelmann.de> Date: Mon, 4 Jul 2011 15:53:30 +0200 Subject: [PATCH] i.MX25 GPT clock fix: ensure correct the clock source This patch ensures, that Linux will take the correct clock source (AHB_DIV) for gpt in the ARM i.MX25 implementation. The currect code depends on the reset defaults of the CCM_MCR register. So on some boards it could happen that the UPLL is used for clock source, which results in faulty time behavior in Linux. In this case all delays or sleeps will will be faktor 1.8 too long. Signed-off-by: Torsten Mehnert <t.mehnert@eckelmann.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | ARM: board-mx51_babbage: Fix UART2 registrationFabio Estevam2011-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On MX51 Babbage board the RTS/CTS pins are not used on UART2 port. Fix the registration of this port. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | efika: Fix board id detectionArnaud Patard (Rtp)2011-07-262-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code is assuming that gpio_get_value() is returning 0 or 1 but it should be checking if the value is 0 or not. Not doing it properly is breaking the detection of the board (and thus the reboot of efika mx to2) when using the new mxc gpio driver, which relies on basic mmio gpio. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-15 06:19:38 +0000