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* Merge git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6Linus Torvalds2009-12-152-16/+20
|\ | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6: avr32: update default configurations for ATNGW100, ATSTK1002 and ATSTK1006 avr32: add default configurations for ATNGW100 mkII and EVKLCD10X avr32: add support for ATNGW100 mkII board avr32: convert to asm-generic/hardirq.h avr32: add two new at91 to cpu.h definition avr32: clean up linker script using standard macros. avr32: MRMT: correct setup of SPI slaves avr32: function for independently setting up SPI slaves avr32: re-instate MCI WP/CD pin assignments for ATNGW100
| * Merge commit 'v2.6.32'Haavard Skinnemoen2009-12-141-0/+1
| |\ | | | | | | | | | | | | Conflicts: arch/avr32/mach-at32ap/include/mach/cpu.h
| * | avr32: add two new at91 to cpu.h definitionNicolas Ferre2009-10-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Somme common drivers will need those at91 cpu_is_xxx() definitions. As at91sam9g10 and at91sam9g45 are on the way to linus' tree, here is the patch that adds those chips to cpu.h in AVR32 architecture. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | avr32: function for independently setting up SPI slavesPeter Ma2009-08-272-16/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | at32ap_spi_setup_slaves() is exposed to allow the addition of SPI slaves to a SPI bus that has already been registered. This is especially useful for add-on cards, which have their own board setup function. at32ap_spi_add_device() has been slightly re-organized, but should be transparent to existing users. So to add a SPI slave, after a SPI bus has already been registered: /* Configure the list of slaves on SPI controller "id" */ at32_spi_setup_slaves(id,spi_board_info,ARRAY_SIZE(spi_board_info)); /* Register the list of slaves */ spi_register_board_info(spi_board_info,ARRAY_SIZE(spi_board_info)); Signed-off-by: Peter Ma <pma@mediamatech.com> [haavard.skinnemoen@atmel.com: trivial whitespace fix] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | | atmel-mci: change use of dma slave interfaceNicolas Ferre2009-12-152-5/+37
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow the use of another DMA controller driver in atmel-mci sd/mmc driver. This adds a generic dma_slave pointer to the mci platform structure where we can store DMA controller information. In atmel-mci we use information provided by this structure to initialize the driver (with new helper functions that are architecture dependant). This also adds at32/avr32 chip modifications to cope with this new access method. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | at91: at91sam9g45 family: identify several chip versionsNicolas Ferre2009-11-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | cpu_is_xxx() macros are identifying generic at91sam9g45 chip. This patch adds the capacity to differentiate Engineering Samples and final lots through the inclusion of at91_cpu_fully_identify() and the related chip IDs with chip version field preserved. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
* | avr32: add two new at91 to cpu.h definitionNicolas Ferre2009-11-031-0/+2
|/ | | | | | | | | Somme common drivers will need those at91 cpu_is_xxx() definitions. As at91sam9g10 and at91sam9g45 are on the way to linus' tree, here is the patch that adds those chips to cpu.h in AVR32 architecture. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Fix clash in ATMEL_USART_ flagsBen Nizette2009-06-031-1/+1
| | | | | | | | | | | | At the moment ATMEL_USART_{RTS,CTS,CLK} have the values 1, 2 and 3 respectively. Given these are used in bitmasks, trying to turn on the CLK line will in fact turn on the RTS and CTS lines as well. Change the value of ATMEL_USART_CLK to 4. Signed-off-by: Ben Nizette <bn@niasdigital.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)Yang Hongyang2009-04-071-4/+4
| | | | | | | | Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* avr32: add RTS/CTS/CLK pin selection for the USARTsPeter Ma2009-04-012-10/+27
| | | | | | | | | | | Adds extra parameter to AT32 at32_map_usart(), so as to reserve RTS/CTS/CLK pins. All boards under arch/avr32/boards have been updated (trivial change), but not all have been tested. Signed-off-by: Peter Ma <pma@mediamatech.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: at32ap700x: setup DMA for AC97C in the machine codeHans-Christian Egtvedt2009-03-272-23/+38
| | | | | | | | | | | | | | | | | | | | This patch will adjust the setup the DMA controller for the AC97 Controller in the at32ap700x machine code. This setup matches the new ALSA driver for the AC97C. The struct ac97c_platform_data has been moved into its own header file located in the sound include path. Tested on ATSTK1006 + ATSTK1000. This patch will setup the AC97 controller properly for the adjusted machine code. Both EVKLCD10x and Hammerhead board has been updated. Tested on EVKLCD10x, and copied to Hammerhead board. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> [haavard.skinnemoen@atmel.com: fold with board code update] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: at32ap700x: setup DMA for ABDAC in the machine codeHans-Christian Egtvedt2009-03-272-9/+27
| | | | | | | | | | | | | | | This patch will adjust the setup the DMA controller for the Audio Bistream DAC in the at32ap700x machine code. This setup matches the new ALSA driver for the ABDAC. Tested on ATSTK1006 + ATSTK1000. This patch will setup the needed platform data for the Audio Bistream DAC used by the Favr-32 board. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> [haavard.skinnemoen@atmel.com: fold board code update] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'master' of ↵Haavard Skinnemoen2009-03-271-0/+1
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into avr32-arch
| * [ARM] 5400/1: Add support for inverted rdy_busy pin for Atmel nand device ↵Gregory CLEMENT2009-02-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | controller Add support for inverted rdy_busy pin for Atmel nand device controller It will fix building error on NeoCore926 board. Acked-by: Andrew Victor <linux@maxim.org.za> Acked-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Gregory CLEMENT <gclement@adeneo.adetelgroup.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | avr32: use gpio_is_valid() to check USBA vbus_pin I/O lineHans-Christian Egtvedt2009-03-261-1/+1
| | | | | | | | | | | | | | This patch will use gpio_is_valid() to check the vbus_pin I/O line. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: add pin mask for 18-bit color on the LCD controllerHans-Christian Egtvedt2009-03-261-0/+26
| | | | | | | | | | | | | | | | | | This patch adds two defines for setting a pin mask for 18-bit LCD panels connected to the LCD controller. One mask for primary output and one mask for alternative output. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: fix 15-bit LCDC pin mask to use MSB linesHans-Christian Egtvedt2009-03-261-16/+18
|/ | | | | | | | | | | This patch corrects the 15-bit LCDC pin mask definitions to select the five upper lines in each color byte from the LCDC data output. When reducing the color depth the LCDC will start filling MSB and downwards. Also only enable 5 bits per color as the define indicates. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'next' of ↵Linus Torvalds2009-01-091-12/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (22 commits) ioat: fix self test for multi-channel case dmaengine: bump initcall level to arch_initcall dmaengine: advertise all channels on a device to dma_filter_fn dmaengine: use idr for registering dma device numbers dmaengine: add a release for dma class devices and dependent infrastructure ioat: do not perform removal actions at shutdown iop-adma: enable module removal iop-adma: kill debug BUG_ON iop-adma: let devm do its job, don't duplicate free dmaengine: kill enum dma_state_client dmaengine: remove 'bigref' infrastructure dmaengine: kill struct dma_client and supporting infrastructure dmaengine: replace dma_async_client_register with dmaengine_get atmel-mci: convert to dma_request_channel and down-level dma_slave dmatest: convert to dma_request_channel dmaengine: introduce dma_request_channel and private channels net_dma: convert to dma_find_channel dmaengine: provide a common 'issue_pending_all' implementation dmaengine: centralize channel allocation, introduce dma_find_channel dmaengine: up-level reference counting to the module level ...
| * atmel-mci: convert to dma_request_channel and down-level dma_slaveDan Williams2009-01-061-12/+3
| | | | | | | | | | | | | | | | | | | | | | dma_request_channel provides an exclusive channel, so we no longer need to pass slave data through dmaengine. Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Reviewed-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | Merge branch 'move-atmel-mci-h' into boardsHaavard Skinnemoen2009-01-051-1/+1
|\ \
| * | atmel-mci: move atmel-mci.h file to include/linuxNicolas Ferre2009-01-051-1/+1
| |/ | | | | | | | | | | | | | | Needed to use the atmel-mci driver in an architecture independant maner. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Hammerhead board supportAlex Raimondi2009-01-052-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel. It offers versatile peripherals, such as ethernet, usb device, usb host etc. The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered Device (PD). Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which will cover even the most exceptional need of memory bandwidth. Together with the onboard video decoder the board is ready for video processing. This patch does include the basic support for the fpga device driver, but not the device driver itself. Signed-off-by: Alex Raimondi <mailinglist@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | Merge branch 'cleanups' into boardsHaavard Skinnemoen2009-01-054-9/+19
|\ \ | |/ |/|
| * avr32: Allow reserving multiple pins at onceAlex Raimondi2009-01-053-7/+17
| | | | | | | | | | | | | | | | | | | | | | at32_reserve_pin now takes an u32 bitmask rather than a single pin. This allows to reserve multiple pins at once. Remove (undocumented) SDCS (pin PE26) from reservation in board setup code. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * avr: struct device - replace bus_id with dev_name(), dev_set_name()Kay Sievers2009-01-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (I did not compile or test it, please let me know, or help fixing it, if something is wrong with the conversion) This patch is part of a larger patch series which will remove the "char bus_id[20]" name string from struct device. The device name is managed in the kobject anyway, and without any size limitation, and just needlessly copied into "struct device". To set and read the device name dev_name(dev) and dev_set_name(dev) must be used. If your code uses static kobjects, which it shouldn't do, "const char *init_name" can be used to statically provide the name the registered device should have. At registration time, the init_name field is cleared, to enforce the use of dev_name(dev) to access the device name at a later time. We need to get rid of all occurrences of bus_id in the entire tree to be able to enable the new interface. Please apply this patch, and possibly convert any remaining remaining occurrences of bus_id. We want to submit a patch to -next, which will remove bus_id from "struct device", to find the remaining pieces to convert, and finally switch over to the new api, which will remove the 20 bytes array and does no longer have a size limitation. Thanks, Kay From: Kay Sievers <kay.sievers@vrfy.org> Subject: avr: struct device - replace bus_id with dev_name(), dev_set_name() Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Enable pullup on USART TX linesAnders Blomdell2008-10-241-4/+4
|/ | | | | | | | | | Make USART initialization conform to Section 24.6.1 in the AT32AP7000 manual, i.e. "To prevent the TXD line from falling when the USART is disabled, the use of an internal pull up is mandatory." Signed-off-by: Anders Blomdell <anders.blomdell@control.lth.se> [haavard.skinnemoen@atmel.com: enable pullup on RX as well] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branches 'boards' and 'fixes' of ↵Haavard Skinnemoen2008-10-234-9/+31
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6
| * avr32: Fix GPIO initcall breakageHaavard Skinnemoen2008-10-232-3/+12
| | | | | | | | | | | | | | | | | | | | Add essential system devices, including GPIO controllers, automatically at core_initcall time. This ensures that the devices are there when the PIO driver gets initialized at postcore_initcall, fixing a bug exposed by commit d6634db8fe1784d0a8e4e156970fec034708446e "avr32: Use platform_driver_probe for pio platform driver". Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * avr32: Scale loops_per_jiffy when cpu frequency changesHaavard Skinnemoen2008-10-231-0/+14
| | | | | | | | | | | | | | | | The loops_per_jiffy variable isn't updated when cpufreq changes the CPU frequency. This could cause udelay() and friends to produce wrong delays. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * avr32: Fix bug in LCD pin setup on port CAlex Raimondi2008-10-231-1/+1
| | | | | | | | | | | | | | Bug was introduced with the new at32_select_periph function. Signed-off-by: Alex Raimondi <mailinglist@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * Merge branch 'genirq-v28-for-linus' of ↵Linus Torvalds2008-10-201-4/+4
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip This merges branches irq/genirq, irq/sparseirq-v4, timers/hpet-percpu and x86/uv. The sparseirq branch is just preliminary groundwork: no sparse IRQs are actually implemented by this tree anymore - just the new APIs are added while keeping the old way intact as well (the new APIs map 1:1 to irq_desc[]). The 'real' sparse IRQ support will then be a relatively small patch ontop of this - with a v2.6.29 merge target. * 'genirq-v28-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (178 commits) genirq: improve include files intr_remapping: fix typo io_apic: make irq_mis_count available on 64-bit too genirq: fix name space collisions of nr_irqs in arch/* genirq: fix name space collision of nr_irqs in autoprobe.c genirq: use iterators for irq_desc loops proc: fixup irq iterator genirq: add reverse iterator for irq_desc x86: move ack_bad_irq() to irq.c x86: unify show_interrupts() and proc helpers x86: cleanup show_interrupts genirq: cleanup the sparseirq modifications genirq: remove artifacts from sparseirq removal genirq: revert dynarray genirq: remove irq_to_desc_alloc genirq: remove sparse irq code genirq: use inline function for irq_to_desc genirq: consolidate nr_irqs and for_each_irq_desc() x86: remove sparse irq from Kconfig genirq: define nr_irqs for architectures with GENERIC_HARDIRQS=n ...
| | * genirq: fix name space collisions of nr_irqs in arch/*Thomas Gleixner2008-10-161-4/+4
| | | | | | | | | | | | | | | | | | local shadows of global variables are _bad_ Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | cpufreq: remove policy->governor setting in drivers initializationDominik Brodowski2008-10-151-1/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | As policy->governor is already set to CPUFREQ_DEFAULT_GOVERNOR in the (always built-in) cpufreq core, we do not need to set it in the drivers. This fixes the sparc64 allmodconfig build failure. Also, remove a totally useles setting of ->policy in cpufreq-pxa3xx.c. Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* / avr32: Fix MIMC200 board use of SPD network pinsMark Jackson2008-10-131-0/+4
|/ | | | | | | | | | | | | | The MIMC200 board uses the SPD output pin from the Ethernet MACs for other purposes. One of these is as a board-reset, so I've had to #define off the SPD output pin declaration. This is probably not the best way of achieving this, but works in the current framework. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Allow selecting multiple pins at onceJulien May2008-10-123-144/+208
| | | | | | | | at32_select_periph() now takes an u32 bitmask rather than a single pin. This allows to set multiple pins at once. Signed-off-by: Alex Raimondi <mailinglist@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'master' of ↵Haavard Skinnemoen2008-10-121-18/+70
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/atmel-mci-2.6.28
| * atmel-mci: Add experimental DMA supportHaavard Skinnemoen2008-10-051-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for DMA transfers through the generic DMA engine framework with the DMA slave extensions. The driver has been tested using mmc-block and ext3fs on several SD, SDHC and MMC+ cards. Reads and writes work fine, with read transfer rates up to 7.5 MiB/s on fast cards with debugging disabled. Unfortunately, the driver has been known to lock up from time to time with DMA enabled, so DMA support is currently optional and marked EXPERIMENTAL. However, I didn't see any problems while testing 13 different cards (MMC, SD and SDHC of different brands and sizes), so I suspect the "Initialize BLKR before sending data transfer command" fix that was posted earlier fixed this as well. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * atmel-mci: Platform code for supporting multiple mmc slotsHaavard Skinnemoen2008-10-051-18/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the necessary platform infrastructure to support multiple mmc/sdcard slots all at once through a single controller. Currently, the driver will use the first valid slot it finds and stick with that, but later patches will add support for switching between several slots on the fly. Extend the platform data structure with per-slot information: MMC/SDcard bus width and card detect/write protect pins. This will affect the pin muxing as well as the capabilities announced to the mmc core. Note that board code is now required to supply a mci_platform_data struct to at32_add_device_mci(). Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Replace static clock list with dynamic linked listAlex Raimondi2008-10-053-24/+58
| | | | | | | | | | | | | | | | This replaces the at32_clock_list array with a linked list. Clocks can now be registered (added) to the list. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Use platform_driver_probe for pdc platform driverUwe Kleine-König2008-09-221-2/+1
| | | | | | | | | | | | | | | | | | | | | | The probe function of the pdc platform driver lives in the init section and so a pdc device that is created after the init section is discarded probably results in an oops. Even if this cannot happen, using platform_driver_probe is cleaner. (If this can happen and should be supported the probe function must live in the devinit section instead.) Signed-off-by: Uwe Kleine-König <ukleinek@strlen.de> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Use platform_driver_probe for pio platform driverUwe Kleine-König2008-09-221-2/+1
| | | | | | | | | | | | | | | | | | | | | | The probe function of the pio platform driver lives in the init section and so a pio device that is created after the init section is discarded probably results in an oops. Even if this cannot happen, using platform_driver_probe is cleaner. (If this can happen and should be supported the probe function must live in the devinit section instead.) Signed-off-by: Uwe Kleine-König <ukleinek@strlen.de> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Provide a way to deselect pins in the portmuxHaavard Skinnemoen2008-09-222-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | Currently, setting up the portmux is completely one-shot: Once a pin is muxed, the portmux driver will complain loudly and refuse to do anything if you try to set up the same pin again. Sometimes, it may be necessary to change the configuration of a pin after it has been set up initially. This patch adds a way to undo the previous configuration, allowing the pin to be reconfigured. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Allow fine-grained control over LCDC pinsJulien May2008-09-223-71/+154
| | | | | | | | | | | | | | | | | | | | This replaces the pin_config param with an u64 pin_mask in at32_add_device_lcdc, allowing a board-maintainer to indivually select specific lcdc pins. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Julien May <jmay@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: use the new byteorder headersHarvey Harrison2008-09-221-2/+1
|/ | | | | | Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> [haavard.skinnemoen@atmel.com: fix <mach/io.h> build breakage] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: pm_standby low-power ram bug fixHumphrey Bucknell2008-09-011-1/+1
| | | | | | | | | | | | The value stored into the SDRAMC LPR register should be the current value of the register with the Self-refresh value set in the lower bit field. The bug involved only the Self-refresh value being written to the register, thus over writing any low-power ram settings. Signed-off-by: Humphrey Bucknell <hbucknell@saitek.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Clean up HMATRIX codeHaavard Skinnemoen2008-08-086-201/+180
| | | | | | | | | | | Introduce a few helper functions for HMATRIX configuration and clean up the register definitions. Also add definitions for the HMATRIX master and slave IDs on the AT32AP700x chips. Also make the definitions in hmatrix.h available to board code by moving it to <mach/hmatrix.h> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Add MMIO address definitions for certain controllersHaavard Skinnemoen2008-08-084-13/+13
| | | | | | | | Hardcoded MMIO base addresses are used a few places throughout the platform code. Move these into the chip-specific header file so that adding support for new chips becomes a bit easier. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Introduce <mach/chip.h>Haavard Skinnemoen2008-08-081-0/+19
| | | | | | | | | This file includes the appropriate chip-specific header with MMIO, IRQ and GPIO definitions used by the platform code. It may also be used to provide inline GPIO accessors for drivers that are willing to sacrifice portability for faster bitbanging. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Use <mach/foo.h> instead of <asm/arch/foo.h>Haavard Skinnemoen2008-08-055-9/+9
| | | | | | | Update all avr32-specific files to use the new platform-specific header locations. Drivers shared with ARM are left alone for now. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Introduce arch/avr32/mach-*/include/machHaavard Skinnemoen2008-08-0511-0/+544
| | | | | | | | Add arch/avr32/mach-*/include to include search path and copy all the files from include/asm/arch there. The old files will be removed once ARM does the same change and all common drivers are converted. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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