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* MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle2012-12-131-1/+0
| | | | | | | Nobody seems to be interested anymore and upstream also never had an ethernet driver. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.Ralf Baechle2012-10-111-0/+1
| | | | | | | | Most supported systems currently hardwire cpu_has_dsp to 0, so we also can disable support for cpu_has_dsp2 resulting in a slightly smaller kernel. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions.Ralf Baechle2010-04-121-1/+5
| | | | | | | | | | Previously it was unconditionally used on all Sibyte family SOCs. The M3 bug has to be handled in the TLB exception handler which is extremly performance sensitive, so this modification is expected to deliver around 2-3% performance improvment. This is important as required changes to the M3 workaround will make it more costly. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-112-0/+84
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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