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* MIPS: tlb: Set the EHINV bit for TLBINVF cores when invalidating the TLBLeonid Yegoshin2014-01-221-1/+3
| | | | | | | | | | | | For MIPS32R3 supported cores, the EHINV bit needs to be set when invalidating the TLB. This is necessary because the legacy software method of representing an invalid TLB entry using an unmapped address value is not guaranteed to work. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6132/
* MIPS: mm: Move UNIQUE_ENTRYHI macro to a header fileMarkos Chandras2014-01-221-0/+2
| | | | | | | | | | The UNIQUE_ENTRYHI definition was duplicated whenever there was the need to flush the TLB entries. We move this common definition to a header file. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6129/
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-1/+1
| | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-111-0/+23
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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