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* MIPS: lantiq: Return correct value for fpi clock on ar9John Crispin2015-11-111-2/+3
| | | | | | | | | | Some configurations of AR9 reported the incorrect speed for the fpi bus. Signed-off-by: Ben Mulvihill <ben.mulvihill@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11448/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Fix check for return value of request_mem_region()Hauke Mehrtens2015-11-112-7/+7
| | | | | | | | | | | | request_mem_region() returns a pointer and not an integer with an error value. A check for "< 0" on a pointer will cause problems, replace it with not null checks instead. This was found with sparse. Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11395/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add support for xRX220 SoCHauke Mehrtens2015-11-111-0/+7
| | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11394/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add misc clocksHauke Mehrtens2015-11-111-1/+3
| | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11393/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add 1e103100.deu clockHauke Mehrtens2015-11-111-0/+6
| | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11392/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add clock for mei driverHauke Mehrtens2015-11-111-0/+6
| | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11391/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add SoC detection for ar10 and grx390Hauke Mehrtens2015-11-111-2/+26
| | | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11390/ Patchwork: https://patchwork.linux-mips.org/patch/11399/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add support for gphy firmware loading for ar10 and grx390Hauke Mehrtens2015-11-111-20/+92
| | | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11389/ Patchwork: https://patchwork.linux-mips.org/patch/11398/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add pmu bits for ar10 and grx390Hauke Mehrtens2015-11-111-1/+56
| | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11388/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add PMU bits for USB and SDIO devicesHauke Mehrtens2015-11-111-1/+23
| | | | | | | | | | This adds the PUM bits for USB and SDIO devices Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11387/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Deactivate most of the devices by defaultHauke Mehrtens2015-11-111-21/+28
| | | | | | | | | | | | | When the SoC starts up most of the devices should be deactivated by the PMU, they should be activated when they get used by their drivers. Some devices should not get deactivate at startup like the serial, register them in a special way. Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11386/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add clock detection for grx390 and ar10Hauke Mehrtens2015-11-111-1/+156
| | | | | | | | | | This add detection of some clocks on the ar10 and grx390. Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11385/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Fix pp32 clock on vr9Hauke Mehrtens2015-11-111-3/+6
| | | | | | | | | | The vendor code uses different clock values for this clock. Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11384/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Rename CGU_SYS_VR9 registerHauke Mehrtens2015-11-111-4/+5
| | | | | | | | | | | This register is also used on other SoCs. Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11383/ Patchwork: https://patchwork.linux-mips.org/patch/11397/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add support for setting PMU register on AR10 and GRX390Hauke Mehrtens2015-11-111-11/+73
| | | | | | | | | | This adds support for setting the PMU register on the AR10 and GRX390. Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11382/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add locking for PMU register and check status afterwardsHauke Mehrtens2015-11-111-5/+27
| | | | | | | | | | | | | | | | | The PMU register are accessed in a non atomic way and they could be accessed by different threads simultaneously, which could cause problems this patch adds locking around the PMU registers. In addition we now also wait till the PMU is actually deactivated. [ralf@linux-mips.org: Fix spelling mistake in commit message as noticed by Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>.] Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11381/ Patchwork: https://patchwork.linux-mips.org/patch/11396/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: xway: drop owner assignment from platform_driversWolfram Sang2015-04-011-1/+0
| | | | | | | | | | | This platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8823/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge tag 'driver-core-3.19-rc1' of ↵Linus Torvalds2014-12-144-4/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core update from Greg KH: "Here's the set of driver core patches for 3.19-rc1. They are dominated by the removal of the .owner field in platform drivers. They touch a lot of files, but they are "simple" changes, just removing a line in a structure. Other than that, a few minor driver core and debugfs changes. There are some ath9k patches coming in through this tree that have been acked by the wireless maintainers as they relied on the debugfs changes. Everything has been in linux-next for a while" * tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits) Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries" fs: debugfs: add forward declaration for struct device type firmware class: Deletion of an unnecessary check before the function call "vunmap" firmware loader: fix hung task warning dump devcoredump: provide a one-way disable function device: Add dev_<level>_once variants ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries ath: use seq_file api for ath9k debugfs files debugfs: add helper function to create device related seq_file drivers/base: cacheinfo: remove noisy error boot message Revert "core: platform: add warning if driver has no owner" drivers: base: support cpu cache information interface to userspace via sysfs drivers: base: add cpu_device_create to support per-cpu devices topology: replace custom attribute macros with standard DEVICE_ATTR* cpumask: factor out show_cpumap into separate helper function driver core: Fix unbalanced device reference in drivers_probe driver core: fix race with userland in device_add() sysfs/kernfs: make read requests on pre-alloc files use the buffer. sysfs/kernfs: allow attributes to request write buffer be pre-allocated. fs: sysfs: return EGBIG on write if offset is larger than file size ...
| * mips: lantiq: xway: drop owner assignment from platform_driversWolfram Sang2014-10-204-4/+0
| | | | | | | | | | | | | | A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | MIPS: lantiq: add support for xrx200 firmware depending on soc typeJohn Crispin2014-11-241-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | VR9 needs different firmware files for the various phy/soc revisions. Some boards are ship with older and newer SoC revisions. To be able to boot a single image on all versions we need to define both firmware files inside the devicetree. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8045/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: lantiq: reboot gphy on restartJohn Crispin2014-11-241-1/+8
| | | | | | | | | | | | | | | | | | A reboot sometimes lead to a none working phy. An explicit reboot fixes the problem. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8044/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: lantiq: add reset-controller api supportJohn Crispin2014-11-241-0/+61
| | | | | | | | | | | | | | | | | | Add a reset-controller binding for the reset registers found on the lantiq SoC. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8043/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: lantiq: handle vmmc memory reservationJohn Crispin2014-11-242-0/+71
|/ | | | | | | | | | The Lantiq SoCs have a 2nd mips core called "voice mips macro core (vmmc)" which is used to run the voice firmware. This driver allows us to register a chunk of memory that the voice driver can later use for the 2nd core. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8042/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* treewide: fix errors in printkMasanari Iida2014-09-011-1/+1
| | | | | | | | | This patch fix spelling typo in printk. Signed-off-by: Masanari Iida <standby24x7@gmail.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* mips: delete non-required instances of include <linux/init.h>Paul Gortmaker2014-01-241-1/+0
| | | | | | | | | | | None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6320/
* arch/mips/lantiq/xway: don't check resource with devm_ioremap_resourceWolfram Sang2014-01-241-4/+0
| | | | | | | | | devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6348/
* MIPS: Panic messages should not end in \n.Ralf Baechle2013-10-291-1/+1
| | | | | | | Panic() is going to add a \n itself and it's annoying if a panic message rolls of the screen on a device with no scrollback. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Adds minimal dcdc driverJohn Crispin2013-09-032-1/+64
| | | | | | | | | This driver so far only reads the core voltage. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5677/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'devm_no_resource_check' of ↵Linus Torvalds2013-05-181-4/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull devm usage cleanup from Wolfram Sang: "Lately, I have been experimenting how to improve the devm interface to make writing device drivers easier and less error prone while also getting rid of its subtle issues. I think it has more potential but still needs work and definately conistency, especiall in its usage. The first thing I come up with is a low hanging fruit regarding devm_ioremap_resouce(). This function already checks if the passed resource is valid and gives an error message if not. So, we can remove similar checks from the drivers and get rid of a bit of code and a number of inconsistent error strings. This series only removes the unneeded check iff devm_ioremap_resource follows platform_get_resource directly. The previous version tried to shuffle code if needed, too, what lead to an embarrasing bug. It turned out to me that shuffling code for all cases found will make the automated script too complex, so I am unsure if an automated cleanup is the proper tool for this case. Removing the easy stuff seems worthwhile to me, though. Despite various architectures and platform dependencies, I managed to compile test 45 out of 57 modified files locally using heuristics and defconfigs." Pulled because: 296 deletions, 0 additions. * 'devm_no_resource_check' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (33 commits) sound/soc/kirkwood: don't check resource with devm_ioremap_resource sound/soc/fsl: don't check resource with devm_ioremap_resource arch/mips/lantiq/xway: don't check resource with devm_ioremap_resource arch/arm/plat-samsung: don't check resource with devm_ioremap_resource arch/arm/mach-tegra: don't check resource with devm_ioremap_resource drivers/watchdog: don't check resource with devm_ioremap_resource drivers/w1/masters: don't check resource with devm_ioremap_resource drivers/video/omap2/dss: don't check resource with devm_ioremap_resource drivers/video/omap2: don't check resource with devm_ioremap_resource drivers/usb/phy: don't check resource with devm_ioremap_resource drivers/usb/host: don't check resource with devm_ioremap_resource drivers/usb/gadget: don't check resource with devm_ioremap_resource drivers/usb/chipidea: don't check resource with devm_ioremap_resource drivers/thermal: don't check resource with devm_ioremap_resource drivers/staging/nvec: don't check resource with devm_ioremap_resource drivers/staging/dwc2: don't check resource with devm_ioremap_resource drivers/spi: don't check resource with devm_ioremap_resource drivers/rtc: don't check resource with devm_ioremap_resource drivers/pwm: don't check resource with devm_ioremap_resource drivers/pinctrl: don't check resource with devm_ioremap_resource ...
| * arch/mips/lantiq/xway: don't check resource with devm_ioremap_resourceWolfram Sang2013-05-181-4/+0
| | | | | | | | | | | | | | | | devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: John Crispin <blogic@openwrt.org>
* | MIPS: Xway: Fix clk leakLibo Chen2013-05-171-0/+2
|/ | | | | | | | | | | | | | | When gptu_r32 fails, we should put clk before returning. Signed-off-by: Libo Chen <libo.chen@huawei.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: grant.likely@linaro.org Cc: rob.herring@calxeda.com, Cc: linux-mips@linux-mips.org Cc: LKML linux-kernel@vger.kernel.org Cc: Andrew Morton akpm@linux-foundation.org Cc: Li Zefan lizefan@huawei.com Patchwork: https://patchwork.linux-mips.org/patch/5247/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-03-023-6/+61
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: o Add basic support for the Mediatek/Ralink Wireless SoC family. o The Qualcomm Atheros platform is extended by support for the new QCA955X SoC series as well as a bunch of patches that get the code ready for OF support. o Lantiq and BCM47XX platform have a few improvements and bug fixes. o MIPS has sent a few patches that get the kernel ready for the upcoming microMIPS support. o The rest of the series is made up of small bug fixes and cleanups that relate to various parts of the MIPS code. The biggy in there is a whitespace cleanup. After I was sent another set of whitespace cleanup patches I decided it was the time to clean the whitespace "issues" for once and and that touches many files below arch/mips/. Fix up silly conflicts, mostly due to whitespace cleanups. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits) MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h MIPS: remove broken conditional inside vpe loader code MIPS: SMTC: fix implicit declaration of set_vi_handler MIPS: early_printk: drop __init annotations MIPS: Probe for and report hardware virtualization support. MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board MIPS: ath79: add USB controller registration code for the QCA955X SoCs MIPS: ath79: add PCI controller registration code for the QCA955X SoCs MIPS: ath79: add WMAC registration code for the QCA955X SoCs MIPS: ath79: register UART for the QCA955X SoCs MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear} MIPS: ath79: add GPIO setup code for the QCA955X SoCs MIPS: ath79: add IRQ handling code for the QCA955X SoCs MIPS: ath79: add clock setup code for the QCA955X SoCs MIPS: ath79: add SoC detection code for the QCA955X SoCs MIPS: ath79: add early printk support for the QCA955X SoCs MIPS: ath79: fix WMAC IRQ resource assignment mips: reserve elfcorehdr mips: Make sure kernel memory is in iomem MIPS: ath79: use dynamically allocated USB platform devices ...
| * MIPS: lantiq: add GPHY clock gate bitsJohn Crispin2013-02-172-0/+10
| | | | | | | | | | | | | | Explicitly enable the clock gate of the internal GPHYs found on xrx200. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4816/
| * MIPS: lantiq: adds static clock for PP32John Crispin2013-02-172-5/+50
| | | | | | | | | | | | | | | | The Lantiq DSL SoCs have an internal networking processor. Add code to read the static clock rate. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4815/
| * MIPS: lantiq: trivial typo fixJohn Crispin2013-02-171-1/+1
| | | | | | | | | | | | | | "nodes" is written with a single "s" Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4814/
* | MIPS: Convert to devm_ioremap_resource()Thierry Reding2013-01-252-7/+6
|/ | | | | | | | | | | | Convert all uses of devm_request_and_ioremap() to the newly introduced devm_ioremap_resource() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages so all explicit error messages can be removed from the failure code paths. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: drivers: remove __dev* attributes.Greg Kroah-Hartman2013-01-033-3/+3
| | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into ↵Ralf Baechle2012-12-135-8/+162
|\ | | | | | | mips-for-linux-next
| * MIPS: lantiq: adds GPHY firmware loaderJohn Crispin2012-11-112-0/+99
| | | | | | | | | | | | | | | | The internal GPHYs need a firmware blob to function properly. This patch adds the code needed to request the blob and load it to the PHY. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4523
| * MIPS: lantiq: adds code for booting GPHYJohn Crispin2012-11-111-0/+36
| | | | | | | | | | | | | | | | The XRX200 family of SoCs has embedded gigabit PHYs. This patch adds code to boot them up. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4522
| * MIPS: lantiq: adds xrx200 ethernet clock definitionJohn Crispin2012-11-111-0/+4
| | | | | | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4521
| * MIPS: lantiq: verbose init of dma coreJohn Crispin2012-11-111-1/+8
| | | | | | | | | | | | | | Print the hardware revision and port/channel info when starting the dma core. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4520
| * MIPS: lantiq: fix bootselect bits on XRX200 SoCJohn Crispin2012-11-111-7/+15
| | | | | | | | | | | | | | | | The XRX200 SoC family has a different register layout for reading the boot selection bits. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4519
* | MIPS: Lantiq: Fix typo in "endianness" in dma.cMasanari Iida2012-12-131-3/+3
|/ | | | | | | | | | Correct spelling typo ENDIANESS to ENDIANNESS in arc/mips/lantiq/xway/dma.c Signed-off-by: Masanari Iida <standby24x7@gmail.com> Cc: trivial@kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4613/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'master' of git://dev.phrozen.org/mips-next into ↵Ralf Baechle2012-10-051-0/+2
|\ | | | | | | mips-for-linux-next
| * MIPS: lantiq: explicitly enable clkout generationJohn Crispin2012-08-221-0/+2
| | | | | | | | | | | | | | | | Previously we relied on the bootloader to have enabled this bit. However some bootloaders seem to not enable this for us. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4120/
* | OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl supportJohn Crispin2012-09-132-184/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pinctrl on lantiq/xway socs. The IO core found on these socs has the registers for pinctrl, pinconf and gpio mixed up in the same register range. As the gpio_chip handling is only a few lines, the driver also implements the gpio functionality. This obseletes the old gpio driver that was located in the arch/ folder. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org
* | MIPS: lantiq: adds support for gptu timersJohn Crispin2012-08-232-1/+215
| | | | | | | | | | | | | | | | Lantiq socs have a General Purpose Timer Unit (GPTU). This driver allows us to initialize the timers. The voice firmware needs these timers as a reference. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4236/
* | MIPS: lantiq: enable pci clk conditional for xrx200 SoCJohn Crispin2012-08-231-1/+2
|/ | | | | | | | The xrx200 SoC family has the same PCI clock register layout as the AR9. Enable the same quirk as for AR9 Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4235/
* MIPS: Lantiq: Fix interface clock and PCI control register offsetJohn Crispin2012-08-011-21/+28
| | | | | | | | | | | The XRX200 based SoC have a different register offset for the interface clock and PCI control registers. This patch detects the SoC and sets the register offset at runtime. This make PCI work on the VR9 SoC. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4113/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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