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* [POWERPC] fsl_lbc: implement few UPM routinesAnton Vorontsov2008-04-171-0/+1
| | | | | | | | | | | | | Freescale UPM can be used to adjust localbus timings or to generate orbitrary, pre-programmed "patterns" on the external Localbus signals. This patch implements few routines so drivers could work with UPMs in safe and generic manner. So far there is just one user of these routines: Freescale UPM NAND driver. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 4xx: Add PPC4xx L2-cache support (440GX)Stefan Roese2008-03-261-0/+1
| | | | | | | | | | | | | | | This patch adds support for the 256k L2 cache found on some IBM/AMCC 4xx PPC's. It introduces a common 4xx SoC file (sysdev/ppc4xx_soc.c) which currently "only" adds the L2 cache init code. Other common 4xx stuff can be added later here. The L2 cache handling code is a copy of Eugene's code in arch/ppc with small modifications. Tested on AMCC Taishan 440GX. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] CPM: Rename commproc to cpm1 and cpm2_common.c to cpm2.cJochen Friedrich2008-01-281-2/+2
| | | | | | | | | Rename commproc.[ch] to cpm1.[ch] to be more consistent with cpm2. Also rename cpm2_common.c to cpm2.c as suggested by Scott Wood. Adjust the includes accordingly. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Enable RTC for Ebony and Walnut (v2)David Gibson2008-01-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | This patch extends the Ebony and Walnut platform code to instantiate the existing ds1742 RTC class driver for the DS1743 RTC/NVRAM chip found on both those boards. The patch uses a helper function to scan the device tree and instantiate the appropriate platform_device based on it, so it should be easy to extend for other boards which have mmio mapped RTC chips. Along with this, the device tree binding for the ds1743 chips is tweaked, based on the existing DS1385 OF binding found at: http://playground.sun.com/1275/proposals/Closed/Remanded/Accepted/346-it.txt Although that document covers the NVRAM portion of the chip, whereas here we're interested in the RTC portion, so it's not entirely clear if that's a good model. This implements only RTC class driver support - that is /dev/rtc0, not /dev/rtc, and the low-level get/set time callbacks remain unimplemented. That means in order to get at the clock you will either need a modified version of hwclock which will look at /dev/rtc0, or you'll need to configure udev to symlink rtc0 to rtc. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Move RapidIO support code from arch/ppcKumar Gala2008-01-231-0/+1
| | | | | | | Do just enough to move the RapidIO support code for 85xx over from arch/ppc into arch/powerpc and make it still build. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add IPIC Kconfig optionJohn Rigby2008-01-231-1/+1
| | | | | | | IPIC is not just for 83xx anymore so make it a separate config option. Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 4xx: PLB to PCI-X supportBenjamin Herrenschmidt2007-12-231-0/+3
| | | | | | | | | | | This adds base support code for the 4xx PCI-X bridge. It also provides placeholders for the PCI and PCI-E version but they aren't supported with this patch. The bridges are configured based on device-tree properties. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] pasemi: Implement MSI supportOlof Johansson2007-12-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement MSI support for PA Semi PWRficient platforms. MSI is done through a special range of sources on the openpic controller, and they're unfortunately breaking the usual concepts of how sources are programmed: * The source is calculated as 512 + the value written into the MSI register * The vector for this source is added to the source and reported through IACK This means that for simplicity, it makes much more sense to just set the vector to 0 for the source, since that's really the vector we expect to see from IACK. Also, the affinity/priority registers will affect 16 sources at a time. To avoid most (simple) users from being limited by this, allocate 16 sources per device but use only one. This means that there's a total of 32 sources. If we get usage scenarions that need more sources, the allocator should probably be revised to take an alignment argument and size, not just do natural alignment. Finally, since I'm already touching the MPIC names on pasemi, rename the base one from the somewhat odd " PAS-OPIC " to "PASEMI-OPIC". Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] bestcomm: core bestcomm support for Freescale MPC5200Sylvain Munaut2007-10-161-0/+1
| | | | | | | | | | | | | | | | | | This patch adds support for the core of the BestComm API for the Freescale MPC5200(b). The BestComm engine is a microcode-controlled / tasks-based DMA used by several of the onchip devices. Setting up the tasks / memory allocation and all common low level functions are handled by this patch. The specifics details of each tasks and their microcode are split-out in separate patches. This is not the official API, but a much cleaner one. (hopefully) Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* [POWERPC] Don't build arch/powerpc/sysdev/dcr.c for ARCH=ppc kernelsGrant Likely2007-10-101-1/+1
| | | | | | | dcr.c is an arch/powerpc only thing. Compiling ppc405 arch/ppc kernels throws warnings without this change. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* [POWERPC] Add early debug console for CPM serial ports.Scott Wood2007-10-031-0/+1
| | | | | | | | | This code assumes that the ports have been previously set up, with buffers in DPRAM. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Virtex: add xilinx interrupt controller driverGrant Likely2007-10-031-0/+1
| | | | | | | Adds support for the Xilinx opb-intc interrupt controller Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] Implement {read,update}_persistent_clockTony Breeds2007-10-031-5/+0
| | | | | | | | With these functions implemented we cooperate better with the generic timekeeping code. This obsoletes the need for the timer sysdev as a bonus. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add Marvell mv64x60 udbg putc/getc functionsDale Farnsworth2007-09-221-1/+2
| | | | | | | | | | | | | | | | | | Commit 69331af, "Fixes and cleanups for earlyprintk aka boot console", resulted in printk output prior to the initialization of the mpsc console driver not being printed. That commit causes the mpsc's CON_PRINTBUFFER flag to be cleared since udbg should have printed the previous output. I guess we can no longer ignore udbg. :) This patch provides udbg_putc() and udbg_getc() functions for the Marvell mv64x60 chips. These functions are enabled if an mv64x60 port is to be used as the console as determined from the device tree. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Create common fsl pci/e files based on 86xx platformsRoy Zang2007-07-231-0/+1
| | | | | | | | | | | | | Move arch/powerpc/platforms/86xx/pci.c -> arch/powerpc/sysdev/fsl_pci.c arch/powerpc/sysdev/fsl_pcie.h -> arch/powerpc/sysdev/fsl_pci.h as the base to unify 83xx/85xx/86xx pci and pcie. Add CONFIG_FSL_PCI to build fsl_pci.c for Freescale pci and pcie option. The code still works for 86xx platforms. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [CELL] driver for DDR2 memory on AXONMaxim Shchetynin2007-07-201-0/+1
| | | | | | | | | | | | | | | | | | The Axon bridge chip used on new Cell/B.E. based blade servers comes with a DDR2 memory controller that can be used to attach cheap memory modules, as opposed to the high-speed XDR memory that is used by the CPU itself. Since the memory controller does not participate in the cache coherency protocol, we can not use the memory direcly for Linux applications, but by providing a block device it can be used for swap space, temporary file storage and through the use of the direct_access block device operation for mapping into user addresses, when it is mounted with an appropriate file system. Signed-off-by: Maxim Shchetynin <maxim@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Create add_rtc() function to enable the RTC CMOS driverWade Farnsworth2007-07-111-0/+1
| | | | | | | | | | | | In order to use the RTC CMOS driver, each architecture must register a platform device for the RTC. This creates a function to register the platform device based on the RTC device node and verifies that the RTC port against the hard-coded value in asm/mc146818rtc.h. Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove PCI-e errata for MPC8641 silicon ver 1.0Zhang Wei2007-06-291-1/+0
| | | | | | | | | Remove errata for PCI-e support of Rev 1.0 of MPC8641 since its considered obselete and is not production level silicon from Freescale. Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Pass the pci_controller into pci_exclude_deviceKumar Gala2007-06-291-1/+1
| | | | | | | | | | There are times that we need to know which controller we are on to decide how to exclude devices properly. We now pass the pci_controller that we are going to use down to the pci_exclude_device function. This will greatly simplify being able to exclude the PHBs in multiple controller setups. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Don't link timer.o for powerpc systems using generic rtcGuennadi Liakhovetski2007-06-251-0/+2
| | | | | | | | | | | | | | | | | With both generic rtc and powerpc timer suspend / resume code now in the (powerpc.git) tree, powerpc platforms using the generic timer and enabling power management will have timer.o linked in the kernel, which they don't need. Moreover, it will likely WARN_ON(!ppc_md.get_rtc_time), save zero-time and return no error on suspend... As a possible solution we can choose not to build timer.o when RTC_CLASS is enabled. However, I can imagine systems with 2 rtc's, one served by the ppc-rtc, another one generic built as a module, in which case using the ppc-rtc for suspend / resume will be impossible. Not to say, that such a configuration would be ugly... Signed-off-by: G. Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add Marvell mv64x60 PCI bridge supportDale Farnsworth2007-05-121-1/+2
| | | | | | | | | | | This patch adds PCI bridge support for the Marvell mv64x60 chip. We also provide the ability to read/write the mv64x60 hotswap register via sysfs if the hs_reg_valid property is set in the device tree. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Create Marvell mv64x60 MPSC (serial) platform_dataDale Farnsworth2007-05-121-1/+1
| | | | | | | | | | | | | | | This patch creates platform_device entries for the Marvell mv64x60 MPSC (multi-protocol serial controller) ports, based on information contained in the device tree. This driver (like the other mv64x60 drivers) are unusual in that it works on both the MIPS and PowerPC architectures. Because of that, the drivers do not support the normal PowerPC of_platform_bus_type. They support platform_bus_type instead. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add interrupt support for Marvell mv64x60 chipsDale Farnsworth2007-05-121-0/+1
| | | | | | | | | | | There are 3 interrupt groups each with its own status/mask registers. We use a separate struct irq_chip for each interrupt group and handle interrupts in two stages or levels: level 1 selects the appropriate struct irq_chip, and level 2 selects individual interrupts within that irq_chip. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Abolish powerpc_flash_init()David Gibson2007-05-081-1/+0
| | | | | | | | | | | | | | powerpc_flash_init() implements a broken way of probing for flash devices supported by the physmap_of driver. It finds all nodes in the device tree with device_type=="rom" and instantiates of_platform devices for them. This is fundamentally incompatible with the normal and correct way of probing for of_platform_bus_probe(). Platforms which relied on powerpc_flash_init()s behaviour (none are in-tree) will have to update their platform probing code to correctly probe busses containing flash devices. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] MPIC U3/U4 MSI backendMichael Ellerman2007-05-081-1/+1
| | | | | | | | | | | | | | | | MPIC U3/U4 MSI backend. Based on code from Segher, heavily hacked by me. This only deals with MSI on U3/U4 MPICs, aka. CPC 9x5. If we find a U3/U4 then we enable this backend, ie. take over the ppc_md MSI hooks. We might need more elaborate logic in future to decide which backend is enabled. We need our own irq_chip so that we can do MSI masking/unmasking on the device itself. We also need to mask explicitly on shutdown to make sure we don't get bitten by lazy-disable semantics. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] MPIC MSI allocatorMichael Ellerman2007-05-081-1/+3
| | | | | | | | | | | To support MSI on MPIC we need a way to reserve and allocate hardware irq numbers, this patch implements an allocator for that purpose. New firmware platforms must define a "msi-available-ranges" property on their MPIC node for MSI to work. For U3/U4 we do a best-guess setup. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add arch/powerpc driver for UIC, PPC4xx interrupt controllerDavid Gibson2007-04-241-0/+1
| | | | | | | | | This patch adds a driver to arch/powerpc/sysdev for the UIC, the on-chip interrupt controller from IBM/AMCC 4xx chips. It uses the new irq host mapping infrastructure. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] 86xx/85xx: Move 8641 PCI-Express to arch/powerpc/sysdev/fsl_pcie.c.Jon Loeliger2007-03-261-0/+1
| | | | | | | | | | This move sets the stage for the use of generic PCI Express code in 85xx and 86xx parts from FSL. Subsequent patches for 8548 and 8544 will be able to use this shared code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Generic time suspend/resume codeJohannes Berg2007-03-261-0/+3
| | | | | | | | | | | | | | | This removes the time suspend/restore code that was done through a PMU notifier in arch/platforms/powermac/time.c. Instead, introduce arch/powerpc/sysdev/timer.c which creates a sys device and handles time of day suspend/resume through that. This should probably be replaced by using the generic RTC framework but for now it gets rid of the arcane powermac specific hack. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add PMI driver for cell bladeChristian Krafft2007-02-161-0/+1
| | | | | | | | | | | | This adds driver code for the PMI device found in future IBM products. PMI stands for "Platform Management Interrupt" and is a way to communicate with the BMC (Baseboard Management Controller). It provides bidirectional communication with a low latency. Signed-off-by: Christian Krafft <krafft@de.ibm.com> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by: Heiko J Schick <schickhj@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] 8xx: powerpc port of core CPM PICVitaly Bordug2007-02-071-0/+2
| | | | | | | | | | This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Don't include powerpc/sysdev/rom.o for arch/ppc buildsGrant Likely2007-01-091-1/+1
| | | | | | | | | sysdev/rom.c is for arch/powerpc only. Don't compile it when building an arch/ppc kernel. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Only export __mtdcr/__mfdcr if CONFIG_PPC_DCR is setKumar Gala2006-12-101-1/+2
| | | | | | | | | | On 85xx we don't build in dcr support because the core doesn't implement the instructions. This caused problems when building an 85xx kernel. Additionally made it so we only build __mtdcr/__mfdcr if we are CONFIG_PPC_DCR_NATIVE. The 85xx build issue wasPointed out by Dai Haruki. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Move MPC52xx PIC driver into arch/powerpc/platforms/52xxGrant Likely2006-12-041-1/+0
| | | | | | | | No other chips use this device, it belongs in a 52xx-specific path. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add of_platform support for ROM devicesVitaly Wool2006-12-041-0/+1
| | | | | | | | | | This adds support for flash device descriptions to the OF device tree. It's inspired by and partially borrowed from Sergei's patch "[RFC] Adding MTD to device tree.patch". Signed-off-by: Vitaly Wool <vwool@ru.mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Don't compile arch/powerpc mpc52xx_pic driver for ARCH=ppcGrant Likely2006-12-041-1/+1
| | | | | | | arch/powerpc/sysdev/mpc52xx_pic.c breaks the ppc build Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Generic DCR infrastructureBenjamin Herrenschmidt2006-12-041-2/+1
| | | | | | | | | | | This patch adds new dcr_map/dcr_read/dcr_write accessors for DCRs that can be used by drivers to transparently address either native DCRs or memory mapped DCRs. The implementation for memory mapped DCRs is done after the binding being currently worked on for SLOF and the Axon chipset. This patch enables it for the cell native platform Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] Add MPC5200 Interrupt Controller support.Nicolas DET2006-11-131-0/+1
| | | | | | | | | | | | | This adds support for the MPC52xx Interrupt controller for ARCH=powerpc. It includes the main code in arch/powerpc/sysdev/ as well as a header file in include/asm-powerpc. Signed-off-by: Nicolas DET <nd@bplan-gmbh.de> Acked-by: Sylvain Munaut <tnt@246tNt.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove todc code from ARCH=powerpcDavid Gibson2006-10-161-1/+0
| | | | | | | | | | | | | | Apparently we've copied the todc drivers, for various RTCs used in embedded machines from ARCH=ppc to ARCH=powerpc, despite the fact that it's never used in the latter. This patch removes it. If we ever need these drivers (which we probably shouldn't now the RTC class stuff is in), we can transfer them one by one from ARCH=ppc, removing from the hideous abomination which is the todc "infrastructure". Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add QUICC Engine (QE) infrastructureLi Yang2006-10-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add QUICC Engine (QE) configuration, header files, and QE management and library code that are used by QE devices drivers. Includes Leo's modifications up to, and including, the platform_device to of_device adaptation: "The series of patches add generic QE infrastructure called qe_lib, and MPC8360EMDS board support. Qe_lib is used by QE device drivers such as ucc_geth driver. This version updates QE interrupt controller to use new irq mapping mechanism, addresses all the comments received with last submission and includes some style fixes. v2: Change to use device tree for BCSR and MURAM; Remove I/O port interrupt handling code as it is not generic enough. v3: Address comments from Kumar; Update definition of several device tree nodes; Copyright style change." In addition, the following changes have been made: o removed typedefs o uint -> u32 conversions o removed following defines: QE_SIZEOF_BD, BD_BUFFER_ARG, BD_BUFFER_CLEAR, BD_BUFFER, BD_STATUS_AND_LENGTH_SET, BD_STATUS_AND_LENGTH, and BD_BUFFER_SET because they hid sizeof/in_be32/out_be32 operations from the reader. o fixed qe_snums_init() serial num assignment to use a const array o made CONFIG_UCC_FAST select UCC_SLOW o reduced NR_QE_IC_INTS from 128 to 64 o remove _IO_BASE, etc. defines (not used) o removed irrelevant comments, added others to resemble removed BD_ defines o realigned struct definitions in headers o various other style fixes including things like pinMask -> pin_mask o fixed a ton of whitespace issues o marked ioregs as __be32/__be16 o removed platform_device code and redundant get_qe_base() o removed redundant comments o added cpu_relax() to qe_reset o uncasted all get_property() assignments o eliminated unneeded casts o eliminated immrbar_phys_to_virt (not used) Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Shlomi Gridish <gridish@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* POWERPC: Move generic cpm2 stuff to powerpcVitaly Bordug2006-09-211-0/+5
| | | | | | | This moves the cpm2 common code and PIC stuff to the powerpc. Most of the files were just copied from ppc/, with minor tuning to make it compile, and, subsequently, work. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
* [POWERPC] back up old school ipic.[hc] to arch/ppcKim Phillips2006-08-301-2/+2
| | | | | | | Keep from breaking 83xx arch/ppc build. Back up old school arch/powerpc/sysdev/ipic.[hc] to arch/ppc/syslib. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Copy i8259 code back to arch/ppcBenjamin Herrenschmidt2006-07-031-1/+4
| | | | | | | | | | This copies the i8259 interrupt controller driver from arch/powerpc to arch/ppc. It's currently shared by both architectures, but the upcoming arch/powerpc interrupt changes will break the arch/ppc builds. The changes are too important to just use #ifdef's in the driver. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] todc: add support for Time-Of-Day-ClockMark A. Greer2006-06-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | This is a resubmit with a proper subject and with all comments addressed. Applies cleanly to powerpc.git 649e85797259162f7fdc696420e7492f20226f2d Mark -- The todc code from arch/ppc supports many todc/rtc chips and is needed in arch/powerpc. This patch adds the todc code to arch/powerpc. Signed-off-by: Mark A. Greer <mgreer@mvista.com> -- arch/powerpc/Kconfig | 7 arch/powerpc/sysdev/Makefile | 1 arch/powerpc/sysdev/todc.c | 392 ++++++++++++++++++++++++++++++++++ include/asm-powerpc/todc.h | 487 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 887 insertions(+) -- Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add tsi108 pci and platform device data register functionZang Roy-r619112006-06-291-0/+1
| | | | | | | | | | | Add Tundra Semiconductor tsi108 pci and platform device data register function support. Signed-off-by: Alexandre Bounine <alexandreb@tundra.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> --- Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Optimise some TOC usageAnton Blanchard2006-06-151-0/+4
| | | | | | | Micro-optimisation - add no-minimal-toc to some more arch/powerpc Makefiles. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Add FSL SOC library and setup codeKumar Gala2006-01-141-0/+1
| | | | | | | | | | | | | Parse the flat device tree for devices on Freescale SOC's that we know about (gianfar, gianfar_mdio, i2c, mpc83xx_wdt). We need to setup platform devices and platform data for these devices to match arch/ppc usage. Also add a helper function (get_immrbase) that reports the base address of the MMIO registers on the SOC. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Updated Kconfig and Makefiles for 83xx supportKumar Gala2006-01-111-1/+1
| | | | | | | | | | | Updated Kconfig & Makefiles in prep for adding support for the Freescale MPC83xx family of processors to arch/powerpc. Moved around some config options that are more globally applicable to other PowerPC processors. Added a temporary config option (83xx) to match existing arch/ppc support for the MPC83xx line. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Experimental support for new G5 Macs (#2)Benjamin Herrenschmidt2006-01-091-1/+1
| | | | | | | | | | | | | This adds some very basic support for the new machines, including the Quad G5 (tested), and other new dual core based machines and iMac G5 iSight (untested). This is still experimental ! There is no thermal control yet, there is no proper handing of MSIs, etc.. but it boots, I have all 4 cores up on my machine. Compared to the previous version of this patch, this one adds DART IOMMU support for the U4 chipset and thus should work fine on setups with more than 2Gb of RAM. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: moved ipic code to arch/powerpcKumar Gala2006-01-091-0/+1
| | | | | | | | Moved 83xx and QUICC Engine interrupt handling code into arch/powerpc as a precursor of getting 83xx sub-arch building in arch/powerpc. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-16 01:20:15 +0000