summaryrefslogtreecommitdiffstats
path: root/arch/riscv/configs
Commit message (Expand)AuthorAgeFilesLines
...
| * | RISC-V: defconfigs: Sort CONFIG_PTP_1588_CLOCKPalmer Dabbelt2022-01-051-1/+1
| * | RISC-V: defconfigs: Sort CONFIG_SOC_POLARFIREPalmer Dabbelt2022-01-051-1/+1
| * | RISC-V: defconfigs: Sort CONFIG_SYSFS_SYSCALLPalmer Dabbelt2022-01-052-2/+2
| * | RISC-V: defconfigs: Sort CONFIG_BPF_SYSCALLPalmer Dabbelt2022-01-052-2/+2
| * | RISC-V: defconfigs: Set CONFIG_FB=y, for FB consolePalmer Dabbelt2022-01-052-0/+2
| |/
* / RISC-V: Enable KVM in RV64 and RV32 defconfigs as a moduleAnup Patel2021-11-182-0/+4
|/
* riscv: defconfig: enable DRM_NOUVEAUHeinrich Schuchardt2021-10-271-3/+4
* riscv: add rv32 and rv64 randconfig build targetsRandy Dunlap2021-10-042-0/+4
* riscv: defconfig: enable NLS_CODEPAGE_437, NLS_ISO8859_1Heinrich Schuchardt2021-09-101-0/+2
* riscv: defconfig: enable BLK_DEV_NVMEHeinrich Schuchardt2021-09-101-0/+2
* block: remove CONFIG_DEBUG_BLOCK_EXT_DEVTChristoph Hellwig2021-08-242-2/+0
* RISC-V: Enable Microchip PolarFire ICICLE SoCAtish Patra2021-04-261-0/+4
* RISC-V: Enable CPU Hotplug in defconfigsAnup Patel2021-02-262-0/+2
* Merge tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2021-02-262-9/+129
|\
| * riscv: Add Canaan Kendryte K210 SD card defconfigDamien Le Moal2021-02-221-0/+92
| * riscv: Update Canaan Kendryte K210 defconfigDamien Le Moal2021-02-221-8/+36
| * riscv: Use vendor name for K210 SoC supportDamien Le Moal2021-01-141-1/+1
* | riscv: defconfig: enable gpio support for HiFive UnleashedSagar Shrikant Kadam2021-01-131-0/+2
|/
* RISC-V: Add EFI stub support.Atish Patra2020-10-021-0/+1
* riscv: Add SiFive drivers to rv32_defconfigBin Meng2020-08-201-0/+5
* RISC-V: Remove CLINT related code from timer and archAnup Patel2020-08-201-5/+2
* riscv: Add jump-label implementationEmil Renner Berthing2020-07-304-0/+4
* riscv: K210: Update defconfigDamien Le Moal2020-05-181-5/+2
* Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2020-04-093-0/+70
|\
| * riscv: Kendryte K210 default configDamien Le Moal2020-04-031-0/+68
| * riscv: Delete CONFIG_SYSFS_SYSCALL from defconfigsDeepa Dinamani2020-03-032-0/+2
* | RISC-V: Only select essential drivers for SOC_VIRT configAnup Patel2020-03-262-2/+30
* | RISC-V: Select Goldfish RTC driver for QEMU virt machineAnup Patel2020-03-052-0/+2
* | RISC-V: Select SYSCON Reboot and Poweroff for QEMU virt machineAnup Patel2020-03-052-0/+2
* | RISC-V: Enable QEMU virt machine support in defconfigsAnup Patel2020-03-052-29/+2
|/
* Merge branch 'next/defconfig-add-debug' into for-nextPaul Walmsley2019-11-222-0/+48
|\
| * riscv: defconfigs: enable more debugging optionsPaul Walmsley2019-11-222-0/+46
| * riscv: defconfigs: enable debugfsPaul Walmsley2019-11-222-0/+2
* | riscv: add nommu supportChristoph Hellwig2019-11-171-0/+78
|/
* RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfigAnup Patel2019-09-192-0/+22
* riscv: defconfig: Update the defconfigAlistair Francis2019-08-131-0/+2
* riscv: rv32_defconfig: Update the defconfigAlistair Francis2019-08-131-0/+3
* riscv: defconfig: align RV64 defconfig to the output of "make savedefconfig"Paul Walmsley2019-07-311-5/+5
* riscv: defconfig: enable SOC_SIFIVELoys Ollivier2019-07-011-5/+1
* RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERSAnup Patel2019-07-012-0/+4
* RISC-V: defconfig: enable MMC & SPI for RISC-VAtish Patra2019-06-261-0/+5
* RISC-V: defconfig: enable clocks, serial consoleKevin Hilman2019-06-111-0/+4
* RISC-V: Add separate defconfig for 32bit systemsAnup Patel2019-04-091-0/+84
* RISC-V: defconfig: Add CRYPTO_DEV_VIRTIO=yPalmer Dabbelt2019-01-231-0/+1
* RISC-V: defconfig: Enable Generic PCIE by defaultAlistair Francis2019-01-231-1/+2
* RISC-V: defconfig: Move CONFIG_PCI{,E_XILINX}Palmer Dabbelt2019-01-231-2/+2
* RISC-V: defconfig: Enable RISC-V SBI earlycon supportAnup Patel2018-12-171-0/+1
* RISC-V: defconfig: Enable printk timestampsAnup Patel2018-11-121-0/+1
* RISC-V: refresh defconfigAnup Patel2018-11-011-8/+8
* irqchip: add a SiFive PLIC driverChristoph Hellwig2018-08-131-0/+1