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* riscv/stacktrace: Remove the pointless ULONG_MAX markerThomas Gleixner2019-04-141-2/+0
* RISC-V: Use IS_ENABLED(CONFIG_CMODEL_MEDLOW)Joe Perches2019-03-281-1/+1
* RISC-V: Always compile mm/init.c with cmodel=medany and notraceAnup Patel2019-03-262-11/+0
* Merge tag 'riscv-for-linus-5.1-mw0' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2019-03-076-184/+71
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| * RISC-V: Fixmap support and MM cleanupsPalmer Dabbelt2019-03-042-127/+5
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| | * RISC-V: Move setup_vm() to mm/init.cAnup Patel2019-02-211-49/+0
| | * RISC-V: Move setup_bootmem() to mm/init.cAnup Patel2019-02-211-72/+0
| | * RISC-V: Setup init_mm before parse_early_param()Anup Patel2019-02-211-5/+4
| * | arch: riscv: fix logic error in parse_dtbAndreas Schwab2019-03-041-1/+1
| * | RISC-V: Assign hwcap as per comman capabilities.Atish Patra2019-03-041-19/+22
| * | RISC-V: Compare cpuid with NR_CPUS before mapping.Atish Patra2019-03-041-0/+5
| * | RISC-V: Allow hartid-to-cpuid function to fail.Atish Patra2019-03-041-1/+0
| * | RISC-V: Remove NR_CPUs check during hartid search from DTAtish Patra2019-03-041-4/+0
| * | RISC-V: Move cpuid to hartid mapping to SMP.Atish Patra2019-03-042-9/+9
| * | RISC-V: Do not wait indefinitely in __cpu_upAtish Patra2019-03-041-3/+12
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| * riscv: use for_each_of_cpu_node iteratorJohan Hovold2019-02-112-4/+5
| * riscv: treat cpu devicetree nodes without status as enabledJohan Hovold2019-02-111-7/+3
| * riscv: fix riscv_of_processor_hartid() commentJohan Hovold2019-02-111-9/+9
| * riscv: use pr_info and friendsJohan Hovold2019-02-111-3/+3
| * riscv: add missing newlines to printk messagesJohan Hovold2019-02-113-6/+6
* | Merge branch 'akpm' (patches from Andrew)Linus Torvalds2019-03-061-1/+0
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| * | riscv/vdso: don't clear PG_reservedDavid Hildenbrand2019-03-051-1/+0
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* | Merge branch 'timers-2038-for-linus' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2019-03-051-0/+2
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| * Merge tag 'y2038-syscall-abi' of git://git.kernel.org/pub/scm/linux/kernel/gi...Thomas Gleixner2019-02-271-0/+2
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| | * riscv: Use latest system call ABIArnd Bergmann2019-02-251-0/+2
* | | Revert "RISC-V: Make BSS section as the last section in vmlinux.lds.S"Palmer Dabbelt2019-02-111-6/+2
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* | riscv: fixup max_low_pfn with PFN_DOWN.Guo Ren2019-01-231-1/+1
* | RISC-V: fix bad use of of_node_putAndreas Schwab2019-01-231-5/+1
* | RISC-V: Add _TIF_NEED_RESCHED check for kernel thread when CONFIG_PREEMPT=yVincent Chen2019-01-232-1/+18
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* Fix a handful of audit-related issuePalmer Dabbelt2019-01-072-3/+10
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| * riscv: fix trace_sys_exit hookDavid Abdurachmanov2019-01-071-1/+1
| * riscv: define CREATE_TRACE_POINTS in ptrace.cDavid Abdurachmanov2019-01-071-0/+2
| * riscv: audit: add audit hook in do_syscall_trace_enter/exit()David Abdurachmanov2019-01-071-0/+5
| * riscv: add audit supportDavid Abdurachmanov2019-01-071-2/+2
* | RISC-V: Support MODULE_SECTIONS mechanism on RV32Zong Li2019-01-071-14/+16
* | riscv: don't stop itself in smp_send_stopAndreas Schwab2019-01-071-7/+36
* | arch: riscv: support kernel command line forcing when no DTB passedPaul Walmsley2019-01-071-1/+8
* | RISC-V: Make BSS section as the last section in vmlinux.lds.SAnup Patel2019-01-071-2/+6
* | Remove 'type' argument from access_ok() functionLinus Torvalds2019-01-031-2/+2
* | RISC-V: Move from EARLY_PRINTK to SBI earlyconPalmer Dabbelt2018-12-211-28/+0
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| * | RISC-V: Remove EARLY_PRINTK supportAnup Patel2018-12-171-28/+0
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* | riscv: remove unused variable in ftraceDavid Abdurachmanov2018-12-211-1/+0
* | RISC-V: add of_node_put()Yangtao Li2018-12-211-0/+1
* | RISC-V: Fix of_node_* refcountAtish Patra2018-12-215-1/+20
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* Merge tag 'trace-v4.20-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds2018-11-301-12/+2
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| * riscv/function_graph: Simplify with function_graph_enter()Steven Rostedt (VMware)2018-11-271-12/+2
* | RISC-V: recognize S/U mode bits in print_isaPatrick Stählin2018-11-201-3/+6
* | RISC-V: Build flat and compressed kernel imagesAnup Patel2018-11-202-1/+11
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* RISC-V: Silence some module warnings on 32-bitOlof Johansson2018-11-121-6/+6
* RISC-V: properly determine hardware capsAndreas Schwab2018-10-311-3/+5
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