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* RISC-V: lib: Fix build error for 64-bitOlof Johansson2018-11-121-1/+1
| | | | | | | | | | | | | Fixes the following build error from tinyconfig: riscv64-unknown-linux-gnu-ld: kernel/sched/fair.o: in function `.L8': fair.c:(.text+0x70): undefined reference to `__lshrti3' riscv64-unknown-linux-gnu-ld: kernel/time/clocksource.o: in function `.L0 ': clocksource.c:(.text+0x334): undefined reference to `__lshrti3' Fixes: 7f47c73b355f ("RISC-V: Build tishift only on 64-bit") Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
* RISC-V: Build tishift only on 64-bitZong Li2018-10-221-1/+2
| | | | | | | | Only RV64 supports 128 integer size. Signed-off-by: Zong Li <zong@andestech.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
* RISC-V: implement __lshrti3.Alex Guo2018-08-132-0/+43
| | | | | Signed-off-by: Alex Guo <xfguo@jlsemi.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
* RISC-V: Make our port sparse-cleanPalmer Dabbelt2018-06-111-2/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | This patch set contains a handful of fixes that clean up the sparse results for the RISC-V port. These patches shouldn't have any functional difference. The patches: * Use NULL instead of 0. * Clean up __user annotations. * Split __copy_user into two functions, to make the __user annotations valid. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
| * riscv: split the declaration of __copy_userLuc Van Oostenryck2018-06-091-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use a single __copy_user assembly function to copy memory both from and to userspace. While this works, it triggers sparse errors because we're implicitly casting between the kernel and user address spaces by calling __copy_user. This patch splits the C declaration into a pair of functions, __asm_copy_{to,from}_user, that have sane semantics WRT __user. This split make things fine from sparse's point of view. The assembly implementation keeps a single definition but add a double ENTRY() for it, one for __asm_copy_to_user and another one for __asm_copy_from_user. The result is a spare-safe implementation that pays no performance or code size penalty. Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
* | riscv: Fix the bug in memory access fixup codeAlan Kao2018-06-041-4/+9
|/ | | | | | | | | | | | | | | | | A piece of fixup code is currently shared by __copy_user and __clear_user. It first disables the access to user-space memory and then returns the "n" argument, which represents #(bytes not processed). However,__copy_user's "n" is in register a2, while __clear_user's in a1, and thus it causes errors for programs like setdomainname02 testcase in LTP. This patch fixes this issue by separating their fixup code and returning the right value for the kernel to handle a relative fault properly. Signed-off-by: Alan Kao <alankao@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Cc: Zong Li <zong@andestech.com> Cc: Vincent Chen <vincentc@andestech.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
* RISC-V: Export some expected symbols for modulesOlof Johansson2017-11-301-0/+1
| | | | | | | | | These are the ones needed by current allmodconfig, so add them instead of everything other architectures are exporting -- the rest can be added on demand later if needed. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
* RISC-V: Build InfrastructurePalmer Dabbelt2017-09-261-0/+6
| | | | | | | | | | This patch contains all the build infrastructure that actually enables the RISC-V port. This includes Makefiles, linker scripts, and Kconfig files. It also contains the only top-level change, which adds RISC-V to the list of architectures that need a sed run to produce the ARCH variable when building locally. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
* RISC-V: Device, timer, IRQs, and the SBIPalmer Dabbelt2017-09-261-0/+110
| | | | | | | | | This patch contains code that interfaces with devices that are mandated by the RISC-V supervisor specification and that don't have explicit drivers anywhere else in the tree. This includes the staticly defined interrupts, the CSR-mapped timer, and virtualized SBI devices. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
* RISC-V: Generic library routines and assemblyPalmer Dabbelt2017-09-264-0/+390
This patch contains code that is more specific to the RISC-V ISA than it is to Linux. It contains string and math operations, C wrappers for various assembly instructions, stack walking code, and uaccess. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>