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* RISC-V: Take text_mutex in ftrace_init_nop()Palmer Dabbelt2020-10-012-0/+26
* RISC-V: Upgrade smp_mb__after_spinlock() to iorw,iorwPalmer Dabbelt2020-07-291-1/+9
* riscv: use 16KB kernel stack on 64-bitAndreas Schwab2020-07-221-0/+4
* RISC-V: Don't allow write+exec only page mapping request in mmapYash Shah2020-06-301-0/+6
* riscv/atomic: Fix sign extension for RV64INathan Huckleberry2020-06-301-4/+4
* riscv: stacktrace: Fix undefined reference to `walk_stackframe'Kefeng Wang2020-06-031-1/+1
* riscv: set max_pfn to the PFN of the last pageVincent Chen2020-05-271-0/+2
* riscv: fix vdso build with lldIlie Halip2020-05-201-3/+3
* riscv: avoid the PIC offset of static percpu data in module beyond 2G limitsVincent Chen2020-03-251-0/+16
* riscv: delete temporary filesIlie Halip2020-02-051-1/+2
* riscv: ftrace: correct the condition logic in function graph tracerZong Li2020-01-091-1/+1
* RISC-V: Avoid corrupting the upper 32-bit of phys_addr_t in ioremapVincent Chen2019-12-011-1/+1
* riscv: Avoid interrupts being erroneously enabled in handle_exception()Vincent Chen2019-10-111-1/+5
* riscv: remove unused variable in ftraceDavid Abdurachmanov2019-09-161-1/+0
* riscv: Make __fstate_clean() work correctly.Vincent Chen2019-08-251-1/+1
* riscv: Fix udelay in RV32.Nick Hu2019-07-141-1/+1
* riscv: mm: synchronize MMU after pte changeShihPo Hung2019-06-251-0/+13
* riscv: fix accessing 8-byte variable from RV32Alan Kao2019-05-081-1/+1
* riscv: Fix syscall_get_arguments() and syscall_set_arguments()Dmitry V. Levin2019-04-171-5/+7
* riscv: Adjust mmap base address at a third of task sizeAlexandre Ghiti2019-03-131-1/+1
* riscv: fixup max_low_pfn with PFN_DOWN.Guo Ren2019-03-132-2/+3
* riscv: Add pte bit to distinguish swap from invalidStefan O'Rear2019-02-202-4/+10
* riscv: fix trace_sys_exit hookDavid Abdurachmanov2019-02-201-1/+1
* riscv: fix warning in arch/riscv/include/asm/module.hDavid Abdurachmanov2018-12-131-0/+1
* riscv/function_graph: Simplify with function_graph_enter()Steven Rostedt (VMware)2018-12-051-12/+2
* RISC-V: Silence some module warnings on 32-bitOlof Johansson2018-12-011-6/+6
* riscv: add missing vdso_install targetDavid Abdurachmanov2018-12-011-0/+4
* RISC-V: Fix raw_copy_{to,from}_user()Olof Johansson2018-11-271-2/+2
* RISCV: Fix end PFN for low memoryAtish Patra2018-10-021-1/+1
* RISC-V: include linux/ftrace.h in asm-prototypes.hJames Cowgill2018-09-241-0/+7
* riscv: Do not overwrite initrd_start and initrd_endGuenter Roeck2018-09-041-7/+0
* RISC-V: Use a less ugly workaround for unused variable warningsPalmer Dabbelt2018-08-281-14/+1
* riscv: tlb: Provide definition of tlb_flush() before including tlb.hWill Deacon2018-08-281-0/+4
* Merge tag 'kbuild-v4.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/m...Linus Torvalds2018-08-251-2/+2
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| * kbuild: rename LDFLAGS to KBUILD_LDFLAGSMasahiro Yamada2018-08-241-2/+2
* | RISC-V: Fix sys_riscv_flush_icachePalmer Dabbelt2018-08-204-9/+23
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| * | RISC-V: Don't use a global include guard for uapi/asm/syscalls.hPalmer Dabbelt2018-08-202-5/+13
| * | RISC-V: Define sys_riscv_flush_icache when SMP=nPalmer Dabbelt2018-08-202-4/+10
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* / riscv: Delete asm/compat.hDeepa Dinamani2018-08-202-29/+1
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* Merge tag 'riscv-for-linus-4.19-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2018-08-1918-59/+132
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| * RISC-V: Fix !CONFIG_SMP compilation errorAtish Patra2018-08-132-1/+1
| * irqchip: add a SiFive PLIC driverChristoph Hellwig2018-08-131-0/+1
| * RISC-V: Add the directive for alignment of stvec's valueZong Li2018-08-131-0/+2
| * clocksource: new RISC-V SBI timer driverPalmer Dabbelt2018-08-134-12/+4
| * RISC-V: implement low-level interrupt handlingChristoph Hellwig2018-08-132-11/+45
| * RISC-V: add a definition for the SIE SEIE bitChristoph Hellwig2018-08-131-0/+1
| * RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.hChristoph Hellwig2018-08-131-4/+0
| * RISC-V: simplify software interrupt / IPI codeChristoph Hellwig2018-08-133-7/+3
| * RISC-V: remove timer leftoversChristoph Hellwig2018-08-131-21/+0
| * RISC-V: Add early printk support via the SBI consolePalmer Dabbelt2018-08-131-0/+27