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* RISC-V: Fix sys_riscv_flush_icachePalmer Dabbelt2018-08-204-9/+23
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| * RISC-V: Don't use a global include guard for uapi/asm/syscalls.hPalmer Dabbelt2018-08-202-5/+13
| * RISC-V: Define sys_riscv_flush_icache when SMP=nPalmer Dabbelt2018-08-202-4/+10
* | riscv: Delete asm/compat.hDeepa Dinamani2018-08-202-29/+1
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* Merge tag 'riscv-for-linus-4.19-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2018-08-1918-59/+132
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| * RISC-V: Fix !CONFIG_SMP compilation errorAtish Patra2018-08-132-1/+1
| * irqchip: add a SiFive PLIC driverChristoph Hellwig2018-08-131-0/+1
| * RISC-V: Add the directive for alignment of stvec's valueZong Li2018-08-131-0/+2
| * clocksource: new RISC-V SBI timer driverPalmer Dabbelt2018-08-134-12/+4
| * RISC-V: implement low-level interrupt handlingChristoph Hellwig2018-08-132-11/+45
| * RISC-V: add a definition for the SIE SEIE bitChristoph Hellwig2018-08-131-0/+1
| * RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.hChristoph Hellwig2018-08-131-4/+0
| * RISC-V: simplify software interrupt / IPI codeChristoph Hellwig2018-08-133-7/+3
| * RISC-V: remove timer leftoversChristoph Hellwig2018-08-131-21/+0
| * RISC-V: Add early printk support via the SBI consolePalmer Dabbelt2018-08-131-0/+27
| * RISC-V: Don't increment sepc after breakpoint.Jim Wilson2018-08-131-1/+0
| * RISC-V: implement __lshrti3.Alex Guo2018-08-133-0/+46
| * RISC-V: Use KBUILD_CFLAGS instead of KCFLAGS when building the vDSOPalmer Dabbelt2018-08-131-2/+2
* | mm: convert return type of handle_mm_fault() caller to vm_fault_tSouptick Joarder2018-08-171-1/+2
* | Merge tag 'kconfig-v4.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds2018-08-152-71/+37
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| * | kconfig: include kernel/Kconfig.preempt from init/KconfigChristoph Hellwig2018-08-021-2/+0
| * | Kconfig: consolidate the "Kernel hacking" menuChristoph Hellwig2018-08-022-45/+37
| * | kconfig: include common Kconfig files from top-level KconfigChristoph Hellwig2018-08-021-24/+0
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* | Merge tag 'kbuild-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mas...Linus Torvalds2018-08-151-1/+0
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| * | kbuild: remove redundant LDFLAGS clearing in arch/*/MakefileMasahiro Yamada2018-07-191-1/+0
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* | locking/atomics: Rework ordering barriersMark Rutland2018-07-251-12/+5
* | Merge tag 'v4.18-rc5' into locking/core, to pick up fixesIngo Molnar2018-07-177-25/+24
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| * RISC-V: Fix the rv32i kernel buildPalmer Dabbelt2018-07-044-13/+21
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| | * RISC-V: Change variable type for 32-bit compatibleZong Li2018-07-041-11/+11
| | * RISC-V: Add definiion of extract symbol's index and type for 32-bitZong Li2018-07-041-2/+7
| | * RISC-V: Select GENERIC_UCMPDI2 on RV32IZong Li2018-07-041-0/+1
| | * RISC-V: Add conditional macro for zone of DMA32Zong Li2018-07-041-0/+2
| * | RISC-V: Fix PTRACE_SETREGSET bug.Jim Wilson2018-07-041-1/+1
| * | RISC-V: Don't include irq-riscv-intc.hPalmer Dabbelt2018-07-041-4/+0
| * | riscv: remove unnecessary of_platform_populate callRob Herring2018-07-041-5/+0
| * | RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocationsAndreas Schwab2018-07-041-2/+2
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* | atomics/treewide: Make unconditional inc/dec ops optionalMark Rutland2018-06-211-76/+0
* | atomics/treewide: Make test ops optionalMark Rutland2018-06-211-46/+0
* | atomics/riscv: Define atomic64_fetch_add_unless()Mark Rutland2018-06-211-6/+2
* | atomics/treewide: Make atomic_fetch_add_unless() optionalMark Rutland2018-06-211-0/+1
* | atomics/treewide: Make atomic64_inc_not_zero() optionalMark Rutland2018-06-211-7/+0
* | atomics/treewide: Remove redundant atomic_inc_not_zero() definitionsMark Rutland2018-06-211-9/+0
* | atomics/treewide: Rename __atomic_add_unless() => atomic_fetch_add_unless()Mark Rutland2018-06-211-2/+2
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* Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...Linus Torvalds2018-06-1615-14/+626
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| * RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfigPalmer Dabbelt2018-06-111-0/+1
| * RISC-V: Make our port sparse-cleanPalmer Dabbelt2018-06-116-9/+14
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| | * riscv: split the declaration of __copy_userLuc Van Oostenryck2018-06-093-6/+11
| | * riscv: no __user for probe_kernel_address()Luc Van Oostenryck2018-06-071-1/+1
| | * riscv: use NULL instead of a plain 0Luc Van Oostenryck2018-06-072-2/+2
| * | RISC-V: Handle R_RISCV_32 in modulesAndreas Schwab2018-06-111-0/+12
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